1 // Copyright (C) 2013 Michael McMaster <michael@codesrc.com>
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3 // This file is part of SCSI2SD.
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5 // SCSI2SD is free software: you can redistribute it and/or modify
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6 // it under the terms of the GNU General Public License as published by
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7 // the Free Software Foundation, either version 3 of the License, or
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8 // (at your option) any later version.
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10 // SCSI2SD is distributed in the hope that it will be useful,
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11 // but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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13 // GNU General Public License for more details.
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15 // You should have received a copy of the GNU General Public License
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16 // along with SCSI2SD. If not, see <http://www.gnu.org/licenses/>.
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17 #pragma GCC push_options
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18 #pragma GCC optimize("-flto")
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28 #include "scsiPhy.h"
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35 enum SD_IO_STATE { SD_DMA, SD_ACCEPTED, SD_BUSY, SD_IDLE };
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36 static int sdIOState = SD_IDLE;
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38 // Private DMA variables.
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39 static uint8 sdDMARxChan = CY_DMA_INVALID_CHANNEL;
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40 static uint8 sdDMATxChan = CY_DMA_INVALID_CHANNEL;
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42 // Dummy location for DMA to send unchecked CRC bytes to
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43 static uint8 discardBuffer;
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45 // 2 bytes CRC, response, 8bits to close the clock..
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46 // "NCR" time is up to 8 bytes.
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47 static uint8_t writeResponseBuffer[8];
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49 static uint8_t writeStartToken = 0xFC;
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51 // Source of dummy SPI bytes for DMA
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52 static uint8 dummyBuffer = 0xFF;
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54 volatile uint8_t sdRxDMAComplete;
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55 volatile uint8_t sdTxDMAComplete;
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57 CY_ISR_PROTO(sdRxISR);
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60 sdRxDMAComplete = 1;
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62 CY_ISR_PROTO(sdTxISR);
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65 sdTxDMAComplete = 1;
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68 static uint8 sdCrc7(uint8* chr, uint8 cnt, uint8 crc)
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71 for(a = 0; a < cnt; a++)
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73 uint8 Data = chr[a];
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75 for(i = 0; i < 8; i++)
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78 if( (Data & 0x80) ^ (crc & 0x80) ) {crc ^= 0x09;}
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85 // Read and write 1 byte.
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86 static uint8_t sdSpiByte(uint8_t value)
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88 SDCard_WriteTxData(value);
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89 while (!(SDCard_ReadRxStatus() & SDCard_STS_RX_FIFO_NOT_EMPTY)) {}
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90 return SDCard_ReadRxData();
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93 static uint16_t sdDoCommand(
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97 int use2byteResponse)
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99 int waitWhileBusy = (cmd != SD_GO_IDLE_STATE) && (cmd != SD_STOP_TRANSMISSION);
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101 // "busy" probe. We'll examine the results later.
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104 SDCard_WriteTxData(0xFF);
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107 // send is static as the address must remain consistent for the static
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108 // DMA descriptors to work.
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109 static uint8_t send[7];
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110 send[0] = cmd | 0x40;
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111 send[1] = param >> 24;
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112 send[2] = param >> 16;
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113 send[3] = param >> 8;
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115 if (unlikely(useCRC))
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117 send[5] = (sdCrc7(send, 5, 0) << 1) | 1;
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121 send[5] = 1; // stop bit
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123 send[6] = 0xFF; // Result code or stuff byte.
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125 static uint8_t dmaRxTd = CY_DMA_INVALID_TD;
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126 static uint8_t dmaTxTd = CY_DMA_INVALID_TD;
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127 if (unlikely(dmaRxTd == CY_DMA_INVALID_TD))
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129 dmaRxTd = CyDmaTdAllocate();
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130 dmaTxTd = CyDmaTdAllocate();
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131 CyDmaTdSetConfiguration(dmaTxTd, sizeof(send), CY_DMA_DISABLE_TD, TD_INC_SRC_ADR|SD_TX_DMA__TD_TERMOUT_EN);
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132 CyDmaTdSetAddress(dmaTxTd, LO16((uint32)&send), LO16((uint32)SDCard_TXDATA_PTR));
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133 CyDmaTdSetConfiguration(dmaRxTd, sizeof(send), CY_DMA_DISABLE_TD, SD_RX_DMA__TD_TERMOUT_EN);
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134 CyDmaTdSetAddress(dmaRxTd, LO16((uint32)SDCard_RXDATA_PTR), LO16((uint32)&discardBuffer));
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137 sdTxDMAComplete = 0;
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138 sdRxDMAComplete = 0;
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140 CyDmaChSetInitialTd(sdDMARxChan, dmaRxTd);
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141 CyDmaChSetInitialTd(sdDMATxChan, dmaTxTd);
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143 // Some Samsung cards enter a busy-state after single-sector reads.
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144 // But we also need to wait for R1B to complete from the multi-sector
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148 while (!(SDCard_ReadRxStatus() & SDCard_STS_RX_FIFO_NOT_EMPTY)) {}
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149 int busy = SDCard_ReadRxData() != 0xFF;
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150 if (unlikely(busy))
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152 while (sdSpiByte(0xFF) != 0xFF) {}
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156 // The DMA controller is a bit trigger-happy. It will retain
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157 // a drq request that was triggered while the channel was
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159 CyDmaClearPendingDrq(sdDMATxChan);
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160 CyDmaClearPendingDrq(sdDMARxChan);
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162 // There is no flow control, so we must ensure we can read the bytes
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163 // before we start transmitting
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164 CyDmaChEnable(sdDMARxChan, 1);
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165 CyDmaChEnable(sdDMATxChan, 1);
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167 while (!(sdTxDMAComplete && sdRxDMAComplete)) { __WFI(); }
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169 uint16_t response = discardBuffer;
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170 if (unlikely(cmd == SD_STOP_TRANSMISSION))
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172 // Stuff byte is required for this command only.
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173 // Part 1 Simplified standard 3.01
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174 // "The stop command has an execution delay due to the serial command
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176 response = sdSpiByte(0xFF);
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179 uint32_t start = getTime_ms();
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180 while ((response & 0x80) && likely(elapsedTime_ms(start) <= 200))
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182 response = sdSpiByte(0xFF);
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184 if (unlikely(use2byteResponse))
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186 response = (response << 8) | sdSpiByte(0xFF);
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192 static inline uint16_t sdCommandAndResponse(uint8_t cmd, uint32_t param)
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194 return sdDoCommand(cmd, param, 0, 0);
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197 static inline uint16_t sdCRCCommandAndResponse(uint8_t cmd, uint32_t param)
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199 return sdDoCommand(cmd, param, 1, 0);
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202 // Clear the sticky status bits on error.
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203 static void sdClearStatus()
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206 uint16_t r2 = sdDoCommand(SD_SEND_STATUS, 0, 1, 1);
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211 sdReadMultiSectorPrep()
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214 uint32 scsiLBA = (transfer.lba + transfer.currentBlock);
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217 scsiDev.target->cfg->sdSectorStart,
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218 scsiDev.target->liveCfg.bytesPerSector,
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223 sdLBA = sdLBA * SD_SECTOR_SIZE;
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225 v = sdCommandAndResponse(SD_READ_MULTIPLE_BLOCK, sdLBA);
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231 scsiDev.status = CHECK_CONDITION;
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232 scsiDev.target->sense.code = HARDWARE_ERROR;
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233 scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
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234 scsiDev.phase = STATUS;
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238 transfer.inProgress = 1;
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243 dmaReadSector(uint8_t* outputBuffer)
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245 // Wait for a start-block token.
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246 // Don't wait more than 200ms. The standard recommends 100ms.
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247 uint32_t start = getTime_ms();
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248 uint8_t token = sdSpiByte(0xFF);
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249 while (token != 0xFE && likely(elapsedTime_ms(start) <= 200))
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251 if (unlikely(token && ((token & 0xE0) == 0)))
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256 token = sdSpiByte(0xFF);
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258 if (unlikely(token != 0xFE))
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260 if (transfer.multiBlock)
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264 if (scsiDev.status != CHECK_CONDITION)
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266 scsiDev.status = CHECK_CONDITION;
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267 scsiDev.target->sense.code = HARDWARE_ERROR;
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268 scsiDev.target->sense.asc = UNRECOVERED_READ_ERROR;
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269 scsiDev.phase = STATUS;
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275 static uint8_t dmaRxTd[2] = { CY_DMA_INVALID_TD, CY_DMA_INVALID_TD};
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276 static uint8_t dmaTxTd = CY_DMA_INVALID_TD;
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277 if (unlikely(dmaRxTd[0] == CY_DMA_INVALID_TD))
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279 dmaRxTd[0] = CyDmaTdAllocate();
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280 dmaRxTd[1] = CyDmaTdAllocate();
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281 dmaTxTd = CyDmaTdAllocate();
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283 // Receive 512 bytes of data and then 2 bytes CRC.
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284 CyDmaTdSetConfiguration(dmaRxTd[0], SD_SECTOR_SIZE, dmaRxTd[1], TD_INC_DST_ADR);
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285 CyDmaTdSetConfiguration(dmaRxTd[1], 2, CY_DMA_DISABLE_TD, SD_RX_DMA__TD_TERMOUT_EN);
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286 CyDmaTdSetAddress(dmaRxTd[1], LO16((uint32)SDCard_RXDATA_PTR), LO16((uint32)&discardBuffer));
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288 CyDmaTdSetConfiguration(dmaTxTd, SD_SECTOR_SIZE + 2, CY_DMA_DISABLE_TD, SD_TX_DMA__TD_TERMOUT_EN);
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289 CyDmaTdSetAddress(dmaTxTd, LO16((uint32)&dummyBuffer), LO16((uint32)SDCard_TXDATA_PTR));
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292 CyDmaTdSetAddress(dmaRxTd[0], LO16((uint32)SDCard_RXDATA_PTR), LO16((uint32)outputBuffer));
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294 sdIOState = SD_DMA;
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295 sdTxDMAComplete = 0;
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296 sdRxDMAComplete = 0;
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298 // Re-loading the initial TD's here is very important, or else
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299 // we'll be re-using the last-used TD, which would be the last
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300 // in the chain (ie. CRC TD)
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301 CyDmaChSetInitialTd(sdDMARxChan, dmaRxTd[0]);
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302 CyDmaChSetInitialTd(sdDMATxChan, dmaTxTd);
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304 // The DMA controller is a bit trigger-happy. It will retain
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305 // a drq request that was triggered while the channel was
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307 CyDmaClearPendingDrq(sdDMATxChan);
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308 CyDmaClearPendingDrq(sdDMARxChan);
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310 // There is no flow control, so we must ensure we can read the bytes
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311 // before we start transmitting
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312 CyDmaChEnable(sdDMARxChan, 1);
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313 CyDmaChEnable(sdDMATxChan, 1);
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317 sdReadSectorDMAPoll()
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319 if (sdRxDMAComplete && sdTxDMAComplete)
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321 // DMA transfer is complete
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322 sdIOState = SD_IDLE;
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331 void sdReadSingleSectorDMA(uint32_t lba, uint8_t* outputBuffer)
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336 lba = lba * SD_SECTOR_SIZE;
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338 v = sdCommandAndResponse(SD_READ_SINGLE_BLOCK, lba);
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344 scsiDev.status = CHECK_CONDITION;
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345 scsiDev.target->sense.code = HARDWARE_ERROR;
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346 scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
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347 scsiDev.phase = STATUS;
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351 dmaReadSector(outputBuffer);
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356 sdReadMultiSectorDMA(uint8_t* outputBuffer)
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358 // Pre: sdReadMultiSectorPrep called.
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359 dmaReadSector(outputBuffer);
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363 void sdCompleteRead()
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365 if (unlikely(sdIOState != SD_IDLE))
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367 // Not much choice but to wait until we've completed the transfer.
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368 // Cancelling the transfer can't be done as we have no way to reset
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370 while (!sdReadSectorDMAPoll()) { /* spin */ }
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373 if (transfer.inProgress)
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375 transfer.inProgress = 0;
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376 uint8 r1b = sdCommandAndResponse(SD_STOP_TRANSMISSION, 0);
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380 scsiDev.status = CHECK_CONDITION;
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381 scsiDev.target->sense.code = HARDWARE_ERROR;
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382 scsiDev.target->sense.asc = UNRECOVERED_READ_ERROR;
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383 scsiDev.phase = STATUS;
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387 // R1b has an optional trailing "busy" signal, but we defer waiting on this.
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388 // The next call so sdCommandAndResponse will wait for the busy state to
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392 static void sdWaitWriteBusy()
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397 val = sdSpiByte(0xFF);
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398 } while (val != 0xFF);
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402 sdWriteMultiSectorDMA(uint8_t* outputBuffer)
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404 static uint8_t dmaRxTd[2] = { CY_DMA_INVALID_TD, CY_DMA_INVALID_TD};
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405 static uint8_t dmaTxTd[3] = { CY_DMA_INVALID_TD, CY_DMA_INVALID_TD, CY_DMA_INVALID_TD};
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406 if (unlikely(dmaRxTd[0] == CY_DMA_INVALID_TD))
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408 dmaRxTd[0] = CyDmaTdAllocate();
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409 dmaRxTd[1] = CyDmaTdAllocate();
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410 dmaTxTd[0] = CyDmaTdAllocate();
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411 dmaTxTd[1] = CyDmaTdAllocate();
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412 dmaTxTd[2] = CyDmaTdAllocate();
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414 // Transmit 512 bytes of data and then 2 bytes CRC, and then get the response byte
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415 // We need to do this without stopping the clock
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416 CyDmaTdSetConfiguration(dmaTxTd[0], 1, dmaTxTd[1], TD_INC_SRC_ADR);
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417 CyDmaTdSetAddress(dmaTxTd[0], LO16((uint32)&writeStartToken), LO16((uint32)SDCard_TXDATA_PTR));
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419 CyDmaTdSetConfiguration(dmaTxTd[1], SD_SECTOR_SIZE, dmaTxTd[2], TD_INC_SRC_ADR);
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421 CyDmaTdSetConfiguration(dmaTxTd[2], 2 + sizeof(writeResponseBuffer), CY_DMA_DISABLE_TD, SD_TX_DMA__TD_TERMOUT_EN);
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422 CyDmaTdSetAddress(dmaTxTd[2], LO16((uint32)&dummyBuffer), LO16((uint32)SDCard_TXDATA_PTR));
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424 CyDmaTdSetConfiguration(dmaRxTd[0], SD_SECTOR_SIZE + 3, dmaRxTd[1], 0);
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425 CyDmaTdSetAddress(dmaRxTd[0], LO16((uint32)SDCard_RXDATA_PTR), LO16((uint32)&discardBuffer));
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426 CyDmaTdSetConfiguration(dmaRxTd[1], sizeof(writeResponseBuffer), CY_DMA_DISABLE_TD, SD_RX_DMA__TD_TERMOUT_EN|TD_INC_DST_ADR);
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427 CyDmaTdSetAddress(dmaRxTd[1], LO16((uint32)SDCard_RXDATA_PTR), LO16((uint32)&writeResponseBuffer));
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429 CyDmaTdSetAddress(dmaTxTd[1], LO16((uint32)outputBuffer), LO16((uint32)SDCard_TXDATA_PTR));
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432 sdIOState = SD_DMA;
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433 // The DMA controller is a bit trigger-happy. It will retain
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434 // a drq request that was triggered while the channel was
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436 CyDmaClearPendingDrq(sdDMATxChan);
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437 CyDmaClearPendingDrq(sdDMARxChan);
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439 sdTxDMAComplete = 0;
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440 sdRxDMAComplete = 0;
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442 // Re-loading the initial TD's here is very important, or else
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443 // we'll be re-using the last-used TD, which would be the last
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444 // in the chain (ie. CRC TD)
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445 CyDmaChSetInitialTd(sdDMARxChan, dmaRxTd[0]);
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446 CyDmaChSetInitialTd(sdDMATxChan, dmaTxTd[0]);
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448 // There is no flow control, so we must ensure we can read the bytes
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449 // before we start transmitting
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450 CyDmaChEnable(sdDMARxChan, 1);
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451 CyDmaChEnable(sdDMATxChan, 1);
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455 sdWriteSectorDMAPoll(int sendStopToken)
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457 if (sdRxDMAComplete && sdTxDMAComplete)
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459 if (sdIOState == SD_DMA)
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461 // Retry a few times. The data token format is:
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467 dataToken = writeResponseBuffer[i]; // Response
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469 } while (((dataToken & 0x0101) != 1) && (i < sizeof(writeResponseBuffer)));
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471 // At this point we should either have an accepted token, or we'll
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472 // timeout and proceed into the error case below.
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473 if (unlikely(((dataToken & 0x1F) >> 1) != 0x2)) // Accepted.
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475 sdIOState = SD_IDLE;
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478 sdSpiByte(0xFD); // STOP TOKEN
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481 transfer.inProgress = 0;
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485 scsiDev.status = CHECK_CONDITION;
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486 scsiDev.target->sense.code = HARDWARE_ERROR;
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487 scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
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488 scsiDev.phase = STATUS;
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492 sdIOState = SD_ACCEPTED;
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496 if (sdIOState == SD_ACCEPTED)
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498 // Wait while the SD card is busy
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499 if (sdSpiByte(0xFF) == 0xFF)
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503 sdIOState = SD_BUSY;
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504 transfer.inProgress = 0;
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506 sdSpiByte(0xFD); // STOP TOKEN
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510 sdIOState = SD_IDLE;
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515 if (sdIOState == SD_BUSY)
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517 // Wait while the SD card is busy
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518 if (sdSpiByte(0xFF) == 0xFF)
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520 sdIOState = SD_IDLE;
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524 return sdIOState == SD_IDLE;
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532 void sdCompleteWrite()
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534 if (unlikely(sdIOState != SD_IDLE))
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536 // Not much choice but to wait until we've completed the transfer.
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537 // Cancelling the transfer can't be done as we have no way to reset
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539 while (!sdWriteSectorDMAPoll(1)) { /* spin */ }
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542 if (transfer.inProgress && likely(scsiDev.phase == DATA_OUT))
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544 uint16_t r2 = sdDoCommand(SD_SEND_STATUS, 0, 0, 1);
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548 scsiDev.status = CHECK_CONDITION;
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549 scsiDev.target->sense.code = HARDWARE_ERROR;
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550 scsiDev.target->sense.asc = WRITE_ERROR_AUTO_REALLOCATION_FAILED;
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551 scsiDev.phase = STATUS;
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554 transfer.inProgress = 0;
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558 // SD Version 2 (SDHC) support
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559 static int sendIfCond()
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565 // 11:8 Host voltage. 1 = 2.7-3.6V
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566 // 7:0 Echo bits. Ignore.
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567 uint8 status = sdCRCCommandAndResponse(SD_SEND_IF_COND, 0x000001AA);
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569 if (status == SD_R1_IDLE)
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573 // Read 32bit response. Should contain the same bytes that
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574 // we sent in the command parameter.
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581 else if (status & SD_R1_ILLEGAL)
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590 } while (--retries > 0);
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592 return retries > 0;
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595 static int sdOpCond()
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597 uint32_t start = getTime_ms();
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602 sdCRCCommandAndResponse(SD_APP_CMD, 0);
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603 // Host Capacity Support = 1 (SDHC/SDXC supported)
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604 status = sdCRCCommandAndResponse(SD_APP_SEND_OP_COND, 0x40000000);
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608 // Spec says to poll for 1 second.
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609 } while ((status != 0) && (elapsedTime_ms(start) < 1000));
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611 return status == 0;
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614 static int sdReadOCR()
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616 uint32_t start = getTime_ms();
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625 status = sdCRCCommandAndResponse(SD_READ_OCR, 0);
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626 if(status) { break; }
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628 for (i = 0; i < 4; ++i)
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630 buf[i] = sdSpiByte(0xFF);
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633 sdDev.ccs = (buf[0] & 0x40) ? 1 : 0;
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634 complete = (buf[0] & 0x80);
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636 } while (!status &&
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638 (elapsedTime_ms(start) < 1000));
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640 return (status == 0) && complete;
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643 static void sdReadCID()
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648 uint8 status = sdCRCCommandAndResponse(SD_SEND_CID, 0);
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649 if(status){return;}
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654 startToken = sdSpiByte(0xFF);
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655 } while(maxWait-- && (startToken != 0xFE));
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656 if (startToken != 0xFE) { return; }
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658 for (i = 0; i < 16; ++i)
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660 sdDev.cid[i] = sdSpiByte(0xFF);
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662 sdSpiByte(0xFF); // CRC
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663 sdSpiByte(0xFF); // CRC
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666 static int sdReadCSD()
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671 uint8 status = sdCRCCommandAndResponse(SD_SEND_CSD, 0);
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672 if(status){goto bad;}
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677 startToken = sdSpiByte(0xFF);
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678 } while(maxWait-- && (startToken != 0xFE));
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679 if (startToken != 0xFE) { goto bad; }
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681 for (i = 0; i < 16; ++i)
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683 sdDev.csd[i] = sdSpiByte(0xFF);
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685 sdSpiByte(0xFF); // CRC
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686 sdSpiByte(0xFF); // CRC
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688 if ((sdDev.csd[0] >> 6) == 0x00)
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691 // C_SIZE in bits [73:62]
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692 uint32 c_size = (((((uint32)sdDev.csd[6]) & 0x3) << 16) | (((uint32)sdDev.csd[7]) << 8) | sdDev.csd[8]) >> 6;
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693 uint32 c_mult = (((((uint32)sdDev.csd[9]) & 0x3) << 8) | ((uint32)sdDev.csd[0xa])) >> 7;
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694 uint32 sectorSize = sdDev.csd[5] & 0x0F;
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695 sdDev.capacity = ((c_size+1) * ((uint64)1 << (c_mult+2)) * ((uint64)1 << sectorSize)) / SD_SECTOR_SIZE;
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697 else if ((sdDev.csd[0] >> 6) == 0x01)
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700 // C_SIZE in bits [69:48]
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703 ((((uint32)sdDev.csd[7]) & 0x3F) << 16) |
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704 (((uint32)sdDev.csd[8]) << 8) |
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705 ((uint32)sdDev.csd[7]);
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706 sdDev.capacity = (c_size + 1) * 1024;
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718 static void sdInitDMA()
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720 // One-time init only.
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721 if (sdDMATxChan == CY_DMA_INVALID_CHANNEL)
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724 SD_TX_DMA_DmaInitialize(
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725 1, // Bytes per burst
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726 1, // request per burst
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727 HI16(CYDEV_SRAM_BASE),
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728 HI16(CYDEV_PERIPH_BASE)
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732 SD_RX_DMA_DmaInitialize(
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733 1, // Bytes per burst
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734 1, // request per burst
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735 HI16(CYDEV_PERIPH_BASE),
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736 HI16(CYDEV_SRAM_BASE)
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739 CyDmaChDisable(sdDMATxChan);
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740 CyDmaChDisable(sdDMARxChan);
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742 SD_RX_DMA_COMPLETE_StartEx(sdRxISR);
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743 SD_TX_DMA_COMPLETE_StartEx(sdTxISR);
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755 sdDev.capacity = 0;
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756 memset(sdDev.csd, 0, sizeof(sdDev.csd));
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757 memset(sdDev.cid, 0, sizeof(sdDev.cid));
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761 SD_CS_SetDriveMode(SD_CS_DM_STRONG);
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762 SD_CS_Write(1); // Set CS inactive (active low)
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764 // Set the SPI clock for 400kHz transfers
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765 // 25MHz / 400kHz approx factor of 63.
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766 // The register contains (divider - 1)
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767 uint16_t clkDiv25MHz = SD_Data_Clk_GetDividerRegister();
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768 SD_Data_Clk_SetDivider(((clkDiv25MHz + 1) * 63) - 1);
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769 // Wait for the clock to settle.
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772 SDCard_Start(); // Enable SPI hardware
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774 // Power on sequence. 74 clock cycles of a "1" while CS unasserted.
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775 for (i = 0; i < 10; ++i)
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780 SD_CS_Write(0); // Set CS active (active low)
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784 v = sdDoCommand(SD_GO_IDLE_STATE, 0, 1, 0);
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785 if(v != 1){goto bad;}
\r
788 if (!sendIfCond()) goto bad; // Sets V1 or V2 flag CMD8
\r
789 if (!sdOpCond()) goto bad; // ACMD41. Wait for init completes.
\r
790 if (!sdReadOCR()) goto bad; // CMD58. Get CCS flag. Only valid after init.
\r
792 // This command will be ignored if sdDev.ccs is set.
\r
793 // SDHC and SDXC are always 512bytes.
\r
794 v = sdCRCCommandAndResponse(SD_SET_BLOCKLEN, SD_SECTOR_SIZE); //Force sector size
\r
796 v = sdCRCCommandAndResponse(SD_CRC_ON_OFF, 0); //crc off
\r
799 // now set the sd card back to full speed.
\r
800 // The SD Card spec says we can run SPI @ 25MHz
\r
803 // We can't run at full-speed with the pullup resistors enabled.
\r
804 SD_MISO_SetDriveMode(SD_MISO_DM_DIG_HIZ);
\r
805 SD_MOSI_SetDriveMode(SD_MOSI_DM_STRONG);
\r
806 SD_SCK_SetDriveMode(SD_SCK_DM_STRONG);
\r
808 SD_Data_Clk_SetDivider(clkDiv25MHz);
\r
812 // Clear out rubbish data through clock change
\r
814 SDCard_ReadRxStatus();
\r
815 SDCard_ReadTxStatus();
\r
816 SDCard_ClearFIFO();
\r
818 if (!sdReadCSD()) goto bad;
\r
825 SD_Data_Clk_SetDivider(clkDiv25MHz); // Restore the clock for our next retry
\r
826 sdDev.capacity = 0;
\r
835 void sdWriteMultiSectorPrep()
\r
839 // Set the number of blocks to pre-erase by the multiple block write command
\r
840 // We don't care about the response - if the command is not accepted, writes
\r
841 // will just be a bit slower.
\r
842 // Max 22bit parameter.
\r
843 uint32_t sdBlocks =
\r
845 SDSectorsPerSCSISector(scsiDev.target->liveCfg.bytesPerSector);
\r
846 uint32 blocks = sdBlocks > 0x7FFFFF ? 0x7FFFFF : sdBlocks;
\r
847 sdCommandAndResponse(SD_APP_CMD, 0);
\r
848 sdCommandAndResponse(SD_APP_SET_WR_BLK_ERASE_COUNT, blocks);
\r
850 uint32 scsiLBA = (transfer.lba + transfer.currentBlock);
\r
853 scsiDev.target->cfg->sdSectorStart,
\r
854 scsiDev.target->liveCfg.bytesPerSector,
\r
858 sdLBA = sdLBA * SD_SECTOR_SIZE;
\r
860 v = sdCommandAndResponse(SD_WRITE_MULTIPLE_BLOCK, sdLBA);
\r
865 scsiDev.status = CHECK_CONDITION;
\r
866 scsiDev.target->sense.code = HARDWARE_ERROR;
\r
867 scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
\r
868 scsiDev.phase = STATUS;
\r
872 transfer.inProgress = 1;
\r
878 // Check if there's an SD card present.
\r
879 if ((scsiDev.phase == BUS_FREE) &&
\r
880 (sdIOState == SD_IDLE))
\r
882 // The CS line is pulled high by the SD card.
\r
883 // De-assert the line, and check if it's high.
\r
884 // This isn't foolproof as it'll be left floating without
\r
885 // an SD card. We can't use the built-in pull-down resistor as it will
\r
886 // overpower the SD pullup resistor.
\r
888 SD_CS_SetDriveMode(SD_CS_DM_DIG_HIZ);
\r
891 uint8_t cs = SD_CS_Read();
\r
892 SD_CS_SetDriveMode(SD_CS_DM_STRONG) ;
\r
894 if (cs && !(blockDev.state & DISK_PRESENT))
\r
896 static int firstInit = 1;
\r
903 blockDev.state |= DISK_PRESENT | DISK_INITIALISED;
\r
908 for (i = 0; i < MAX_SCSI_TARGETS; ++i)
\r
910 scsiDev.targets[i].unitAttention = PARAMETERS_CHANGED;
\r
916 else if (!cs && (blockDev.state & DISK_PRESENT))
\r
918 sdDev.capacity = 0;
\r
919 blockDev.state &= ~DISK_PRESENT;
\r
920 blockDev.state &= ~DISK_INITIALISED;
\r
922 for (i = 0; i < MAX_SCSI_TARGETS; ++i)
\r
924 scsiDev.targets[i].unitAttention = PARAMETERS_CHANGED;
\r
930 #pragma GCC pop_options
\r