EMU EMAX 1/2 fixes.
[SCSI2SD-V6.git] / software / SCSI2SD / v4 / SCSI2SD.cydsn / Generated_Source / PSoC5 / cyfitter_cfg.c
1 /*******************************************************************************
2 * FILENAME: cyfitter_cfg.c
3 * PSoC Creator  3.1
4 *
5 * Description:
6 * This file is automatically generated by PSoC Creator with device 
7 * initialization code.  Except for the user defined sections in
8 * CyClockStartupError(), this file should not be modified.
9 *
10 ********************************************************************************
11 * Copyright 2013, Cypress Semiconductor Corporation.  All rights reserved.
12 * You may use this file only in accordance with the license, terms, conditions, 
13 * disclaimers, and limitations in the end user license agreement accompanying 
14 * the software package with which this file was provided.
15 ********************************************************************************/
16
17 #include <string.h>
18 #include <cytypes.h>
19 #include <cydevice_trm.h>
20 #include <cyfitter.h>
21 #include <CyLib.h>
22 #include <cyfitter_cfg.h>
23
24 #define CY_NEED_CYCLOCKSTARTUPERROR 1
25
26
27 #if defined(__GNUC__) || defined(__ARMCC_VERSION)
28     #define CYPACKED 
29     #define CYPACKED_ATTR __attribute__ ((packed))
30     #define CYALIGNED __attribute__ ((aligned))
31     #define CY_CFG_UNUSED __attribute__ ((unused))
32     #define CY_CFG_SECTION __attribute__ ((section(".psocinit")))
33     
34     #if defined(__ARMCC_VERSION)
35         #define CY_CFG_MEMORY_BARRIER() __memory_changed()
36     #else
37         #define CY_CFG_MEMORY_BARRIER() __sync_synchronize()
38     #endif
39     
40 #elif defined(__ICCARM__)
41     #include <intrinsics.h>
42
43     #define CYPACKED __packed
44     #define CYPACKED_ATTR 
45     #define CYALIGNED _Pragma("data_alignment=4")
46     #define CY_CFG_UNUSED _Pragma("diag_suppress=Pe177")
47     #define CY_CFG_SECTION _Pragma("location=\".psocinit\"")
48     
49     #define CY_CFG_MEMORY_BARRIER() __DMB()
50     
51 #else
52     #error Unsupported toolchain
53 #endif
54
55
56 CY_CFG_UNUSED
57 static void CYMEMZERO(void *s, size_t n);
58 CY_CFG_UNUSED
59 static void CYMEMZERO(void *s, size_t n)
60 {
61         (void)memset(s, 0, n);
62 }
63 CY_CFG_UNUSED
64 static void CYCONFIGCPY(void *dest, const void *src, size_t n);
65 CY_CFG_UNUSED
66 static void CYCONFIGCPY(void *dest, const void *src, size_t n)
67 {
68         (void)memcpy(dest, src, n);
69 }
70 CY_CFG_UNUSED
71 static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n);
72 CY_CFG_UNUSED
73 static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n)
74 {
75         (void)memcpy(dest, src, n);
76 }
77
78
79
80 /* Clock startup error codes                                                   */
81 #define CYCLOCKSTART_NO_ERROR    0u
82 #define CYCLOCKSTART_XTAL_ERROR  1u
83 #define CYCLOCKSTART_32KHZ_ERROR 2u
84 #define CYCLOCKSTART_PLL_ERROR   3u
85
86 #ifdef CY_NEED_CYCLOCKSTARTUPERROR
87 /*******************************************************************************
88 * Function Name: CyClockStartupError
89 ********************************************************************************
90 * Summary:
91 *  If an error is encountered during clock configuration (crystal startup error,
92 *  PLL lock error, etc.), the system will end up here.  Unless reimplemented by
93 *  the customer, this function will stop in an infinite loop.
94 *
95 * Parameters:
96 *   void
97 *
98 * Return:
99 *   void
100 *
101 *******************************************************************************/
102 CY_CFG_UNUSED
103 static void CyClockStartupError(uint8 errorCode);
104 CY_CFG_UNUSED
105 static void CyClockStartupError(uint8 errorCode)
106 {
107     /* To remove the compiler warning if errorCode not used.                */
108     errorCode = errorCode;
109
110     /* `#START CyClockStartupError` */
111
112     /* If we have a clock startup error (bad MHz crystal, PLL lock, etc.),  */
113     /* we will end up here to allow the customer to implement something to  */
114     /* deal with the clock condition.                                       */
115
116     /* `#END` */
117
118     /* If nothing else, stop here since the clocks have not started         */
119     /* correctly.                                                           */
120     while(1) {}
121 }
122 #endif
123
124 #define CY_CFG_BASE_ADDR_COUNT 40u
125 CYPACKED typedef struct
126 {
127         uint8 offset;
128         uint8 value;
129 } CYPACKED_ATTR cy_cfg_addrvalue_t;
130
131
132
133 /*******************************************************************************
134 * Function Name: cfg_write_bytes32
135 ********************************************************************************
136 * Summary:
137 *  This function is used for setting up the chip configuration areas that
138 *  contain relatively sparse data.
139 *
140 * Parameters:
141 *   void
142 *
143 * Return:
144 *   void
145 *
146 *******************************************************************************/
147 static void cfg_write_bytes32(const uint32 addr_table[], const cy_cfg_addrvalue_t data_table[]);
148 static void cfg_write_bytes32(const uint32 addr_table[], const cy_cfg_addrvalue_t data_table[])
149 {
150         /* For 32-bit little-endian architectures */
151         uint32 i, j = 0u;
152         for (i = 0u; i < CY_CFG_BASE_ADDR_COUNT; i++)
153         {
154                 uint32 baseAddr = addr_table[i];
155                 uint8 count = (uint8)baseAddr;
156                 baseAddr &= 0xFFFFFF00u;
157                 while (count != 0u)
158                 {
159                         CY_SET_XTND_REG8((void CYFAR *)(baseAddr + data_table[j].offset), data_table[j].value);
160                         j++;
161                         count--;
162                 }
163         }
164 }
165
166 /*******************************************************************************
167 * Function Name: ClockSetup
168 ********************************************************************************
169 *
170 * Summary:
171 *  Performs the initialization of all of the clocks in the device based on the
172 *  settings in the Clock tab of the DWR.  This includes enabling the requested
173 *  clocks and setting the necessary dividers to produce the desired frequency. 
174 *
175 * Parameters:
176 *  void
177 *
178 * Return:
179 *  void
180 *
181 *******************************************************************************/
182 static void ClockSetup(void);
183 static void ClockSetup(void)
184 {
185         uint32 timeout;
186         uint8 pllLock;
187
188
189         /* Configure Digital Clocks based on settings from Clock DWR */
190         CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_DCFG0_CFG0), 0x0000u);
191         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_DCFG0_CFG0 + 0x2u), 0x58u);
192         CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_DCFG1_CFG0), 0x0000u);
193         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_DCFG1_CFG0 + 0x2u), 0x58u);
194         CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_DCFG2_CFG0), 0x0017u);
195         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_DCFG2_CFG0 + 0x2u), 0x19u);
196
197         /* Configure ILO based on settings from Clock DWR */
198         CY_SET_XTND_REG8((void CYFAR *)(CYREG_SLOWCLK_ILO_CR0), 0x06u);
199
200         /* Configure IMO based on settings from Clock DWR */
201         CY_SET_XTND_REG8((void CYFAR *)(CYREG_FASTCLK_IMO_CR), 0x52u);
202         CY_SET_XTND_REG8((void CYFAR *)(CYREG_IMO_TR1), (CY_GET_XTND_REG8((void CYFAR *)CYREG_FLSHID_CUST_TABLES_IMO_USB)));
203
204         /* Configure PLL based on settings from Clock DWR */
205         CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_P), 0x0B19u);
206         CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_CFG0), 0x1251u);
207         /* Wait up to 250us for the PLL to lock */
208         pllLock = 0u;
209         for (timeout = 250u / 10u; (timeout > 0u) && (pllLock != 0x03u); timeout--)
210         { 
211                 pllLock = 0x03u & ((uint8)((uint8)pllLock << 1) | ((CY_GET_XTND_REG8((void CYFAR *)CYREG_FASTCLK_PLL_SR) & 0x01u) >> 0));
212                 CyDelayCycles(10u * 48u); /* Delay 10us based on 48MHz clock */
213         }
214         /* If we ran out of time the PLL didn't lock so go to the error function */
215         if (timeout == 0u)
216         {
217                 CyClockStartupError(CYCLOCKSTART_PLL_ERROR);
218         }
219
220         /* Configure Bus/Master Clock based on settings from Clock DWR */
221         CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x0100u);
222         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x07u);
223         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG0), 0x00u);
224         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG2), 0x48u);
225         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x00u);
226
227         /* Configure USB Clock based on settings from Clock DWR */
228         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_UCFG), 0x00u);
229         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_LD), 0x02u);
230
231         CY_SET_XTND_REG8((void CYFAR *)(CYREG_PM_ACT_CFG2), ((CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG2) | 0x07u)));
232 }
233
234
235 /* Analog API Functions */
236
237
238 /*******************************************************************************
239 * Function Name: AnalogSetDefault
240 ********************************************************************************
241 *
242 * Summary:
243 *  Sets up the analog portions of the chip to default values based on chip
244 *  configuration options from the project.
245 *
246 * Parameters:
247 *  void
248 *
249 * Return:
250 *  void
251 *
252 *******************************************************************************/
253 static void AnalogSetDefault(void);
254 static void AnalogSetDefault(void)
255 {
256         uint8 bg_xover_inl_trim = CY_GET_XTND_REG8((void CYFAR *)(CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM + 1u));
257         CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT0), (bg_xover_inl_trim & 0x07u));
258         CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT1), ((bg_xover_inl_trim >> 4) & 0x0Fu));
259         CY_SET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0, 0x44u);
260 }
261
262
263 /*******************************************************************************
264 * Function Name: SetAnalogRoutingPumps
265 ********************************************************************************
266 *
267 * Summary:
268 * Enables or disables the analog pumps feeding analog routing switches.
269 * Intended to be called at startup, based on the Vdda system configuration;
270 * may be called during operation when the user informs us that the Vdda voltage
271 * crossed the pump threshold.
272 *
273 * Parameters:
274 *  enabled - 1 to enable the pumps, 0 to disable the pumps
275 *
276 * Return:
277 *  void
278 *
279 *******************************************************************************/
280 void SetAnalogRoutingPumps(uint8 enabled)
281 {
282         uint8 regValue = CY_GET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0);
283         if (enabled != 0u)
284         {
285                 regValue |= 0x00u;
286         }
287         else
288         {
289                 regValue &= (uint8)~0x00u;
290         }
291         CY_SET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0, regValue);
292 }
293
294 #define CY_AMUX_UNUSED CYREG_BOOST_SR
295
296
297 /*******************************************************************************
298 * Function Name: cyfitter_cfg
299 ********************************************************************************
300 * Summary:
301 *  This function is called by the start-up code for the selected device. It
302 *  performs all of the necessary device configuration based on the design
303 *  settings.  This includes settings from the Design Wide Resources (DWR) such
304 *  as Clocks and Pins as well as any component configuration that is necessary.
305 *
306 * Parameters:  
307 *   void
308 *
309 * Return:
310 *   void
311 *
312 *******************************************************************************/
313
314 void cyfitter_cfg(void)
315 {
316         /* IOPINS0_0 Address: CYREG_PRT0_DR Size (bytes): 10 */
317         static const uint8 CYCODE BS_IOPINS0_0_VAL[] = {
318                 0x02u, 0x00u, 0x31u, 0xCCu, 0xCEu, 0x00u, 0x4Cu, 0x00u, 0x00u, 0x01u};
319
320         /* IOPINS0_7 Address: CYREG_PRT12_DM0 Size (bytes): 8 */
321         static const uint8 CYCODE BS_IOPINS0_7_VAL[] = {
322                 0x30u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};
323
324         /* IOPINS1_7 Address: CYREG_PRT12_DM0 + 0x00000009u Size (bytes): 5 */
325         static const uint8 CYCODE BS_IOPINS1_7_VAL[] = {
326                 0x00u, 0x00u, 0x00u, 0x00u, 0x10u};
327
328         /* IOPINS0_8 Address: CYREG_PRT15_DR Size (bytes): 10 */
329         static const uint8 CYCODE BS_IOPINS0_8_VAL[] = {
330                 0x00u, 0x00u, 0x00u, 0x30u, 0x30u, 0x00u, 0x20u, 0x00u, 0xC0u, 0x00u};
331
332         /* IOPINS0_2 Address: CYREG_PRT2_DM0 Size (bytes): 8 */
333         static const uint8 CYCODE BS_IOPINS0_2_VAL[] = {
334                 0x33u, 0xCCu, 0xCCu, 0x00u, 0xCCu, 0x00u, 0x00u, 0x01u};
335
336         /* IOPINS0_3 Address: CYREG_PRT3_DR Size (bytes): 10 */
337         static const uint8 CYCODE BS_IOPINS0_3_VAL[] = {
338                 0x10u, 0x00u, 0x22u, 0x1Cu, 0x1Cu, 0x00u, 0x0Cu, 0x00u, 0x00u, 0x01u};
339
340         /* IOPINS0_4 Address: CYREG_PRT4_DM0 Size (bytes): 8 */
341         static const uint8 CYCODE BS_IOPINS0_4_VAL[] = {
342                 0xCCu, 0x30u, 0x30u, 0x00u, 0x10u, 0x00u, 0x00u, 0x01u};
343
344         /* IOPINS0_5 Address: CYREG_PRT5_DM0 Size (bytes): 8 */
345         static const uint8 CYCODE BS_IOPINS0_5_VAL[] = {
346                 0x0Cu, 0x03u, 0x03u, 0x00u, 0x03u, 0x00u, 0x00u, 0x01u};
347
348         /* IOPINS0_6 Address: CYREG_PRT6_DM0 Size (bytes): 8 */
349         static const uint8 CYCODE BS_IOPINS0_6_VAL[] = {
350                 0xCCu, 0x33u, 0x33u, 0x00u, 0x30u, 0x00u, 0x00u, 0x01u};
351
352         /* PHUB_CFGMEM1 Address: CYREG_PHUB_CFGMEM1_CFG0 Size (bytes): 4 */
353         static const uint8 CYCODE BS_PHUB_CFGMEM1_VAL[] = {
354                 0x00u, 0x01u, 0x00u, 0x00u};
355
356         /* PHUB_CFGMEM2 Address: CYREG_PHUB_CFGMEM2_CFG0 Size (bytes): 4 */
357         static const uint8 CYCODE BS_PHUB_CFGMEM2_VAL[] = {
358                 0x00u, 0x02u, 0x00u, 0x00u};
359
360         /* PHUB_CFGMEM3 Address: CYREG_PHUB_CFGMEM3_CFG0 Size (bytes): 4 */
361         static const uint8 CYCODE BS_PHUB_CFGMEM3_VAL[] = {
362                 0x00u, 0x03u, 0x00u, 0x00u};
363
364 #ifdef CYGlobalIntDisable
365         /* Disable interrupts by default. Let user enable if/when they want. */
366         CYGlobalIntDisable
367 #endif
368
369
370         /* Set Flash Cycles based on max possible frequency in case a glitch occurs during ClockSetup(). */
371         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x01u : 0x00u));
372         /* Setup clocks based on selections from Clock DWR */
373         ClockSetup();
374         /* Set Flash Cycles based on newly configured 50.00MHz Bus Clock. */
375         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0xC1u : 0xC0u));
376         /* Enable/Disable Debug functionality based on settings from System DWR */
377         CY_SET_XTND_REG8((void CYFAR *)CYREG_MLOGIC_DEBUG, (CY_GET_XTND_REG8((void CYFAR *)CYREG_MLOGIC_DEBUG) | 0x04u));
378
379         {
380                 static const uint32 CYCODE cy_cfg_addr_table[] = {
381                         0x40004501u, /* Base address: 0x40004500 Count: 1 */
382                         0x40004F02u, /* Base address: 0x40004F00 Count: 2 */
383                         0x40005210u, /* Base address: 0x40005200 Count: 16 */
384                         0x40006401u, /* Base address: 0x40006400 Count: 1 */
385                         0x40006501u, /* Base address: 0x40006500 Count: 1 */
386                         0x40010041u, /* Base address: 0x40010000 Count: 65 */
387                         0x40010141u, /* Base address: 0x40010100 Count: 65 */
388                         0x40010259u, /* Base address: 0x40010200 Count: 89 */
389                         0x40010351u, /* Base address: 0x40010300 Count: 81 */
390                         0x4001044Eu, /* Base address: 0x40010400 Count: 78 */
391                         0x4001054Bu, /* Base address: 0x40010500 Count: 75 */
392                         0x40010716u, /* Base address: 0x40010700 Count: 22 */
393                         0x40010849u, /* Base address: 0x40010800 Count: 73 */
394                         0x40010950u, /* Base address: 0x40010900 Count: 80 */
395                         0x40010A3Cu, /* Base address: 0x40010A00 Count: 60 */
396                         0x40010B5Bu, /* Base address: 0x40010B00 Count: 91 */
397                         0x40010C4Bu, /* Base address: 0x40010C00 Count: 75 */
398                         0x40010D55u, /* Base address: 0x40010D00 Count: 85 */
399                         0x40010E53u, /* Base address: 0x40010E00 Count: 83 */
400                         0x40010F3Fu, /* Base address: 0x40010F00 Count: 63 */
401                         0x40011505u, /* Base address: 0x40011500 Count: 5 */
402                         0x40011711u, /* Base address: 0x40011700 Count: 17 */
403                         0x4001181Cu, /* Base address: 0x40011800 Count: 28 */
404                         0x40011950u, /* Base address: 0x40011900 Count: 80 */
405                         0x40011A50u, /* Base address: 0x40011A00 Count: 80 */
406                         0x40011B4Bu, /* Base address: 0x40011B00 Count: 75 */
407                         0x40014018u, /* Base address: 0x40014000 Count: 24 */
408                         0x40014117u, /* Base address: 0x40014100 Count: 23 */
409                         0x40014218u, /* Base address: 0x40014200 Count: 24 */
410                         0x4001430Bu, /* Base address: 0x40014300 Count: 11 */
411                         0x40014410u, /* Base address: 0x40014400 Count: 16 */
412                         0x4001451Au, /* Base address: 0x40014500 Count: 26 */
413                         0x4001460Eu, /* Base address: 0x40014600 Count: 14 */
414                         0x40014715u, /* Base address: 0x40014700 Count: 21 */
415                         0x40014805u, /* Base address: 0x40014800 Count: 5 */
416                         0x4001490Cu, /* Base address: 0x40014900 Count: 12 */
417                         0x40014C07u, /* Base address: 0x40014C00 Count: 7 */
418                         0x40014D0Cu, /* Base address: 0x40014D00 Count: 12 */
419                         0x40015004u, /* Base address: 0x40015000 Count: 4 */
420                         0x40015104u, /* Base address: 0x40015100 Count: 4 */
421                 };
422
423                 static const cy_cfg_addrvalue_t CYCODE cy_cfg_data_table[] = {
424                         {0x7Eu, 0x02u},
425                         {0x01u, 0x20u},
426                         {0x0Au, 0x4Bu},
427                         {0x00u, 0x04u},
428                         {0x01u, 0x48u},
429                         {0x04u, 0x31u},
430                         {0x10u, 0x88u},
431                         {0x11u, 0x84u},
432                         {0x18u, 0x08u},
433                         {0x19u, 0x04u},
434                         {0x1Cu, 0x30u},
435                         {0x20u, 0x10u},
436                         {0x21u, 0x10u},
437                         {0x24u, 0x44u},
438                         {0x29u, 0x01u},
439                         {0x30u, 0x20u},
440                         {0x31u, 0x30u},
441                         {0x78u, 0x20u},
442                         {0x7Cu, 0x40u},
443                         {0x2Bu, 0x02u},
444                         {0x89u, 0x0Fu},
445                         {0x01u, 0x02u},
446                         {0x02u, 0x02u},
447                         {0x03u, 0x11u},
448                         {0x05u, 0x80u},
449                         {0x07u, 0x40u},
450                         {0x09u, 0x01u},
451                         {0x0Bu, 0x02u},
452                         {0x0Du, 0x40u},
453                         {0x0Fu, 0x80u},
454                         {0x11u, 0x13u},
455                         {0x12u, 0x04u},
456                         {0x13u, 0x2Cu},
457                         {0x15u, 0x80u},
458                         {0x17u, 0x40u},
459                         {0x19u, 0x80u},
460                         {0x1Au, 0x01u},
461                         {0x1Bu, 0x40u},
462                         {0x1Du, 0x80u},
463                         {0x1Eu, 0x08u},
464                         {0x1Fu, 0x40u},
465                         {0x21u, 0x04u},
466                         {0x23u, 0x08u},
467                         {0x29u, 0x08u},
468                         {0x2Bu, 0x24u},
469                         {0x30u, 0x01u},
470                         {0x31u, 0xC0u},
471                         {0x32u, 0x04u},
472                         {0x33u, 0x30u},
473                         {0x34u, 0x08u},
474                         {0x35u, 0x0Fu},
475                         {0x36u, 0x02u},
476                         {0x3Bu, 0x02u},
477                         {0x3Fu, 0x14u},
478                         {0x56u, 0x08u},
479                         {0x58u, 0x04u},
480                         {0x59u, 0x04u},
481                         {0x5Bu, 0x04u},
482                         {0x5Cu, 0x99u},
483                         {0x5Du, 0x90u},
484                         {0x5Fu, 0x01u},
485                         {0x83u, 0x04u},
486                         {0x86u, 0x70u},
487                         {0x8Au, 0x08u},
488                         {0x8Cu, 0x99u},
489                         {0x8Eu, 0x22u},
490                         {0x8Fu, 0x01u},
491                         {0x93u, 0x08u},
492                         {0x98u, 0xAAu},
493                         {0x9Au, 0x55u},
494                         {0x9Bu, 0x02u},
495                         {0x9Eu, 0x07u},
496                         {0xA2u, 0x80u},
497                         {0xACu, 0x44u},
498                         {0xAEu, 0x88u},
499                         {0xB1u, 0x02u},
500                         {0xB3u, 0x01u},
501                         {0xB4u, 0xF0u},
502                         {0xB5u, 0x08u},
503                         {0xB6u, 0x0Fu},
504                         {0xB7u, 0x04u},
505                         {0xD8u, 0x04u},
506                         {0xD9u, 0x04u},
507                         {0xDBu, 0x04u},
508                         {0xDCu, 0x91u},
509                         {0xDFu, 0x01u},
510                         {0x03u, 0x40u},
511                         {0x04u, 0x04u},
512                         {0x05u, 0x10u},
513                         {0x07u, 0x01u},
514                         {0x0Au, 0x89u},
515                         {0x0Cu, 0x80u},
516                         {0x0Eu, 0x02u},
517                         {0x0Fu, 0x04u},
518                         {0x15u, 0x02u},
519                         {0x16u, 0x01u},
520                         {0x19u, 0x80u},
521                         {0x1Au, 0xA8u},
522                         {0x1Cu, 0x04u},
523                         {0x1Eu, 0x02u},
524                         {0x1Fu, 0x10u},
525                         {0x20u, 0x08u},
526                         {0x21u, 0x18u},
527                         {0x22u, 0x02u},
528                         {0x23u, 0x40u},
529                         {0x24u, 0x80u},
530                         {0x25u, 0x64u},
531                         {0x26u, 0x20u},
532                         {0x27u, 0x50u},
533                         {0x28u, 0x04u},
534                         {0x2Bu, 0x40u},
535                         {0x2Du, 0x01u},
536                         {0x2Eu, 0x02u},
537                         {0x30u, 0x02u},
538                         {0x32u, 0x54u},
539                         {0x34u, 0x02u},
540                         {0x36u, 0x20u},
541                         {0x39u, 0x08u},
542                         {0x3Au, 0x60u},
543                         {0x3Bu, 0x41u},
544                         {0x3Du, 0x80u},
545                         {0x3Fu, 0x02u},
546                         {0x58u, 0x80u},
547                         {0x5Du, 0x01u},
548                         {0x5Eu, 0x40u},
549                         {0x5Fu, 0x28u},
550                         {0x63u, 0x02u},
551                         {0x66u, 0x40u},
552                         {0x68u, 0x03u},
553                         {0x6Du, 0x04u},
554                         {0x6Fu, 0x2Au},
555                         {0x81u, 0x28u},
556                         {0x82u, 0x01u},
557                         {0x87u, 0x0Au},
558                         {0x88u, 0x01u},
559                         {0x89u, 0x10u},
560                         {0x8Au, 0x20u},
561                         {0x8Bu, 0x10u},
562                         {0x8Cu, 0xC0u},
563                         {0x8Eu, 0x02u},
564                         {0x8Fu, 0x40u},
565                         {0xC0u, 0xE8u},
566                         {0xC2u, 0xCBu},
567                         {0xC4u, 0x90u},
568                         {0xCAu, 0x05u},
569                         {0xCCu, 0xAFu},
570                         {0xCEu, 0x9Fu},
571                         {0xD6u, 0xF8u},
572                         {0xD8u, 0x18u},
573                         {0xE0u, 0x05u},
574                         {0xE4u, 0x01u},
575                         {0x00u, 0x08u},
576                         {0x01u, 0x04u},
577                         {0x02u, 0x04u},
578                         {0x03u, 0x02u},
579                         {0x05u, 0x04u},
580                         {0x06u, 0x01u},
581                         {0x07u, 0x02u},
582                         {0x09u, 0x08u},
583                         {0x0Bu, 0x10u},
584                         {0x0Du, 0x04u},
585                         {0x0Fu, 0x02u},
586                         {0x10u, 0x04u},
587                         {0x11u, 0x10u},
588                         {0x12u, 0x08u},
589                         {0x13u, 0x08u},
590                         {0x15u, 0x10u},
591                         {0x17u, 0x08u},
592                         {0x19u, 0x02u},
593                         {0x1Au, 0x02u},
594                         {0x1Bu, 0x04u},
595                         {0x1Du, 0x10u},
596                         {0x1Fu, 0x08u},
597                         {0x20u, 0x08u},
598                         {0x22u, 0x04u},
599                         {0x24u, 0x08u},
600                         {0x25u, 0x04u},
601                         {0x26u, 0x04u},
602                         {0x27u, 0x02u},
603                         {0x28u, 0x08u},
604                         {0x2Au, 0x04u},
605                         {0x2Bu, 0x01u},
606                         {0x2Du, 0x10u},
607                         {0x2Fu, 0x08u},
608                         {0x30u, 0x0Cu},
609                         {0x33u, 0x06u},
610                         {0x34u, 0x01u},
611                         {0x35u, 0x18u},
612                         {0x36u, 0x02u},
613                         {0x37u, 0x01u},
614                         {0x3Au, 0x02u},
615                         {0x3Bu, 0x28u},
616                         {0x56u, 0x08u},
617                         {0x58u, 0x04u},
618                         {0x59u, 0x04u},
619                         {0x5Bu, 0x04u},
620                         {0x5Cu, 0x99u},
621                         {0x5Du, 0x90u},
622                         {0x5Fu, 0x01u},
623                         {0x80u, 0x90u},
624                         {0x82u, 0x60u},
625                         {0x84u, 0xFFu},
626                         {0x85u, 0xFFu},
627                         {0x88u, 0x50u},
628                         {0x8Au, 0xA0u},
629                         {0x8Bu, 0xFFu},
630                         {0x90u, 0xFFu},
631                         {0x91u, 0xFFu},
632                         {0x94u, 0x03u},
633                         {0x95u, 0x0Fu},
634                         {0x96u, 0x0Cu},
635                         {0x97u, 0xF0u},
636                         {0x98u, 0x05u},
637                         {0x9Au, 0x0Au},
638                         {0x9Du, 0x33u},
639                         {0x9Fu, 0xCCu},
640                         {0xA0u, 0x09u},
641                         {0xA2u, 0x06u},
642                         {0xA3u, 0xFFu},
643                         {0xA5u, 0x96u},
644                         {0xA6u, 0xFFu},
645                         {0xA7u, 0x69u},
646                         {0xA8u, 0x30u},
647                         {0xA9u, 0x55u},
648                         {0xAAu, 0xC0u},
649                         {0xABu, 0xAAu},
650                         {0xACu, 0x0Fu},
651                         {0xAEu, 0xF0u},
652                         {0xAFu, 0xFFu},
653                         {0xB2u, 0xFFu},
654                         {0xB3u, 0xFFu},
655                         {0xBBu, 0x08u},
656                         {0xBEu, 0x04u},
657                         {0xD6u, 0x08u},
658                         {0xD8u, 0x04u},
659                         {0xD9u, 0x04u},
660                         {0xDBu, 0x04u},
661                         {0xDCu, 0x10u},
662                         {0xDDu, 0x90u},
663                         {0xDFu, 0x01u},
664                         {0x00u, 0x08u},
665                         {0x02u, 0x40u},
666                         {0x03u, 0x04u},
667                         {0x05u, 0x01u},
668                         {0x07u, 0x10u},
669                         {0x09u, 0x20u},
670                         {0x0Bu, 0xA0u},
671                         {0x0Eu, 0x48u},
672                         {0x10u, 0x82u},
673                         {0x11u, 0x04u},
674                         {0x12u, 0x04u},
675                         {0x15u, 0x10u},
676                         {0x16u, 0x20u},
677                         {0x17u, 0x02u},
678                         {0x18u, 0x10u},
679                         {0x1Eu, 0x46u},
680                         {0x22u, 0x08u},
681                         {0x25u, 0x10u},
682                         {0x27u, 0x2Au},
683                         {0x28u, 0x08u},
684                         {0x29u, 0x08u},
685                         {0x2Au, 0x82u},
686                         {0x2Du, 0x10u},
687                         {0x2Eu, 0x04u},
688                         {0x2Fu, 0x09u},
689                         {0x32u, 0x8Au},
690                         {0x35u, 0x40u},
691                         {0x36u, 0x05u},
692                         {0x37u, 0x20u},
693                         {0x38u, 0x20u},
694                         {0x3Bu, 0x04u},
695                         {0x3Du, 0xA8u},
696                         {0x3Fu, 0x02u},
697                         {0x5Bu, 0x40u},
698                         {0x5Du, 0x80u},
699                         {0x62u, 0x80u},
700                         {0x64u, 0x03u},
701                         {0x80u, 0x10u},
702                         {0x81u, 0x18u},
703                         {0x82u, 0x01u},
704                         {0x83u, 0x50u},
705                         {0x88u, 0x01u},
706                         {0x8Eu, 0x10u},
707                         {0x90u, 0x04u},
708                         {0x91u, 0x24u},
709                         {0x93u, 0x20u},
710                         {0x95u, 0x02u},
711                         {0x96u, 0x40u},
712                         {0x97u, 0x04u},
713                         {0x98u, 0x10u},
714                         {0x9Au, 0x02u},
715                         {0x9Bu, 0x10u},
716                         {0x9Cu, 0x06u},
717                         {0x9Du, 0x10u},
718                         {0x9Eu, 0x01u},
719                         {0x9Fu, 0x29u},
720                         {0xA0u, 0x86u},
721                         {0xA1u, 0x45u},
722                         {0xA2u, 0x02u},
723                         {0xA3u, 0x01u},
724                         {0xA9u, 0x81u},
725                         {0xABu, 0x01u},
726                         {0xADu, 0x04u},
727                         {0xAEu, 0x01u},
728                         {0xB0u, 0x10u},
729                         {0xB2u, 0x02u},
730                         {0xB3u, 0x20u},
731                         {0xC0u, 0x3Eu},
732                         {0xC2u, 0x5Eu},
733                         {0xC4u, 0x7Fu},
734                         {0xCAu, 0x7Fu},
735                         {0xCCu, 0xFBu},
736                         {0xCEu, 0xF6u},
737                         {0xD6u, 0x18u},
738                         {0xD8u, 0x18u},
739                         {0xE0u, 0x01u},
740                         {0xE2u, 0x24u},
741                         {0xE6u, 0x05u},
742                         {0xE8u, 0x04u},
743                         {0xEAu, 0x09u},
744                         {0xEEu, 0x01u},
745                         {0x00u, 0x03u},
746                         {0x02u, 0x0Cu},
747                         {0x04u, 0x0Fu},
748                         {0x05u, 0x03u},
749                         {0x07u, 0x0Cu},
750                         {0x08u, 0x80u},
751                         {0x0Bu, 0xFFu},
752                         {0x0Cu, 0x80u},
753                         {0x0Du, 0xFFu},
754                         {0x10u, 0x10u},
755                         {0x11u, 0x0Fu},
756                         {0x12u, 0x2Fu},
757                         {0x13u, 0xF0u},
758                         {0x14u, 0x20u},
759                         {0x15u, 0x50u},
760                         {0x16u, 0x4Fu},
761                         {0x17u, 0xA0u},
762                         {0x19u, 0x05u},
763                         {0x1Au, 0x70u},
764                         {0x1Bu, 0x0Au},
765                         {0x1Cu, 0x80u},
766                         {0x1Du, 0x06u},
767                         {0x1Fu, 0x09u},
768                         {0x20u, 0x05u},
769                         {0x22u, 0x0Au},
770                         {0x24u, 0x80u},
771                         {0x25u, 0x30u},
772                         {0x27u, 0xC0u},
773                         {0x28u, 0x06u},
774                         {0x2Au, 0x09u},
775                         {0x2Bu, 0xFFu},
776                         {0x2Cu, 0x40u},
777                         {0x2Du, 0x60u},
778                         {0x2Eu, 0x1Fu},
779                         {0x2Fu, 0x90u},
780                         {0x31u, 0xFFu},
781                         {0x32u, 0x80u},
782                         {0x34u, 0x7Fu},
783                         {0x38u, 0x08u},
784                         {0x3Eu, 0x04u},
785                         {0x3Fu, 0x01u},
786                         {0x54u, 0x01u},
787                         {0x58u, 0x04u},
788                         {0x59u, 0x04u},
789                         {0x5Bu, 0x04u},
790                         {0x5Cu, 0x01u},
791                         {0x5Du, 0x10u},
792                         {0x5Fu, 0x01u},
793                         {0x82u, 0x08u},
794                         {0x85u, 0xFFu},
795                         {0x89u, 0x55u},
796                         {0x8Bu, 0xAAu},
797                         {0x8Eu, 0x01u},
798                         {0x8Fu, 0xFFu},
799                         {0x91u, 0xFFu},
800                         {0x95u, 0x33u},
801                         {0x97u, 0xCCu},
802                         {0x9Du, 0x0Fu},
803                         {0x9Fu, 0xF0u},
804                         {0xA3u, 0xFFu},
805                         {0xA5u, 0x69u},
806                         {0xA6u, 0x04u},
807                         {0xA7u, 0x96u},
808                         {0xAEu, 0x02u},
809                         {0xAFu, 0xFFu},
810                         {0xB0u, 0x04u},
811                         {0xB1u, 0xFFu},
812                         {0xB2u, 0x08u},
813                         {0xB4u, 0x01u},
814                         {0xB6u, 0x02u},
815                         {0xBBu, 0x02u},
816                         {0xD6u, 0x08u},
817                         {0xD8u, 0x04u},
818                         {0xD9u, 0x04u},
819                         {0xDBu, 0x04u},
820                         {0xDCu, 0x19u},
821                         {0xDDu, 0x90u},
822                         {0xDFu, 0x01u},
823                         {0x00u, 0x10u},
824                         {0x01u, 0x84u},
825                         {0x02u, 0x10u},
826                         {0x03u, 0x40u},
827                         {0x05u, 0x41u},
828                         {0x09u, 0x0Au},
829                         {0x0Au, 0x0Au},
830                         {0x10u, 0x10u},
831                         {0x11u, 0x02u},
832                         {0x12u, 0x09u},
833                         {0x14u, 0x02u},
834                         {0x16u, 0x20u},
835                         {0x1Au, 0x28u},
836                         {0x1Du, 0x41u},
837                         {0x1Eu, 0x08u},
838                         {0x1Fu, 0x08u},
839                         {0x22u, 0x01u},
840                         {0x27u, 0x40u},
841                         {0x2Au, 0x54u},
842                         {0x2Du, 0x08u},
843                         {0x2Eu, 0x82u},
844                         {0x30u, 0x82u},
845                         {0x31u, 0x20u},
846                         {0x33u, 0x04u},
847                         {0x36u, 0x02u},
848                         {0x37u, 0x48u},
849                         {0x38u, 0x04u},
850                         {0x39u, 0xA0u},
851                         {0x3Bu, 0x80u},
852                         {0x3Fu, 0xA4u},
853                         {0x58u, 0x40u},
854                         {0x5Eu, 0x10u},
855                         {0x5Fu, 0x40u},
856                         {0x64u, 0x02u},
857                         {0x66u, 0x20u},
858                         {0x67u, 0x02u},
859                         {0x81u, 0x10u},
860                         {0x83u, 0x04u},
861                         {0x85u, 0x08u},
862                         {0x87u, 0x04u},
863                         {0x8Eu, 0x04u},
864                         {0x90u, 0x14u},
865                         {0x91u, 0x24u},
866                         {0x92u, 0x10u},
867                         {0x95u, 0x02u},
868                         {0x97u, 0x86u},
869                         {0x98u, 0x10u},
870                         {0x9Au, 0x03u},
871                         {0x9Cu, 0x0Cu},
872                         {0x9Du, 0x51u},
873                         {0x9Eu, 0xE4u},
874                         {0x9Fu, 0x05u},
875                         {0xA0u, 0x82u},
876                         {0xA1u, 0x01u},
877                         {0xA2u, 0x0Au},
878                         {0xA3u, 0x50u},
879                         {0xA5u, 0x20u},
880                         {0xA6u, 0x04u},
881                         {0xA7u, 0x08u},
882                         {0xABu, 0x40u},
883                         {0xADu, 0x04u},
884                         {0xB5u, 0x80u},
885                         {0xC0u, 0x9Fu},
886                         {0xC2u, 0x0Fu},
887                         {0xC4u, 0xAFu},
888                         {0xCAu, 0xDEu},
889                         {0xCCu, 0xDFu},
890                         {0xCEu, 0x7Eu},
891                         {0xD6u, 0x38u},
892                         {0xD8u, 0x30u},
893                         {0xE2u, 0x03u},
894                         {0xE6u, 0x0Du},
895                         {0xEAu, 0x09u},
896                         {0xECu, 0x40u},
897                         {0xEEu, 0x01u},
898                         {0x81u, 0x08u},
899                         {0x88u, 0x04u},
900                         {0x90u, 0x04u},
901                         {0x91u, 0x20u},
902                         {0x95u, 0x80u},
903                         {0x9Cu, 0x0Cu},
904                         {0x9Du, 0x88u},
905                         {0xA0u, 0x82u},
906                         {0xAAu, 0x10u},
907                         {0xADu, 0x03u},
908                         {0xAEu, 0x80u},
909                         {0xAFu, 0x09u},
910                         {0xB0u, 0x40u},
911                         {0xB2u, 0x44u},
912                         {0xB3u, 0x40u},
913                         {0xB5u, 0x20u},
914                         {0xE2u, 0x01u},
915                         {0xE6u, 0x64u},
916                         {0xE8u, 0x20u},
917                         {0xEAu, 0x4Au},
918                         {0xECu, 0x04u},
919                         {0xEEu, 0x22u},
920                         {0x06u, 0x02u},
921                         {0x09u, 0x50u},
922                         {0x0Bu, 0xA0u},
923                         {0x0Cu, 0x08u},
924                         {0x11u, 0x30u},
925                         {0x13u, 0xC0u},
926                         {0x15u, 0x60u},
927                         {0x17u, 0x90u},
928                         {0x19u, 0x06u},
929                         {0x1Bu, 0x09u},
930                         {0x24u, 0x04u},
931                         {0x25u, 0x03u},
932                         {0x27u, 0x0Cu},
933                         {0x28u, 0x01u},
934                         {0x29u, 0x0Fu},
935                         {0x2Au, 0x02u},
936                         {0x2Bu, 0xF0u},
937                         {0x2Du, 0x05u},
938                         {0x2Eu, 0x01u},
939                         {0x2Fu, 0x0Au},
940                         {0x30u, 0x03u},
941                         {0x31u, 0xFFu},
942                         {0x34u, 0x08u},
943                         {0x36u, 0x04u},
944                         {0x3Eu, 0x11u},
945                         {0x3Fu, 0x01u},
946                         {0x56u, 0x08u},
947                         {0x58u, 0x04u},
948                         {0x59u, 0x04u},
949                         {0x5Bu, 0x04u},
950                         {0x5Cu, 0x09u},
951                         {0x5Du, 0x90u},
952                         {0x5Fu, 0x01u},
953                         {0x83u, 0x01u},
954                         {0x84u, 0x10u},
955                         {0x86u, 0x0Cu},
956                         {0x87u, 0x20u},
957                         {0x88u, 0x08u},
958                         {0x8Cu, 0x21u},
959                         {0x8Du, 0x04u},
960                         {0x8Eu, 0x1Eu},
961                         {0x8Fu, 0xA3u},
962                         {0x94u, 0x24u},
963                         {0x95u, 0xC8u},
964                         {0x96u, 0x10u},
965                         {0x97u, 0x03u},
966                         {0x98u, 0x11u},
967                         {0x9Au, 0x22u},
968                         {0x9Bu, 0x0Cu},
969                         {0x9Cu, 0x1Cu},
970                         {0x9Fu, 0x12u},
971                         {0xA0u, 0x1Cu},
972                         {0xA4u, 0x14u},
973                         {0xA6u, 0x08u},
974                         {0xA8u, 0x30u},
975                         {0xAAu, 0x0Fu},
976                         {0xACu, 0x0Cu},
977                         {0xADu, 0x01u},
978                         {0xAEu, 0x10u},
979                         {0xAFu, 0x62u},
980                         {0xB2u, 0x30u},
981                         {0xB3u, 0xE0u},
982                         {0xB4u, 0x0Fu},
983                         {0xB5u, 0x0Fu},
984                         {0xB6u, 0x0Fu},
985                         {0xB7u, 0x10u},
986                         {0xBAu, 0x08u},
987                         {0xD4u, 0x40u},
988                         {0xD6u, 0x04u},
989                         {0xD8u, 0x04u},
990                         {0xD9u, 0x04u},
991                         {0xDBu, 0x04u},
992                         {0xDFu, 0x01u},
993                         {0x00u, 0x48u},
994                         {0x02u, 0x04u},
995                         {0x05u, 0x40u},
996                         {0x06u, 0x20u},
997                         {0x09u, 0x40u},
998                         {0x0Au, 0x28u},
999                         {0x10u, 0x10u},
1000                         {0x11u, 0x41u},
1001                         {0x12u, 0x08u},
1002                         {0x14u, 0x05u},
1003                         {0x17u, 0x04u},
1004                         {0x18u, 0x06u},
1005                         {0x19u, 0x80u},
1006                         {0x1Au, 0x28u},
1007                         {0x1Fu, 0x92u},
1008                         {0x20u, 0x01u},
1009                         {0x21u, 0x14u},
1010                         {0x22u, 0x20u},
1011                         {0x24u, 0x80u},
1012                         {0x26u, 0x01u},
1013                         {0x29u, 0x80u},
1014                         {0x2Cu, 0x05u},
1015                         {0x2Fu, 0x20u},
1016                         {0x32u, 0xA8u},
1017                         {0x35u, 0x02u},
1018                         {0x37u, 0x18u},
1019                         {0x38u, 0x41u},
1020                         {0x39u, 0x08u},
1021                         {0x3Eu, 0x20u},
1022                         {0x5Fu, 0x50u},
1023                         {0x60u, 0x10u},
1024                         {0x61u, 0x20u},
1025                         {0x62u, 0x41u},
1026                         {0x65u, 0x10u},
1027                         {0x67u, 0x02u},
1028                         {0x6Cu, 0x2Au},
1029                         {0x6Du, 0x20u},
1030                         {0x6Eu, 0x01u},
1031                         {0x74u, 0x80u},
1032                         {0x75u, 0x22u},
1033                         {0x76u, 0x20u},
1034                         {0x77u, 0x08u},
1035                         {0x81u, 0x10u},
1036                         {0x87u, 0x40u},
1037                         {0x8Au, 0x05u},
1038                         {0x8Eu, 0x01u},
1039                         {0x94u, 0xC0u},
1040                         {0x95u, 0x41u},
1041                         {0x96u, 0x08u},
1042                         {0x97u, 0x22u},
1043                         {0x9Au, 0x90u},
1044                         {0x9Bu, 0x55u},
1045                         {0x9Cu, 0x14u},
1046                         {0x9Du, 0x32u},
1047                         {0xA2u, 0x14u},
1048                         {0xA3u, 0x19u},
1049                         {0xA4u, 0xAEu},
1050                         {0xA5u, 0x44u},
1051                         {0xA6u, 0x08u},
1052                         {0xA7u, 0xE2u},
1053                         {0xAAu, 0x20u},
1054                         {0xADu, 0x04u},
1055                         {0xAEu, 0x42u},
1056                         {0xB0u, 0x02u},
1057                         {0xB2u, 0x02u},
1058                         {0xB3u, 0x04u},
1059                         {0xB5u, 0x04u},
1060                         {0xC0u, 0xA7u},
1061                         {0xC2u, 0x07u},
1062                         {0xC4u, 0xEFu},
1063                         {0xCAu, 0x78u},
1064                         {0xCCu, 0xEEu},
1065                         {0xCEu, 0x2Bu},
1066                         {0xD6u, 0x30u},
1067                         {0xD8u, 0x3Fu},
1068                         {0xE2u, 0x01u},
1069                         {0xE6u, 0xE2u},
1070                         {0xEAu, 0x40u},
1071                         {0xECu, 0x05u},
1072                         {0xEEu, 0xE0u},
1073                         {0x13u, 0x02u},
1074                         {0x23u, 0x01u},
1075                         {0x25u, 0x04u},
1076                         {0x29u, 0x01u},
1077                         {0x2Bu, 0x02u},
1078                         {0x33u, 0x04u},
1079                         {0x35u, 0x03u},
1080                         {0x3Fu, 0x14u},
1081                         {0x59u, 0x04u},
1082                         {0x5Fu, 0x01u},
1083                         {0x80u, 0x04u},
1084                         {0x81u, 0x02u},
1085                         {0x85u, 0x08u},
1086                         {0x87u, 0x03u},
1087                         {0x88u, 0x01u},
1088                         {0x8Bu, 0x7Fu},
1089                         {0x91u, 0x4Fu},
1090                         {0x93u, 0x30u},
1091                         {0x97u, 0x2Cu},
1092                         {0x98u, 0x08u},
1093                         {0x99u, 0x10u},
1094                         {0x9Bu, 0x01u},
1095                         {0x9Du, 0x37u},
1096                         {0x9Fu, 0x40u},
1097                         {0xA5u, 0x03u},
1098                         {0xA8u, 0x02u},
1099                         {0xADu, 0x80u},
1100                         {0xB0u, 0x04u},
1101                         {0xB1u, 0x70u},
1102                         {0xB2u, 0x02u},
1103                         {0xB3u, 0x80u},
1104                         {0xB4u, 0x01u},
1105                         {0xB6u, 0x08u},
1106                         {0xB7u, 0x0Fu},
1107                         {0xBEu, 0x55u},
1108                         {0xBFu, 0x04u},
1109                         {0xC0u, 0x24u},
1110                         {0xC1u, 0x05u},
1111                         {0xC2u, 0x60u},
1112                         {0xC5u, 0xE2u},
1113                         {0xC6u, 0xF0u},
1114                         {0xC7u, 0xDCu},
1115                         {0xC8u, 0x3Bu},
1116                         {0xC9u, 0xFFu},
1117                         {0xCAu, 0xFFu},
1118                         {0xCBu, 0xFFu},
1119                         {0xCFu, 0x2Cu},
1120                         {0xD6u, 0x01u},
1121                         {0xD8u, 0x04u},
1122                         {0xD9u, 0x04u},
1123                         {0xDAu, 0x04u},
1124                         {0xDBu, 0x04u},
1125                         {0xDCu, 0x10u},
1126                         {0xDDu, 0x01u},
1127                         {0xDFu, 0x01u},
1128                         {0xE2u, 0xC0u},
1129                         {0xE6u, 0x80u},
1130                         {0xE8u, 0x40u},
1131                         {0xE9u, 0x40u},
1132                         {0xEEu, 0x08u},
1133                         {0x05u, 0x10u},
1134                         {0x06u, 0x40u},
1135                         {0x0Au, 0x80u},
1136                         {0x0Bu, 0x40u},
1137                         {0x0Fu, 0x08u},
1138                         {0x11u, 0x08u},
1139                         {0x13u, 0x04u},
1140                         {0x14u, 0x08u},
1141                         {0x1Cu, 0x04u},
1142                         {0x1Du, 0x40u},
1143                         {0x1Eu, 0x80u},
1144                         {0x1Fu, 0x04u},
1145                         {0x20u, 0x10u},
1146                         {0x22u, 0x20u},
1147                         {0x25u, 0x08u},
1148                         {0x26u, 0x02u},
1149                         {0x27u, 0x41u},
1150                         {0x28u, 0x04u},
1151                         {0x29u, 0x04u},
1152                         {0x2Bu, 0x40u},
1153                         {0x2Eu, 0x48u},
1154                         {0x2Fu, 0x01u},
1155                         {0x30u, 0x02u},
1156                         {0x36u, 0x14u},
1157                         {0x37u, 0x41u},
1158                         {0x3Du, 0x02u},
1159                         {0x3Eu, 0x04u},
1160                         {0x3Fu, 0x20u},
1161                         {0x45u, 0x28u},
1162                         {0x46u, 0x20u},
1163                         {0x47u, 0x01u},
1164                         {0x4Cu, 0x14u},
1165                         {0x4Du, 0x08u},
1166                         {0x4Eu, 0x42u},
1167                         {0x55u, 0x11u},
1168                         {0x56u, 0x0Cu},
1169                         {0x5Cu, 0x14u},
1170                         {0x5Eu, 0x82u},
1171                         {0x65u, 0x40u},
1172                         {0x66u, 0x22u},
1173                         {0x67u, 0x20u},
1174                         {0x6Cu, 0x01u},
1175                         {0x6Du, 0x04u},
1176                         {0x6Eu, 0x01u},
1177                         {0x6Fu, 0x08u},
1178                         {0x74u, 0x10u},
1179                         {0x76u, 0x91u},
1180                         {0x80u, 0x09u},
1181                         {0x82u, 0x40u},
1182                         {0x87u, 0x81u},
1183                         {0x88u, 0x40u},
1184                         {0x8Cu, 0x20u},
1185                         {0x8Fu, 0x02u},
1186                         {0x90u, 0x08u},
1187                         {0x92u, 0x04u},
1188                         {0x94u, 0xE0u},
1189                         {0x95u, 0x41u},
1190                         {0x96u, 0x49u},
1191                         {0x97u, 0x44u},
1192                         {0x98u, 0x08u},
1193                         {0x99u, 0x04u},
1194                         {0x9Au, 0x40u},
1195                         {0x9Bu, 0x14u},
1196                         {0x9Cu, 0x50u},
1197                         {0x9Du, 0x2Au},
1198                         {0x9Eu, 0x05u},
1199                         {0x9Fu, 0x41u},
1200                         {0xA1u, 0x20u},
1201                         {0xA2u, 0x15u},
1202                         {0xA3u, 0x15u},
1203                         {0xA4u, 0xBEu},
1204                         {0xA5u, 0x51u},
1205                         {0xA6u, 0x08u},
1206                         {0xA7u, 0x20u},
1207                         {0xA9u, 0x10u},
1208                         {0xABu, 0x40u},
1209                         {0xAFu, 0x60u},
1210                         {0xC0u, 0x50u},
1211                         {0xC2u, 0x40u},
1212                         {0xC4u, 0x40u},
1213                         {0xCAu, 0x57u},
1214                         {0xCCu, 0xF1u},
1215                         {0xCEu, 0xE0u},
1216                         {0xD0u, 0xA0u},
1217                         {0xD2u, 0x30u},
1218                         {0xD6u, 0xF0u},
1219                         {0xD8u, 0xF0u},
1220                         {0xE6u, 0x10u},
1221                         {0xE8u, 0x04u},
1222                         {0xEAu, 0x02u},
1223                         {0xEEu, 0x01u},
1224                         {0x05u, 0x10u},
1225                         {0x06u, 0x70u},
1226                         {0x0Au, 0x20u},
1227                         {0x0Bu, 0x08u},
1228                         {0x0Eu, 0x08u},
1229                         {0x11u, 0x3Au},
1230                         {0x13u, 0x45u},
1231                         {0x15u, 0x10u},
1232                         {0x16u, 0x07u},
1233                         {0x17u, 0x60u},
1234                         {0x18u, 0x94u},
1235                         {0x1Au, 0x48u},
1236                         {0x1Bu, 0x07u},
1237                         {0x1Du, 0x29u},
1238                         {0x1Fu, 0x52u},
1239                         {0x20u, 0xEAu},
1240                         {0x22u, 0x15u},
1241                         {0x25u, 0x24u},
1242                         {0x26u, 0x80u},
1243                         {0x27u, 0x58u},
1244                         {0x2Au, 0x80u},
1245                         {0x2Bu, 0x10u},
1246                         {0x2Cu, 0x99u},
1247                         {0x2Du, 0x80u},
1248                         {0x2Eu, 0x22u},
1249                         {0x30u, 0x80u},
1250                         {0x31u, 0x80u},
1251                         {0x32u, 0x0Fu},
1252                         {0x33u, 0x0Fu},
1253                         {0x34u, 0x70u},
1254                         {0x35u, 0x70u},
1255                         {0x38u, 0x80u},
1256                         {0x3Bu, 0x20u},
1257                         {0x3Eu, 0x41u},
1258                         {0x3Fu, 0x01u},
1259                         {0x56u, 0x08u},
1260                         {0x58u, 0x04u},
1261                         {0x59u, 0x04u},
1262                         {0x5Bu, 0x04u},
1263                         {0x5Cu, 0x11u},
1264                         {0x5Du, 0x90u},
1265                         {0x5Fu, 0x01u},
1266                         {0x84u, 0x0Du},
1267                         {0x8Cu, 0x32u},
1268                         {0x8Eu, 0x44u},
1269                         {0x90u, 0x40u},
1270                         {0x92u, 0x30u},
1271                         {0x94u, 0x02u},
1272                         {0x96u, 0x0Du},
1273                         {0x98u, 0x11u},
1274                         {0x9Au, 0x62u},
1275                         {0x9Bu, 0x01u},
1276                         {0x9Cu, 0x0Du},
1277                         {0x9Du, 0x05u},
1278                         {0x9Fu, 0x0Au},
1279                         {0xA0u, 0x0Du},
1280                         {0xA3u, 0x08u},
1281                         {0xA4u, 0x0Du},
1282                         {0xA7u, 0x04u},
1283                         {0xA8u, 0x52u},
1284                         {0xAAu, 0x28u},
1285                         {0xABu, 0x02u},
1286                         {0xACu, 0x0Du},
1287                         {0xB0u, 0x70u},
1288                         {0xB1u, 0x0Cu},
1289                         {0xB2u, 0x0Fu},
1290                         {0xB3u, 0x03u},
1291                         {0xBAu, 0x0Au},
1292                         {0xBFu, 0x05u},
1293                         {0xD6u, 0x08u},
1294                         {0xD8u, 0x04u},
1295                         {0xD9u, 0x04u},
1296                         {0xDBu, 0x04u},
1297                         {0xDDu, 0x90u},
1298                         {0xDFu, 0x01u},
1299                         {0x00u, 0x48u},
1300                         {0x04u, 0x24u},
1301                         {0x06u, 0x21u},
1302                         {0x09u, 0x40u},
1303                         {0x0Au, 0xA8u},
1304                         {0x0Eu, 0x18u},
1305                         {0x10u, 0x10u},
1306                         {0x11u, 0x41u},
1307                         {0x12u, 0x08u},
1308                         {0x15u, 0x04u},
1309                         {0x16u, 0x04u},
1310                         {0x17u, 0x41u},
1311                         {0x1Au, 0xA0u},
1312                         {0x1Bu, 0x01u},
1313                         {0x1Du, 0x30u},
1314                         {0x1Eu, 0x18u},
1315                         {0x1Fu, 0x51u},
1316                         {0x21u, 0x04u},
1317                         {0x22u, 0x02u},
1318                         {0x24u, 0x08u},
1319                         {0x26u, 0x01u},
1320                         {0x27u, 0x18u},
1321                         {0x29u, 0x22u},
1322                         {0x2Bu, 0x20u},
1323                         {0x2Eu, 0xA0u},
1324                         {0x2Fu, 0x10u},
1325                         {0x32u, 0x80u},
1326                         {0x33u, 0x10u},
1327                         {0x37u, 0x59u},
1328                         {0x3Cu, 0x20u},
1329                         {0x3Du, 0x04u},
1330                         {0x3Eu, 0x04u},
1331                         {0x58u, 0x64u},
1332                         {0x5Du, 0x80u},
1333                         {0x5Fu, 0x20u},
1334                         {0x61u, 0x04u},
1335                         {0x62u, 0x40u},
1336                         {0x63u, 0x08u},
1337                         {0x64u, 0x08u},
1338                         {0x66u, 0x80u},
1339                         {0x80u, 0x08u},
1340                         {0x81u, 0x24u},
1341                         {0x83u, 0x04u},
1342                         {0x84u, 0x04u},
1343                         {0x86u, 0x02u},
1344                         {0x88u, 0x20u},
1345                         {0x89u, 0x06u},
1346                         {0x8Au, 0x40u},
1347                         {0x8Du, 0x80u},
1348                         {0x90u, 0x04u},
1349                         {0x92u, 0x04u},
1350                         {0x94u, 0x80u},
1351                         {0x96u, 0x51u},
1352                         {0x97u, 0x46u},
1353                         {0x9Du, 0x18u},
1354                         {0x9Eu, 0x84u},
1355                         {0x9Fu, 0x41u},
1356                         {0xA2u, 0xD0u},
1357                         {0xA3u, 0x50u},
1358                         {0xA4u, 0xAAu},
1359                         {0xA5u, 0x13u},
1360                         {0xA6u, 0x04u},
1361                         {0xA7u, 0x04u},
1362                         {0xA9u, 0x08u},
1363                         {0xAAu, 0x20u},
1364                         {0xABu, 0x10u},
1365                         {0xAEu, 0x40u},
1366                         {0xAFu, 0x80u},
1367                         {0xB0u, 0x04u},
1368                         {0xB2u, 0x16u},
1369                         {0xC0u, 0xE5u},
1370                         {0xC2u, 0x6Fu},
1371                         {0xC4u, 0xFFu},
1372                         {0xCAu, 0x77u},
1373                         {0xCCu, 0xFCu},
1374                         {0xCEu, 0x60u},
1375                         {0xD6u, 0x3Eu},
1376                         {0xD8u, 0x3Eu},
1377                         {0xE0u, 0x02u},
1378                         {0xE2u, 0x28u},
1379                         {0xE4u, 0x20u},
1380                         {0xE6u, 0x10u},
1381                         {0xE8u, 0x80u},
1382                         {0xEAu, 0x22u},
1383                         {0xECu, 0x20u},
1384                         {0x00u, 0x20u},
1385                         {0x02u, 0x10u},
1386                         {0x03u, 0xFFu},
1387                         {0x04u, 0x20u},
1388                         {0x05u, 0x05u},
1389                         {0x06u, 0x10u},
1390                         {0x07u, 0x0Au},
1391                         {0x0Au, 0x04u},
1392                         {0x0Bu, 0xFFu},
1393                         {0x0Fu, 0xFFu},
1394                         {0x10u, 0x20u},
1395                         {0x11u, 0x90u},
1396                         {0x12u, 0x10u},
1397                         {0x13u, 0x60u},
1398                         {0x15u, 0x50u},
1399                         {0x16u, 0x01u},
1400                         {0x17u, 0xA0u},
1401                         {0x18u, 0x10u},
1402                         {0x19u, 0x30u},
1403                         {0x1Au, 0x20u},
1404                         {0x1Bu, 0xC0u},
1405                         {0x1Cu, 0x05u},
1406                         {0x1Eu, 0x0Au},
1407                         {0x21u, 0x0Fu},
1408                         {0x22u, 0x02u},
1409                         {0x23u, 0xF0u},
1410                         {0x25u, 0x09u},
1411                         {0x26u, 0x08u},
1412                         {0x27u, 0x06u},
1413                         {0x29u, 0x03u},
1414                         {0x2Bu, 0x0Cu},
1415                         {0x2Cu, 0x20u},
1416                         {0x2Eu, 0x10u},
1417                         {0x32u, 0x0Cu},
1418                         {0x34u, 0x30u},
1419                         {0x35u, 0xFFu},
1420                         {0x36u, 0x03u},
1421                         {0x3Au, 0x20u},
1422                         {0x3Eu, 0x44u},
1423                         {0x3Fu, 0x10u},
1424                         {0x56u, 0x08u},
1425                         {0x58u, 0x04u},
1426                         {0x59u, 0x04u},
1427                         {0x5Bu, 0x04u},
1428                         {0x5Cu, 0x09u},
1429                         {0x5Du, 0x90u},
1430                         {0x5Fu, 0x01u},
1431                         {0x80u, 0x59u},
1432                         {0x82u, 0xA2u},
1433                         {0x85u, 0x55u},
1434                         {0x86u, 0x20u},
1435                         {0x87u, 0xAAu},
1436                         {0x8Au, 0x30u},
1437                         {0x8Bu, 0xFFu},
1438                         {0x8Du, 0x69u},
1439                         {0x8Fu, 0x96u},
1440                         {0x90u, 0x30u},
1441                         {0x91u, 0xFFu},
1442                         {0x92u, 0xC0u},
1443                         {0x95u, 0x0Fu},
1444                         {0x96u, 0x07u},
1445                         {0x97u, 0xF0u},
1446                         {0x98u, 0x74u},
1447                         {0x9Au, 0x88u},
1448                         {0x9Bu, 0xFFu},
1449                         {0x9Eu, 0x08u},
1450                         {0x9Fu, 0xFFu},
1451                         {0xA0u, 0x6Au},
1452                         {0xA2u, 0x95u},
1453                         {0xA5u, 0xFFu},
1454                         {0xACu, 0x10u},
1455                         {0xADu, 0x33u},
1456                         {0xAFu, 0xCCu},
1457                         {0xB0u, 0xF0u},
1458                         {0xB2u, 0x0Fu},
1459                         {0xB5u, 0xFFu},
1460                         {0xBAu, 0x02u},
1461                         {0xBBu, 0x20u},
1462                         {0xD8u, 0x04u},
1463                         {0xD9u, 0x04u},
1464                         {0xDBu, 0x04u},
1465                         {0xDCu, 0x11u},
1466                         {0xDFu, 0x01u},
1467                         {0x00u, 0x01u},
1468                         {0x03u, 0x18u},
1469                         {0x05u, 0x28u},
1470                         {0x07u, 0x40u},
1471                         {0x08u, 0x40u},
1472                         {0x09u, 0x02u},
1473                         {0x0Au, 0x18u},
1474                         {0x0Bu, 0x10u},
1475                         {0x0Du, 0x08u},
1476                         {0x0Eu, 0x89u},
1477                         {0x10u, 0xA0u},
1478                         {0x12u, 0x01u},
1479                         {0x14u, 0x08u},
1480                         {0x16u, 0x06u},
1481                         {0x17u, 0x01u},
1482                         {0x18u, 0x04u},
1483                         {0x19u, 0x20u},
1484                         {0x1Au, 0x28u},
1485                         {0x1Bu, 0x70u},
1486                         {0x1Du, 0x08u},
1487                         {0x1Eu, 0x80u},
1488                         {0x20u, 0x08u},
1489                         {0x26u, 0x20u},
1490                         {0x27u, 0x08u},
1491                         {0x28u, 0x40u},
1492                         {0x2Au, 0x08u},
1493                         {0x2Bu, 0x08u},
1494                         {0x2Eu, 0x84u},
1495                         {0x30u, 0x2Au},
1496                         {0x35u, 0x10u},
1497                         {0x37u, 0x49u},
1498                         {0x38u, 0x80u},
1499                         {0x3Au, 0x12u},
1500                         {0x3Bu, 0x04u},
1501                         {0x3Du, 0x03u},
1502                         {0x3Eu, 0x40u},
1503                         {0x3Fu, 0x28u},
1504                         {0x45u, 0x10u},
1505                         {0x47u, 0x20u},
1506                         {0x5Bu, 0x80u},
1507                         {0x5Cu, 0x08u},
1508                         {0x5Du, 0x01u},
1509                         {0x5Fu, 0x60u},
1510                         {0x62u, 0x40u},
1511                         {0x67u, 0x02u},
1512                         {0x82u, 0x19u},
1513                         {0x88u, 0x40u},
1514                         {0x8Au, 0x90u},
1515                         {0x8Bu, 0x18u},
1516                         {0x8Cu, 0x81u},
1517                         {0x8Fu, 0x20u},
1518                         {0xC0u, 0x7Eu},
1519                         {0xC2u, 0xFFu},
1520                         {0xC4u, 0x9Du},
1521                         {0xCAu, 0x57u},
1522                         {0xCCu, 0xF7u},
1523                         {0xCEu, 0x7Fu},
1524                         {0xD6u, 0xF8u},
1525                         {0xD8u, 0x18u},
1526                         {0xE0u, 0xA1u},
1527                         {0xE2u, 0x50u},
1528                         {0xE4u, 0x34u},
1529                         {0xE6u, 0xC0u},
1530                         {0xA9u, 0x80u},
1531                         {0xE4u, 0x80u},
1532                         {0xE6u, 0x02u},
1533                         {0xEAu, 0x04u},
1534                         {0xEEu, 0x20u},
1535                         {0x80u, 0x04u},
1536                         {0x84u, 0x08u},
1537                         {0x88u, 0x02u},
1538                         {0x89u, 0x10u},
1539                         {0x90u, 0x04u},
1540                         {0x91u, 0x20u},
1541                         {0x9Cu, 0x08u},
1542                         {0x9Du, 0x80u},
1543                         {0xA0u, 0x02u},
1544                         {0xA8u, 0x80u},
1545                         {0xA9u, 0x40u},
1546                         {0xE0u, 0x04u},
1547                         {0xE2u, 0x08u},
1548                         {0xE6u, 0x08u},
1549                         {0xE8u, 0x04u},
1550                         {0xEAu, 0x01u},
1551                         {0xEEu, 0x08u},
1552                         {0x05u, 0x05u},
1553                         {0x07u, 0x0Au},
1554                         {0x09u, 0x50u},
1555                         {0x0Bu, 0xA0u},
1556                         {0x0Du, 0x06u},
1557                         {0x0Fu, 0x09u},
1558                         {0x13u, 0xFFu},
1559                         {0x14u, 0x01u},
1560                         {0x15u, 0x03u},
1561                         {0x17u, 0x0Cu},
1562                         {0x1Bu, 0xFFu},
1563                         {0x1Du, 0xFFu},
1564                         {0x25u, 0x30u},
1565                         {0x27u, 0xC0u},
1566                         {0x29u, 0x0Fu},
1567                         {0x2Bu, 0xF0u},
1568                         {0x2Du, 0x60u},
1569                         {0x2Fu, 0x90u},
1570                         {0x33u, 0xFFu},
1571                         {0x34u, 0x01u},
1572                         {0x3Fu, 0x04u},
1573                         {0x56u, 0x08u},
1574                         {0x58u, 0x04u},
1575                         {0x59u, 0x04u},
1576                         {0x5Bu, 0x04u},
1577                         {0x5Cu, 0x09u},
1578                         {0x5Du, 0x90u},
1579                         {0x5Fu, 0x01u},
1580                         {0x00u, 0x64u},
1581                         {0x01u, 0x02u},
1582                         {0x09u, 0x40u},
1583                         {0x0Au, 0x21u},
1584                         {0x0Bu, 0x84u},
1585                         {0x0Fu, 0x20u},
1586                         {0x10u, 0x18u},
1587                         {0x11u, 0x45u},
1588                         {0x18u, 0x10u},
1589                         {0x19u, 0x20u},
1590                         {0x1Au, 0x02u},
1591                         {0x1Bu, 0x80u},
1592                         {0x1Eu, 0x04u},
1593                         {0x21u, 0x80u},
1594                         {0x22u, 0x20u},
1595                         {0x23u, 0x20u},
1596                         {0x27u, 0x10u},
1597                         {0x2Cu, 0x26u},
1598                         {0x32u, 0x28u},
1599                         {0x36u, 0x11u},
1600                         {0x37u, 0x88u},
1601                         {0x38u, 0x44u},
1602                         {0x39u, 0x20u},
1603                         {0x3Du, 0x28u},
1604                         {0x3Fu, 0x80u},
1605                         {0x40u, 0x04u},
1606                         {0x42u, 0x20u},
1607                         {0x43u, 0x80u},
1608                         {0x48u, 0x40u},
1609                         {0x49u, 0x06u},
1610                         {0x4Au, 0x8Au},
1611                         {0x51u, 0x20u},
1612                         {0x52u, 0x44u},
1613                         {0x53u, 0x40u},
1614                         {0x5Fu, 0x40u},
1615                         {0x63u, 0x02u},
1616                         {0x65u, 0x40u},
1617                         {0x68u, 0x0Cu},
1618                         {0x69u, 0x55u},
1619                         {0x72u, 0x01u},
1620                         {0x83u, 0x08u},
1621                         {0x85u, 0x44u},
1622                         {0x88u, 0x04u},
1623                         {0x8Bu, 0x82u},
1624                         {0x90u, 0x06u},
1625                         {0x91u, 0x28u},
1626                         {0x92u, 0x20u},
1627                         {0x94u, 0x50u},
1628                         {0x95u, 0x41u},
1629                         {0x96u, 0x04u},
1630                         {0x9Au, 0x90u},
1631                         {0x9Bu, 0x41u},
1632                         {0x9Cu, 0x14u},
1633                         {0x9Du, 0x40u},
1634                         {0x9Eu, 0x44u},
1635                         {0xA0u, 0x22u},
1636                         {0xA1u, 0x10u},
1637                         {0xA2u, 0x15u},
1638                         {0xA3u, 0x59u},
1639                         {0xA4u, 0x04u},
1640                         {0xA5u, 0x6Cu},
1641                         {0xA6u, 0x88u},
1642                         {0xA7u, 0x20u},
1643                         {0xA8u, 0x40u},
1644                         {0xABu, 0x40u},
1645                         {0xB0u, 0x01u},
1646                         {0xB1u, 0x08u},
1647                         {0xB3u, 0x10u},
1648                         {0xC0u, 0x0Fu},
1649                         {0xC2u, 0x2Fu},
1650                         {0xC4u, 0x0Fu},
1651                         {0xCAu, 0x70u},
1652                         {0xCCu, 0xF6u},
1653                         {0xCEu, 0x7Eu},
1654                         {0xD0u, 0x0Eu},
1655                         {0xD2u, 0x0Cu},
1656                         {0xD6u, 0x10u},
1657                         {0xD8u, 0x18u},
1658                         {0xE4u, 0xA0u},
1659                         {0xEEu, 0x08u},
1660                         {0x00u, 0xC0u},
1661                         {0x01u, 0x77u},
1662                         {0x02u, 0x02u},
1663                         {0x03u, 0x80u},
1664                         {0x04u, 0x1Fu},
1665                         {0x05u, 0x24u},
1666                         {0x06u, 0x20u},
1667                         {0x07u, 0x40u},
1668                         {0x08u, 0x7Fu},
1669                         {0x0Au, 0x80u},
1670                         {0x0Bu, 0x64u},
1671                         {0x0Du, 0x64u},
1672                         {0x0Eu, 0x9Fu},
1673                         {0x11u, 0x93u},
1674                         {0x12u, 0xFFu},
1675                         {0x13u, 0x60u},
1676                         {0x14u, 0x80u},
1677                         {0x15u, 0x10u},
1678                         {0x17u, 0xE5u},
1679                         {0x19u, 0x24u},
1680                         {0x1Au, 0x60u},
1681                         {0x1Cu, 0xC0u},
1682                         {0x1Du, 0x64u},
1683                         {0x1Eu, 0x01u},
1684                         {0x21u, 0x08u},
1685                         {0x24u, 0xC0u},
1686                         {0x25u, 0x40u},
1687                         {0x26u, 0x04u},
1688                         {0x27u, 0x02u},
1689                         {0x28u, 0xC0u},
1690                         {0x29u, 0x08u},
1691                         {0x2Au, 0x08u},
1692                         {0x2Cu, 0x90u},
1693                         {0x2Du, 0x64u},
1694                         {0x2Eu, 0x40u},
1695                         {0x30u, 0xFFu},
1696                         {0x31u, 0xF0u},
1697                         {0x33u, 0x07u},
1698                         {0x35u, 0x08u},
1699                         {0x37u, 0x80u},
1700                         {0x39u, 0x22u},
1701                         {0x3Bu, 0x0Cu},
1702                         {0x3Eu, 0x01u},
1703                         {0x3Fu, 0x40u},
1704                         {0x54u, 0x09u},
1705                         {0x56u, 0x04u},
1706                         {0x58u, 0x04u},
1707                         {0x59u, 0x04u},
1708                         {0x5Bu, 0x04u},
1709                         {0x5Fu, 0x01u},
1710                         {0x82u, 0x80u},
1711                         {0x8Au, 0x70u},
1712                         {0x8Bu, 0x20u},
1713                         {0x8Cu, 0xAAu},
1714                         {0x8Eu, 0x55u},
1715                         {0x91u, 0x0Au},
1716                         {0x93u, 0x05u},
1717                         {0x95u, 0x04u},
1718                         {0x96u, 0x07u},
1719                         {0x97u, 0x08u},
1720                         {0x98u, 0x44u},
1721                         {0x9Au, 0x88u},
1722                         {0x9Bu, 0x17u},
1723                         {0x9Du, 0x09u},
1724                         {0x9Fu, 0x02u},
1725                         {0xA6u, 0x08u},
1726                         {0xABu, 0x08u},
1727                         {0xACu, 0x99u},
1728                         {0xADu, 0x10u},
1729                         {0xAEu, 0x22u},
1730                         {0xAFu, 0x20u},
1731                         {0xB2u, 0x0Fu},
1732                         {0xB3u, 0x0Fu},
1733                         {0xB4u, 0xF0u},
1734                         {0xB5u, 0x30u},
1735                         {0xBFu, 0x10u},
1736                         {0xD8u, 0x04u},
1737                         {0xD9u, 0x04u},
1738                         {0xDCu, 0x11u},
1739                         {0xDFu, 0x01u},
1740                         {0x00u, 0xA4u},
1741                         {0x01u, 0x01u},
1742                         {0x02u, 0x40u},
1743                         {0x05u, 0x10u},
1744                         {0x06u, 0x80u},
1745                         {0x07u, 0x01u},
1746                         {0x08u, 0x40u},
1747                         {0x09u, 0x02u},
1748                         {0x0Au, 0x21u},
1749                         {0x0Bu, 0x04u},
1750                         {0x0Eu, 0x28u},
1751                         {0x10u, 0x08u},
1752                         {0x11u, 0x44u},
1753                         {0x16u, 0x10u},
1754                         {0x17u, 0x40u},
1755                         {0x19u, 0x02u},
1756                         {0x1Du, 0x18u},
1757                         {0x1Eu, 0x20u},
1758                         {0x1Fu, 0x20u},
1759                         {0x20u, 0x60u},
1760                         {0x21u, 0x02u},
1761                         {0x22u, 0x4Au},
1762                         {0x23u, 0x04u},
1763                         {0x25u, 0x04u},
1764                         {0x27u, 0x18u},
1765                         {0x28u, 0x10u},
1766                         {0x29u, 0x22u},
1767                         {0x2Au, 0x44u},
1768                         {0x2Fu, 0x0Au},
1769                         {0x30u, 0x40u},
1770                         {0x31u, 0x02u},
1771                         {0x32u, 0x18u},
1772                         {0x36u, 0x04u},
1773                         {0x37u, 0x51u},
1774                         {0x38u, 0x02u},
1775                         {0x39u, 0x54u},
1776                         {0x3Du, 0x20u},
1777                         {0x58u, 0x10u},
1778                         {0x59u, 0x04u},
1779                         {0x5Au, 0x82u},
1780                         {0x61u, 0x80u},
1781                         {0x63u, 0x40u},
1782                         {0x87u, 0x40u},
1783                         {0x8Au, 0x20u},
1784                         {0x8Fu, 0x08u},
1785                         {0x90u, 0x06u},
1786                         {0x91u, 0x55u},
1787                         {0x92u, 0x23u},
1788                         {0x94u, 0x40u},
1789                         {0x97u, 0x04u},
1790                         {0x99u, 0x24u},
1791                         {0x9Au, 0x94u},
1792                         {0x9Bu, 0x41u},
1793                         {0x9Eu, 0x20u},
1794                         {0xA0u, 0x48u},
1795                         {0xA1u, 0x90u},
1796                         {0xA2u, 0x04u},
1797                         {0xA3u, 0x0Au},
1798                         {0xA4u, 0x10u},
1799                         {0xA5u, 0x0Cu},
1800                         {0xA6u, 0x0Au},
1801                         {0xA7u, 0x20u},
1802                         {0xABu, 0x10u},
1803                         {0xAFu, 0x40u},
1804                         {0xB3u, 0x20u},
1805                         {0xC0u, 0xDFu},
1806                         {0xC2u, 0x6Fu},
1807                         {0xC4u, 0xA7u},
1808                         {0xCAu, 0x3Fu},
1809                         {0xCCu, 0xFFu},
1810                         {0xCEu, 0x2Fu},
1811                         {0xD6u, 0x0Fu},
1812                         {0xD8u, 0x09u},
1813                         {0xE4u, 0x80u},
1814                         {0xEEu, 0x22u},
1815                         {0x05u, 0x20u},
1816                         {0x0Du, 0x20u},
1817                         {0x12u, 0x08u},
1818                         {0x16u, 0x80u},
1819                         {0x17u, 0x80u},
1820                         {0x31u, 0x02u},
1821                         {0x35u, 0x08u},
1822                         {0x36u, 0x80u},
1823                         {0x38u, 0x08u},
1824                         {0x3Au, 0x80u},
1825                         {0x3Du, 0x28u},
1826                         {0x40u, 0x02u},
1827                         {0x67u, 0x80u},
1828                         {0x84u, 0x80u},
1829                         {0x87u, 0x40u},
1830                         {0xC0u, 0x80u},
1831                         {0xC2u, 0x80u},
1832                         {0xC4u, 0xE0u},
1833                         {0xCCu, 0xE0u},
1834                         {0xCEu, 0xF0u},
1835                         {0xD0u, 0x10u},
1836                         {0xD8u, 0x80u},
1837                         {0xE2u, 0x10u},
1838                         {0xE6u, 0x40u},
1839                         {0x30u, 0x08u},
1840                         {0x33u, 0x10u},
1841                         {0x37u, 0x84u},
1842                         {0x39u, 0x40u},
1843                         {0x51u, 0x01u},
1844                         {0x56u, 0x08u},
1845                         {0x60u, 0x80u},
1846                         {0x89u, 0x01u},
1847                         {0x94u, 0x08u},
1848                         {0x98u, 0x80u},
1849                         {0x99u, 0x20u},
1850                         {0x9Bu, 0x90u},
1851                         {0x9Cu, 0x02u},
1852                         {0x9Du, 0x08u},
1853                         {0xA1u, 0x20u},
1854                         {0xA5u, 0x16u},
1855                         {0xA6u, 0x80u},
1856                         {0xAAu, 0x08u},
1857                         {0xABu, 0x10u},
1858                         {0xCCu, 0xF0u},
1859                         {0xCEu, 0x10u},
1860                         {0xD4u, 0xC0u},
1861                         {0xD8u, 0x40u},
1862                         {0x12u, 0x80u},
1863                         {0x33u, 0x80u},
1864                         {0x5Au, 0x01u},
1865                         {0x80u, 0x04u},
1866                         {0x85u, 0x08u},
1867                         {0x92u, 0x01u},
1868                         {0x94u, 0x08u},
1869                         {0x95u, 0x40u},
1870                         {0x99u, 0x20u},
1871                         {0x9Cu, 0x02u},
1872                         {0x9Du, 0x08u},
1873                         {0x9Fu, 0x04u},
1874                         {0xA4u, 0x08u},
1875                         {0xA5u, 0x06u},
1876                         {0xA6u, 0x80u},
1877                         {0xA9u, 0x10u},
1878                         {0xAEu, 0x09u},
1879                         {0xB5u, 0x20u},
1880                         {0xC4u, 0x10u},
1881                         {0xCCu, 0x10u},
1882                         {0xD6u, 0x40u},
1883                         {0xE6u, 0x90u},
1884                         {0xEAu, 0x90u},
1885                         {0xEEu, 0x40u},
1886                         {0x83u, 0x04u},
1887                         {0x89u, 0x02u},
1888                         {0x8Du, 0x04u},
1889                         {0x9Cu, 0x02u},
1890                         {0x9Fu, 0x04u},
1891                         {0xA5u, 0x06u},
1892                         {0xA7u, 0x80u},
1893                         {0xB0u, 0x08u},
1894                         {0xB1u, 0x20u},
1895                         {0xB5u, 0x40u},
1896                         {0xE2u, 0x80u},
1897                         {0x00u, 0x80u},
1898                         {0x05u, 0x20u},
1899                         {0x09u, 0x20u},
1900                         {0x0Eu, 0x01u},
1901                         {0x13u, 0x02u},
1902                         {0x14u, 0x40u},
1903                         {0x62u, 0x02u},
1904                         {0x65u, 0x02u},
1905                         {0x81u, 0x02u},
1906                         {0x82u, 0x02u},
1907                         {0x8Du, 0x20u},
1908                         {0xC0u, 0x03u},
1909                         {0xC2u, 0x03u},
1910                         {0xC4u, 0x0Cu},
1911                         {0xD8u, 0x03u},
1912                         {0xE2u, 0x08u},
1913                         {0x00u, 0x01u},
1914                         {0x07u, 0x40u},
1915                         {0x08u, 0x01u},
1916                         {0x0Eu, 0x80u},
1917                         {0x51u, 0x02u},
1918                         {0x56u, 0x20u},
1919                         {0x58u, 0x04u},
1920                         {0x65u, 0x01u},
1921                         {0x84u, 0x10u},
1922                         {0x85u, 0x02u},
1923                         {0x88u, 0x44u},
1924                         {0x8Cu, 0x01u},
1925                         {0x8Du, 0x20u},
1926                         {0x92u, 0x01u},
1927                         {0x98u, 0x40u},
1928                         {0x9Bu, 0x02u},
1929                         {0xA1u, 0x20u},
1930                         {0xACu, 0x40u},
1931                         {0xC0u, 0x0Cu},
1932                         {0xC2u, 0x0Cu},
1933                         {0xD4u, 0x03u},
1934                         {0xD6u, 0x02u},
1935                         {0xD8u, 0x01u},
1936                         {0xE2u, 0x01u},
1937                         {0xE4u, 0x01u},
1938                         {0xE6u, 0x0Au},
1939                         {0x57u, 0x80u},
1940                         {0x89u, 0x40u},
1941                         {0x8Eu, 0x20u},
1942                         {0x92u, 0x01u},
1943                         {0x9Bu, 0x02u},
1944                         {0x9Eu, 0x20u},
1945                         {0xA2u, 0x40u},
1946                         {0xA4u, 0x10u},
1947                         {0xA9u, 0x01u},
1948                         {0xABu, 0x40u},
1949                         {0xACu, 0x01u},
1950                         {0xD4u, 0x02u},
1951                         {0xE2u, 0x01u},
1952                         {0xE4u, 0x02u},
1953                         {0x08u, 0x01u},
1954                         {0x0Bu, 0x02u},
1955                         {0x0Cu, 0x08u},
1956                         {0x0Fu, 0x02u},
1957                         {0x80u, 0x08u},
1958                         {0x87u, 0x02u},
1959                         {0x90u, 0x08u},
1960                         {0x92u, 0x01u},
1961                         {0x97u, 0x02u},
1962                         {0x9Bu, 0x02u},
1963                         {0x9Cu, 0x01u},
1964                         {0x9Du, 0x40u},
1965                         {0xA2u, 0x40u},
1966                         {0xA4u, 0x10u},
1967                         {0xA8u, 0x04u},
1968                         {0xABu, 0x80u},
1969                         {0xB0u, 0x01u},
1970                         {0xB7u, 0x01u},
1971                         {0xC2u, 0x0Fu},
1972                         {0xEAu, 0x02u},
1973                         {0xEEu, 0x04u},
1974                         {0x84u, 0x02u},
1975                         {0x9Cu, 0x02u},
1976                         {0xAFu, 0x80u},
1977                         {0xE2u, 0x10u},
1978                         {0xEEu, 0x10u},
1979                         {0x06u, 0x20u},
1980                         {0x50u, 0x02u},
1981                         {0x56u, 0x80u},
1982                         {0x84u, 0x02u},
1983                         {0x8Au, 0x20u},
1984                         {0x9Au, 0x80u},
1985                         {0x9Cu, 0x02u},
1986                         {0xA0u, 0x02u},
1987                         {0xB2u, 0x80u},
1988                         {0xC0u, 0x20u},
1989                         {0xD4u, 0xC0u},
1990                         {0xE6u, 0x40u},
1991                         {0x90u, 0x08u},
1992                         {0x9Du, 0x40u},
1993                         {0xA2u, 0x40u},
1994                         {0xA4u, 0x10u},
1995                         {0xAFu, 0x01u},
1996                         {0xB2u, 0x01u},
1997                         {0xEEu, 0x01u},
1998                         {0x00u, 0x20u},
1999                         {0x05u, 0x40u},
2000                         {0x50u, 0x04u},
2001                         {0x5Au, 0x40u},
2002                         {0x8Eu, 0x40u},
2003                         {0x90u, 0x08u},
2004                         {0x9Du, 0x40u},
2005                         {0xA4u, 0x10u},
2006                         {0xAEu, 0x40u},
2007                         {0xC0u, 0x03u},
2008                         {0xD4u, 0x05u},
2009                         {0xE4u, 0x02u},
2010                         {0x10u, 0x03u},
2011                         {0x11u, 0x01u},
2012                         {0x1Cu, 0x03u},
2013                         {0x1Du, 0x01u},
2014                         {0x00u, 0xFDu},
2015                         {0x01u, 0xBFu},
2016                         {0x02u, 0x2Au},
2017                         {0x10u, 0x55u},
2018                 };
2019
2020
2021
2022                 CYPACKED typedef struct {
2023                         void CYFAR *address;
2024                         uint16 size;
2025                 } CYPACKED_ATTR cfg_memset_t;
2026
2027
2028                 CYPACKED typedef struct {
2029                         void CYFAR *dest;
2030                         const void CYCODE *src;
2031                         uint16 size;
2032                 } CYPACKED_ATTR cfg_memcpy_t;
2033
2034                 static const cfg_memset_t CYCODE cfg_memset_list [] = {
2035                         /* address, size */
2036                         {(void CYFAR *)(CYREG_TMR0_CFG0), 12u},
2037                         {(void CYFAR *)(CYREG_PRT1_DR), 16u},
2038                         {(void CYFAR *)(CYDEV_UCFG_B0_P0_U0_BASE), 4096u},
2039                         {(void CYFAR *)(CYDEV_UCFG_B1_P2_U0_BASE), 1152u},
2040                         {(void CYFAR *)(CYDEV_UCFG_B1_P4_ROUTE_BASE), 768u},
2041                         {(void CYFAR *)(CYDEV_UCFG_DSI0_BASE), 2560u},
2042                         {(void CYFAR *)(CYDEV_UCFG_DSI12_BASE), 512u},
2043                         {(void CYFAR *)(CYREG_BCTL1_MDCLK_EN), 16u},
2044                 };
2045
2046                 /* UDB_0_1_0_CONFIG Address: CYDEV_UCFG_B1_P4_U1_BASE Size (bytes): 128 */
2047                 static const uint8 CYCODE BS_UDB_0_1_0_CONFIG_VAL[] = {
2048                         0x10u, 0x00u, 0x00u, 0x00u, 0x07u, 0x13u, 0x18u, 0x20u, 0x22u, 0x00u, 0x08u, 0x0Eu, 0x08u, 0x11u, 0x21u, 0x44u, 
2049                         0x00u, 0x00u, 0x80u, 0x00u, 0x01u, 0x29u, 0x00u, 0x10u, 0x04u, 0x6Eu, 0x00u, 0x00u, 0xC1u, 0x00u, 0x00u, 0x00u, 
2050                         0xC1u, 0x00u, 0x00u, 0x00u, 0xC1u, 0x00u, 0x00u, 0x00u, 0xC0u, 0x00u, 0x00u, 0x00u, 0x01u, 0x00u, 0xC0u, 0x00u, 
2051                         0x00u, 0x00u, 0x80u, 0x0Eu, 0x3Fu, 0x70u, 0x40u, 0x01u, 0x20u, 0x20u, 0x00u, 0x00u, 0x00u, 0x00u, 0x54u, 0x44u, 
2052                         0x56u, 0x02u, 0x10u, 0x00u, 0x03u, 0xBEu, 0xFDu, 0x0Cu, 0x1Fu, 0xFFu, 0xFFu, 0xFFu, 0x22u, 0x00u, 0xF0u, 0x08u, 
2053                         0x04u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x02u, 0x20u, 0x04u, 0x04u, 0x04u, 0x04u, 0x00u, 0x00u, 0x00u, 0x01u, 
2054                         0x00u, 0x00u, 0xC0u, 0x00u, 0x40u, 0x01u, 0x10u, 0x11u, 0xC0u, 0x01u, 0x00u, 0x11u, 0x40u, 0x01u, 0x40u, 0x01u, 
2055                         0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};
2056
2057                 /* UCFG_BCTL0 Address: CYREG_BCTL0_MDCLK_EN Size (bytes): 16 */
2058                 static const uint8 CYCODE BS_UCFG_BCTL0_VAL[] = {
2059                         0x03u, 0x01u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x02u, 0x01u, 0x02u, 0x01u, 0x03u, 0x01u, 0x03u, 0x01u};
2060
2061                 static const cfg_memcpy_t CYCODE cfg_memcpy_list [] = {
2062                         /* dest, src, size */
2063                         {(void CYFAR *)(CYDEV_UCFG_B1_P4_U1_BASE), BS_UDB_0_1_0_CONFIG_VAL, 128u},
2064                         {(void CYFAR *)(CYREG_BCTL0_MDCLK_EN), BS_UCFG_BCTL0_VAL, 16u},
2065                 };
2066
2067                 uint8 CYDATA i;
2068
2069                 /* Zero out critical memory blocks before beginning configuration */
2070                 for (i = 0u; i < (sizeof(cfg_memset_list)/sizeof(cfg_memset_list[0])); i++)
2071                 {
2072                         const cfg_memset_t CYCODE * CYDATA ms = &cfg_memset_list[i];
2073                         CYMEMZERO(ms->address, (size_t)(uint32)(ms->size));
2074                 }
2075
2076                 /* Copy device configuration data into registers */
2077                 for (i = 0u; i < (sizeof(cfg_memcpy_list)/sizeof(cfg_memcpy_list[0])); i++)
2078                 {
2079                         const cfg_memcpy_t CYCODE * CYDATA mc = &cfg_memcpy_list[i];
2080                         void * CYDATA destPtr = mc->dest;
2081                         const void CYCODE * CYDATA srcPtr = mc->src;
2082                         uint16 CYDATA numBytes = mc->size;
2083                         CYCONFIGCPYCODE(destPtr, srcPtr, numBytes);
2084                 }
2085
2086                 cfg_write_bytes32(cy_cfg_addr_table, cy_cfg_data_table);
2087
2088                 /* Perform normal device configuration. Order is not critical for these items. */
2089                 CYMEMZERO((void CYFAR *)(CYREG_PHUB_CFGMEM0_CFG0), 4u);
2090                 CYCONFIGCPYCODE((void CYFAR *)(CYREG_PHUB_CFGMEM1_CFG0), (const void CYCODE *)(BS_PHUB_CFGMEM1_VAL), 4u);
2091                 CYCONFIGCPYCODE((void CYFAR *)(CYREG_PHUB_CFGMEM2_CFG0), (const void CYCODE *)(BS_PHUB_CFGMEM2_VAL), 4u);
2092                 CYCONFIGCPYCODE((void CYFAR *)(CYREG_PHUB_CFGMEM3_CFG0), (const void CYCODE *)(BS_PHUB_CFGMEM3_VAL), 4u);
2093
2094                 /* Enable digital routing */
2095                 CY_SET_XTND_REG8((void CYFAR *)CYREG_BCTL0_BANK_CTL, CY_GET_XTND_REG8((void CYFAR *)CYREG_BCTL0_BANK_CTL) | 0x02u);
2096                 CY_SET_XTND_REG8((void CYFAR *)CYREG_BCTL1_BANK_CTL, CY_GET_XTND_REG8((void CYFAR *)CYREG_BCTL1_BANK_CTL) | 0x02u);
2097
2098                 /* Enable UDB array */
2099                 CY_SET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG0, CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG0) | 0x40u);
2100                 CY_SET_XTND_REG8((void CYFAR *)CYREG_PM_AVAIL_CR2, CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_AVAIL_CR2) | 0x10u);
2101         }
2102
2103         /* Perform second pass device configuration. These items must be configured in specific order after the regular configuration is done. */
2104         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT0_DR), (const void CYCODE *)(BS_IOPINS0_0_VAL), 10u);
2105         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT12_DM0), (const void CYCODE *)(BS_IOPINS0_7_VAL), 8u);
2106         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT12_DM0 + 0x00000009u), (const void CYCODE *)(BS_IOPINS1_7_VAL), 5u);
2107         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT15_DR), (const void CYCODE *)(BS_IOPINS0_8_VAL), 10u);
2108         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT2_DM0), (const void CYCODE *)(BS_IOPINS0_2_VAL), 8u);
2109         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT3_DR), (const void CYCODE *)(BS_IOPINS0_3_VAL), 10u);
2110         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT4_DM0), (const void CYCODE *)(BS_IOPINS0_4_VAL), 8u);
2111         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT5_DM0), (const void CYCODE *)(BS_IOPINS0_5_VAL), 8u);
2112         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT6_DM0), (const void CYCODE *)(BS_IOPINS0_6_VAL), 8u);
2113
2114         /* Switch Boost to the precision bandgap reference from its internal reference */
2115         CY_SET_REG8((void CYXDATA *)CYREG_BOOST_CR2, (CY_GET_REG8((void CYXDATA *)CYREG_BOOST_CR2) | 0x08u));
2116
2117         /* Perform basic analog initialization to defaults */
2118         AnalogSetDefault();
2119
2120         /* Configure alternate active mode */
2121         CYCONFIGCPY((void CYFAR *)CYDEV_PM_STBY_BASE, (const void CYFAR *)CYDEV_PM_ACT_BASE, 14u);
2122 }