81a8b880b1d2ef5a29eb85925d91587cf57ce40b
[SCSI2SD-V6.git] / software / SCSI2SD / v4 / SCSI2SD.cydsn / Generated_Source / PSoC5 / cyfitter_cfg.c
1 /*******************************************************************************
2 * FILENAME: cyfitter_cfg.c
3 * PSoC Creator  3.1
4 *
5 * Description:
6 * This file is automatically generated by PSoC Creator with device 
7 * initialization code.  Except for the user defined sections in
8 * CyClockStartupError(), this file should not be modified.
9 *
10 ********************************************************************************
11 * Copyright 2013, Cypress Semiconductor Corporation.  All rights reserved.
12 * You may use this file only in accordance with the license, terms, conditions, 
13 * disclaimers, and limitations in the end user license agreement accompanying 
14 * the software package with which this file was provided.
15 ********************************************************************************/
16
17 #include <string.h>
18 #include <cytypes.h>
19 #include <cydevice_trm.h>
20 #include <cyfitter.h>
21 #include <CyLib.h>
22 #include <cyfitter_cfg.h>
23
24 #define CY_NEED_CYCLOCKSTARTUPERROR 1
25
26
27 #if defined(__GNUC__) || defined(__ARMCC_VERSION)
28     #define CYPACKED 
29     #define CYPACKED_ATTR __attribute__ ((packed))
30     #define CYALIGNED __attribute__ ((aligned))
31     #define CY_CFG_UNUSED __attribute__ ((unused))
32     #define CY_CFG_SECTION __attribute__ ((section(".psocinit")))
33     
34     #if defined(__ARMCC_VERSION)
35         #define CY_CFG_MEMORY_BARRIER() __memory_changed()
36     #else
37         #define CY_CFG_MEMORY_BARRIER() __sync_synchronize()
38     #endif
39     
40 #elif defined(__ICCARM__)
41     #include <intrinsics.h>
42
43     #define CYPACKED __packed
44     #define CYPACKED_ATTR 
45     #define CYALIGNED _Pragma("data_alignment=4")
46     #define CY_CFG_UNUSED _Pragma("diag_suppress=Pe177")
47     #define CY_CFG_SECTION _Pragma("location=\".psocinit\"")
48     
49     #define CY_CFG_MEMORY_BARRIER() __DMB()
50     
51 #else
52     #error Unsupported toolchain
53 #endif
54
55
56 CY_CFG_UNUSED
57 static void CYMEMZERO(void *s, size_t n);
58 CY_CFG_UNUSED
59 static void CYMEMZERO(void *s, size_t n)
60 {
61         (void)memset(s, 0, n);
62 }
63 CY_CFG_UNUSED
64 static void CYCONFIGCPY(void *dest, const void *src, size_t n);
65 CY_CFG_UNUSED
66 static void CYCONFIGCPY(void *dest, const void *src, size_t n)
67 {
68         (void)memcpy(dest, src, n);
69 }
70 CY_CFG_UNUSED
71 static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n);
72 CY_CFG_UNUSED
73 static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n)
74 {
75         (void)memcpy(dest, src, n);
76 }
77
78
79
80 /* Clock startup error codes                                                   */
81 #define CYCLOCKSTART_NO_ERROR    0u
82 #define CYCLOCKSTART_XTAL_ERROR  1u
83 #define CYCLOCKSTART_32KHZ_ERROR 2u
84 #define CYCLOCKSTART_PLL_ERROR   3u
85
86 #ifdef CY_NEED_CYCLOCKSTARTUPERROR
87 /*******************************************************************************
88 * Function Name: CyClockStartupError
89 ********************************************************************************
90 * Summary:
91 *  If an error is encountered during clock configuration (crystal startup error,
92 *  PLL lock error, etc.), the system will end up here.  Unless reimplemented by
93 *  the customer, this function will stop in an infinite loop.
94 *
95 * Parameters:
96 *   void
97 *
98 * Return:
99 *   void
100 *
101 *******************************************************************************/
102 CY_CFG_UNUSED
103 static void CyClockStartupError(uint8 errorCode);
104 CY_CFG_UNUSED
105 static void CyClockStartupError(uint8 errorCode)
106 {
107     /* To remove the compiler warning if errorCode not used.                */
108     errorCode = errorCode;
109
110     /* `#START CyClockStartupError` */
111
112     /* If we have a clock startup error (bad MHz crystal, PLL lock, etc.),  */
113     /* we will end up here to allow the customer to implement something to  */
114     /* deal with the clock condition.                                       */
115
116     /* `#END` */
117
118     /* If nothing else, stop here since the clocks have not started         */
119     /* correctly.                                                           */
120     while(1) {}
121 }
122 #endif
123
124 #define CY_CFG_BASE_ADDR_COUNT 40u
125 CYPACKED typedef struct
126 {
127         uint8 offset;
128         uint8 value;
129 } CYPACKED_ATTR cy_cfg_addrvalue_t;
130
131
132
133 /*******************************************************************************
134 * Function Name: cfg_write_bytes32
135 ********************************************************************************
136 * Summary:
137 *  This function is used for setting up the chip configuration areas that
138 *  contain relatively sparse data.
139 *
140 * Parameters:
141 *   void
142 *
143 * Return:
144 *   void
145 *
146 *******************************************************************************/
147 static void cfg_write_bytes32(const uint32 addr_table[], const cy_cfg_addrvalue_t data_table[]);
148 static void cfg_write_bytes32(const uint32 addr_table[], const cy_cfg_addrvalue_t data_table[])
149 {
150         /* For 32-bit little-endian architectures */
151         uint32 i, j = 0u;
152         for (i = 0u; i < CY_CFG_BASE_ADDR_COUNT; i++)
153         {
154                 uint32 baseAddr = addr_table[i];
155                 uint8 count = (uint8)baseAddr;
156                 baseAddr &= 0xFFFFFF00u;
157                 while (count != 0u)
158                 {
159                         CY_SET_XTND_REG8((void CYFAR *)(baseAddr + data_table[j].offset), data_table[j].value);
160                         j++;
161                         count--;
162                 }
163         }
164 }
165
166 /*******************************************************************************
167 * Function Name: ClockSetup
168 ********************************************************************************
169 *
170 * Summary:
171 *  Performs the initialization of all of the clocks in the device based on the
172 *  settings in the Clock tab of the DWR.  This includes enabling the requested
173 *  clocks and setting the necessary dividers to produce the desired frequency. 
174 *
175 * Parameters:
176 *  void
177 *
178 * Return:
179 *  void
180 *
181 *******************************************************************************/
182 static void ClockSetup(void);
183 static void ClockSetup(void)
184 {
185         uint32 timeout;
186         uint8 pllLock;
187
188
189         /* Configure Digital Clocks based on settings from Clock DWR */
190         CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_DCFG0_CFG0), 0x0000u);
191         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_DCFG0_CFG0 + 0x2u), 0x58u);
192         CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_DCFG1_CFG0), 0x0000u);
193         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_DCFG1_CFG0 + 0x2u), 0x58u);
194         CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_DCFG2_CFG0), 0x0017u);
195         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_DCFG2_CFG0 + 0x2u), 0x19u);
196
197         /* Configure ILO based on settings from Clock DWR */
198         CY_SET_XTND_REG8((void CYFAR *)(CYREG_SLOWCLK_ILO_CR0), 0x06u);
199
200         /* Configure IMO based on settings from Clock DWR */
201         CY_SET_XTND_REG8((void CYFAR *)(CYREG_FASTCLK_IMO_CR), 0x52u);
202         CY_SET_XTND_REG8((void CYFAR *)(CYREG_IMO_TR1), (CY_GET_XTND_REG8((void CYFAR *)CYREG_FLSHID_CUST_TABLES_IMO_USB)));
203
204         /* Configure PLL based on settings from Clock DWR */
205         CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_P), 0x0B19u);
206         CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_CFG0), 0x1251u);
207         /* Wait up to 250us for the PLL to lock */
208         pllLock = 0u;
209         for (timeout = 250u / 10u; (timeout > 0u) && (pllLock != 0x03u); timeout--)
210         { 
211                 pllLock = 0x03u & ((uint8)((uint8)pllLock << 1) | ((CY_GET_XTND_REG8((void CYFAR *)CYREG_FASTCLK_PLL_SR) & 0x01u) >> 0));
212                 CyDelayCycles(10u * 48u); /* Delay 10us based on 48MHz clock */
213         }
214         /* If we ran out of time the PLL didn't lock so go to the error function */
215         if (timeout == 0u)
216         {
217                 CyClockStartupError(CYCLOCKSTART_PLL_ERROR);
218         }
219
220         /* Configure Bus/Master Clock based on settings from Clock DWR */
221         CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x0100u);
222         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x07u);
223         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG0), 0x00u);
224         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG2), 0x48u);
225         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x00u);
226
227         /* Configure USB Clock based on settings from Clock DWR */
228         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_UCFG), 0x00u);
229         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_LD), 0x02u);
230
231         CY_SET_XTND_REG8((void CYFAR *)(CYREG_PM_ACT_CFG2), ((CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG2) | 0x07u)));
232 }
233
234
235 /* Analog API Functions */
236
237
238 /*******************************************************************************
239 * Function Name: AnalogSetDefault
240 ********************************************************************************
241 *
242 * Summary:
243 *  Sets up the analog portions of the chip to default values based on chip
244 *  configuration options from the project.
245 *
246 * Parameters:
247 *  void
248 *
249 * Return:
250 *  void
251 *
252 *******************************************************************************/
253 static void AnalogSetDefault(void);
254 static void AnalogSetDefault(void)
255 {
256         uint8 bg_xover_inl_trim = CY_GET_XTND_REG8((void CYFAR *)(CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM + 1u));
257         CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT0), (bg_xover_inl_trim & 0x07u));
258         CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT1), ((bg_xover_inl_trim >> 4) & 0x0Fu));
259         CY_SET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0, 0x44u);
260 }
261
262
263 /*******************************************************************************
264 * Function Name: SetAnalogRoutingPumps
265 ********************************************************************************
266 *
267 * Summary:
268 * Enables or disables the analog pumps feeding analog routing switches.
269 * Intended to be called at startup, based on the Vdda system configuration;
270 * may be called during operation when the user informs us that the Vdda voltage
271 * crossed the pump threshold.
272 *
273 * Parameters:
274 *  enabled - 1 to enable the pumps, 0 to disable the pumps
275 *
276 * Return:
277 *  void
278 *
279 *******************************************************************************/
280 void SetAnalogRoutingPumps(uint8 enabled)
281 {
282         uint8 regValue = CY_GET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0);
283         if (enabled != 0u)
284         {
285                 regValue |= 0x00u;
286         }
287         else
288         {
289                 regValue &= (uint8)~0x00u;
290         }
291         CY_SET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0, regValue);
292 }
293
294 #define CY_AMUX_UNUSED CYREG_BOOST_SR
295
296
297 /*******************************************************************************
298 * Function Name: cyfitter_cfg
299 ********************************************************************************
300 * Summary:
301 *  This function is called by the start-up code for the selected device. It
302 *  performs all of the necessary device configuration based on the design
303 *  settings.  This includes settings from the Design Wide Resources (DWR) such
304 *  as Clocks and Pins as well as any component configuration that is necessary.
305 *
306 * Parameters:  
307 *   void
308 *
309 * Return:
310 *   void
311 *
312 *******************************************************************************/
313
314 void cyfitter_cfg(void)
315 {
316         /* IOPINS0_0 Address: CYREG_PRT0_DR Size (bytes): 10 */
317         static const uint8 CYCODE BS_IOPINS0_0_VAL[] = {
318                 0x02u, 0x00u, 0x31u, 0xCCu, 0xCEu, 0x00u, 0x4Cu, 0x00u, 0x00u, 0x01u};
319
320         /* IOPINS0_7 Address: CYREG_PRT12_DM0 Size (bytes): 8 */
321         static const uint8 CYCODE BS_IOPINS0_7_VAL[] = {
322                 0x30u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};
323
324         /* IOPINS1_7 Address: CYREG_PRT12_DM0 + 0x00000009u Size (bytes): 5 */
325         static const uint8 CYCODE BS_IOPINS1_7_VAL[] = {
326                 0x00u, 0x00u, 0x00u, 0x00u, 0x10u};
327
328         /* IOPINS0_8 Address: CYREG_PRT15_DR Size (bytes): 10 */
329         static const uint8 CYCODE BS_IOPINS0_8_VAL[] = {
330                 0x00u, 0x00u, 0x00u, 0x30u, 0x30u, 0x00u, 0x20u, 0x00u, 0xC0u, 0x00u};
331
332         /* IOPINS0_2 Address: CYREG_PRT2_DM0 Size (bytes): 8 */
333         static const uint8 CYCODE BS_IOPINS0_2_VAL[] = {
334                 0x33u, 0xCCu, 0xCCu, 0x00u, 0xCCu, 0x00u, 0x00u, 0x01u};
335
336         /* IOPINS0_3 Address: CYREG_PRT3_DR Size (bytes): 10 */
337         static const uint8 CYCODE BS_IOPINS0_3_VAL[] = {
338                 0x10u, 0x00u, 0x22u, 0x1Cu, 0x1Cu, 0x00u, 0x0Cu, 0x00u, 0x00u, 0x01u};
339
340         /* IOPINS0_4 Address: CYREG_PRT4_DM0 Size (bytes): 8 */
341         static const uint8 CYCODE BS_IOPINS0_4_VAL[] = {
342                 0xCCu, 0x30u, 0x30u, 0x00u, 0x10u, 0x00u, 0x00u, 0x01u};
343
344         /* IOPINS0_5 Address: CYREG_PRT5_DM0 Size (bytes): 8 */
345         static const uint8 CYCODE BS_IOPINS0_5_VAL[] = {
346                 0x0Cu, 0x03u, 0x03u, 0x00u, 0x03u, 0x00u, 0x00u, 0x01u};
347
348         /* IOPINS0_6 Address: CYREG_PRT6_DM0 Size (bytes): 8 */
349         static const uint8 CYCODE BS_IOPINS0_6_VAL[] = {
350                 0xCCu, 0x33u, 0x33u, 0x00u, 0x30u, 0x00u, 0x00u, 0x01u};
351
352         /* PHUB_CFGMEM1 Address: CYREG_PHUB_CFGMEM1_CFG0 Size (bytes): 4 */
353         static const uint8 CYCODE BS_PHUB_CFGMEM1_VAL[] = {
354                 0x00u, 0x01u, 0x00u, 0x00u};
355
356         /* PHUB_CFGMEM2 Address: CYREG_PHUB_CFGMEM2_CFG0 Size (bytes): 4 */
357         static const uint8 CYCODE BS_PHUB_CFGMEM2_VAL[] = {
358                 0x00u, 0x02u, 0x00u, 0x00u};
359
360         /* PHUB_CFGMEM3 Address: CYREG_PHUB_CFGMEM3_CFG0 Size (bytes): 4 */
361         static const uint8 CYCODE BS_PHUB_CFGMEM3_VAL[] = {
362                 0x00u, 0x03u, 0x00u, 0x00u};
363
364 #ifdef CYGlobalIntDisable
365         /* Disable interrupts by default. Let user enable if/when they want. */
366         CYGlobalIntDisable
367 #endif
368
369
370         /* Set Flash Cycles based on max possible frequency in case a glitch occurs during ClockSetup(). */
371         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x01u : 0x00u));
372         /* Setup clocks based on selections from Clock DWR */
373         ClockSetup();
374         /* Set Flash Cycles based on newly configured 50.00MHz Bus Clock. */
375         CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0xC1u : 0xC0u));
376         /* Enable/Disable Debug functionality based on settings from System DWR */
377         CY_SET_XTND_REG8((void CYFAR *)CYREG_MLOGIC_DEBUG, (CY_GET_XTND_REG8((void CYFAR *)CYREG_MLOGIC_DEBUG) | 0x04u));
378
379         {
380                 static const uint32 CYCODE cy_cfg_addr_table[] = {
381                         0x40004501u, /* Base address: 0x40004500 Count: 1 */
382                         0x40004F02u, /* Base address: 0x40004F00 Count: 2 */
383                         0x4000520Fu, /* Base address: 0x40005200 Count: 15 */
384                         0x40006401u, /* Base address: 0x40006400 Count: 1 */
385                         0x40006501u, /* Base address: 0x40006500 Count: 1 */
386                         0x40010050u, /* Base address: 0x40010000 Count: 80 */
387                         0x4001013Eu, /* Base address: 0x40010100 Count: 62 */
388                         0x4001024Eu, /* Base address: 0x40010200 Count: 78 */
389                         0x40010358u, /* Base address: 0x40010300 Count: 88 */
390                         0x40010450u, /* Base address: 0x40010400 Count: 80 */
391                         0x4001054Eu, /* Base address: 0x40010500 Count: 78 */
392                         0x4001070Fu, /* Base address: 0x40010700 Count: 15 */
393                         0x4001084Bu, /* Base address: 0x40010800 Count: 75 */
394                         0x40010942u, /* Base address: 0x40010900 Count: 66 */
395                         0x40010A39u, /* Base address: 0x40010A00 Count: 57 */
396                         0x40010B50u, /* Base address: 0x40010B00 Count: 80 */
397                         0x40010C52u, /* Base address: 0x40010C00 Count: 82 */
398                         0x40010D54u, /* Base address: 0x40010D00 Count: 84 */
399                         0x40010E46u, /* Base address: 0x40010E00 Count: 70 */
400                         0x40010F3Du, /* Base address: 0x40010F00 Count: 61 */
401                         0x40011505u, /* Base address: 0x40011500 Count: 5 */
402                         0x40011703u, /* Base address: 0x40011700 Count: 3 */
403                         0x40011857u, /* Base address: 0x40011800 Count: 87 */
404                         0x40011941u, /* Base address: 0x40011900 Count: 65 */
405                         0x40011A4Bu, /* Base address: 0x40011A00 Count: 75 */
406                         0x40011B48u, /* Base address: 0x40011B00 Count: 72 */
407                         0x40014014u, /* Base address: 0x40014000 Count: 20 */
408                         0x4001411Bu, /* Base address: 0x40014100 Count: 27 */
409                         0x40014217u, /* Base address: 0x40014200 Count: 23 */
410                         0x4001430Au, /* Base address: 0x40014300 Count: 10 */
411                         0x40014414u, /* Base address: 0x40014400 Count: 20 */
412                         0x40014519u, /* Base address: 0x40014500 Count: 25 */
413                         0x4001460Fu, /* Base address: 0x40014600 Count: 15 */
414                         0x4001470Eu, /* Base address: 0x40014700 Count: 14 */
415                         0x40014809u, /* Base address: 0x40014800 Count: 9 */
416                         0x4001490Eu, /* Base address: 0x40014900 Count: 14 */
417                         0x40014C07u, /* Base address: 0x40014C00 Count: 7 */
418                         0x40014D0Au, /* Base address: 0x40014D00 Count: 10 */
419                         0x40015004u, /* Base address: 0x40015000 Count: 4 */
420                         0x40015104u, /* Base address: 0x40015100 Count: 4 */
421                 };
422
423                 static const cy_cfg_addrvalue_t CYCODE cy_cfg_data_table[] = {
424                         {0x7Eu, 0x02u},
425                         {0x01u, 0x20u},
426                         {0x0Au, 0x4Bu},
427                         {0x00u, 0x01u},
428                         {0x01u, 0x48u},
429                         {0x04u, 0x31u},
430                         {0x10u, 0xC8u},
431                         {0x11u, 0x48u},
432                         {0x18u, 0x04u},
433                         {0x19u, 0x08u},
434                         {0x1Cu, 0x30u},
435                         {0x20u, 0x10u},
436                         {0x24u, 0x44u},
437                         {0x28u, 0x03u},
438                         {0x29u, 0x02u},
439                         {0x31u, 0x20u},
440                         {0x78u, 0x20u},
441                         {0x7Cu, 0x40u},
442                         {0x2Bu, 0x02u},
443                         {0x8Au, 0x0Fu},
444                         {0x01u, 0x50u},
445                         {0x03u, 0xA0u},
446                         {0x05u, 0x06u},
447                         {0x06u, 0x02u},
448                         {0x07u, 0x09u},
449                         {0x09u, 0x05u},
450                         {0x0Au, 0x04u},
451                         {0x0Bu, 0x0Au},
452                         {0x12u, 0x01u},
453                         {0x15u, 0x60u},
454                         {0x17u, 0x90u},
455                         {0x1Bu, 0xFFu},
456                         {0x1Cu, 0x04u},
457                         {0x1Du, 0x30u},
458                         {0x1Fu, 0xC0u},
459                         {0x20u, 0x01u},
460                         {0x21u, 0x03u},
461                         {0x22u, 0x02u},
462                         {0x23u, 0x0Cu},
463                         {0x24u, 0x04u},
464                         {0x27u, 0xFFu},
465                         {0x29u, 0xFFu},
466                         {0x2Au, 0x04u},
467                         {0x2Cu, 0x04u},
468                         {0x2Du, 0x0Fu},
469                         {0x2Fu, 0xF0u},
470                         {0x30u, 0x03u},
471                         {0x33u, 0xFFu},
472                         {0x36u, 0x04u},
473                         {0x39u, 0x20u},
474                         {0x3Eu, 0x41u},
475                         {0x3Fu, 0x14u},
476                         {0x58u, 0x04u},
477                         {0x59u, 0x04u},
478                         {0x5Bu, 0x04u},
479                         {0x5Fu, 0x01u},
480                         {0x81u, 0x0Fu},
481                         {0x83u, 0xF0u},
482                         {0x87u, 0xFFu},
483                         {0x88u, 0x09u},
484                         {0x89u, 0xFFu},
485                         {0x8Au, 0x06u},
486                         {0x8Cu, 0x03u},
487                         {0x8Du, 0x90u},
488                         {0x8Eu, 0x0Cu},
489                         {0x8Fu, 0x60u},
490                         {0x90u, 0x50u},
491                         {0x91u, 0x03u},
492                         {0x92u, 0xA0u},
493                         {0x93u, 0x0Cu},
494                         {0x94u, 0x90u},
495                         {0x96u, 0x60u},
496                         {0x98u, 0x05u},
497                         {0x99u, 0x05u},
498                         {0x9Au, 0x0Au},
499                         {0x9Bu, 0x0Au},
500                         {0x9Cu, 0x30u},
501                         {0x9Du, 0x50u},
502                         {0x9Eu, 0xC0u},
503                         {0x9Fu, 0xA0u},
504                         {0xA0u, 0x0Fu},
505                         {0xA1u, 0x30u},
506                         {0xA2u, 0xF0u},
507                         {0xA3u, 0xC0u},
508                         {0xA5u, 0xFFu},
509                         {0xA6u, 0xFFu},
510                         {0xA9u, 0x09u},
511                         {0xAAu, 0xFFu},
512                         {0xABu, 0x06u},
513                         {0xAEu, 0xFFu},
514                         {0xB1u, 0xFFu},
515                         {0xB4u, 0xFFu},
516                         {0xBEu, 0x10u},
517                         {0xBFu, 0x01u},
518                         {0xD6u, 0x08u},
519                         {0xD8u, 0x04u},
520                         {0xD9u, 0x04u},
521                         {0xDBu, 0x04u},
522                         {0xDDu, 0x90u},
523                         {0xDFu, 0x01u},
524                         {0x03u, 0x18u},
525                         {0x05u, 0x20u},
526                         {0x06u, 0x06u},
527                         {0x07u, 0x02u},
528                         {0x09u, 0x80u},
529                         {0x0Au, 0x80u},
530                         {0x0Cu, 0x90u},
531                         {0x0Du, 0x19u},
532                         {0x0Eu, 0x02u},
533                         {0x0Fu, 0x08u},
534                         {0x10u, 0x24u},
535                         {0x12u, 0x41u},
536                         {0x15u, 0x04u},
537                         {0x16u, 0x68u},
538                         {0x17u, 0x40u},
539                         {0x18u, 0x80u},
540                         {0x19u, 0x40u},
541                         {0x1Fu, 0x20u},
542                         {0x22u, 0x10u},
543                         {0x23u, 0x10u},
544                         {0x26u, 0x02u},
545                         {0x2Au, 0x6Au},
546                         {0x2Cu, 0x80u},
547                         {0x2Du, 0x24u},
548                         {0x30u, 0x80u},
549                         {0x31u, 0x08u},
550                         {0x32u, 0x20u},
551                         {0x34u, 0x90u},
552                         {0x37u, 0x02u},
553                         {0x39u, 0x22u},
554                         {0x3Au, 0x04u},
555                         {0x3Cu, 0x10u},
556                         {0x3Du, 0x81u},
557                         {0x3Eu, 0x08u},
558                         {0x58u, 0x04u},
559                         {0x59u, 0x04u},
560                         {0x5Au, 0x41u},
561                         {0x5Bu, 0x20u},
562                         {0x5Cu, 0x40u},
563                         {0x61u, 0x40u},
564                         {0x67u, 0x02u},
565                         {0x80u, 0x90u},
566                         {0x82u, 0x20u},
567                         {0x83u, 0x51u},
568                         {0x85u, 0x01u},
569                         {0x86u, 0x40u},
570                         {0x8Au, 0x01u},
571                         {0x8Bu, 0x04u},
572                         {0x8Cu, 0x42u},
573                         {0x8Eu, 0x70u},
574                         {0x8Fu, 0x02u},
575                         {0xC0u, 0xC6u},
576                         {0xC2u, 0xF9u},
577                         {0xC4u, 0xFFu},
578                         {0xCAu, 0xEFu},
579                         {0xCCu, 0xBEu},
580                         {0xCEu, 0xF7u},
581                         {0xD6u, 0x1Fu},
582                         {0xD8u, 0x18u},
583                         {0xE2u, 0x4Cu},
584                         {0xE4u, 0x04u},
585                         {0xE6u, 0x01u},
586                         {0x01u, 0x03u},
587                         {0x02u, 0x01u},
588                         {0x03u, 0x0Cu},
589                         {0x09u, 0xFFu},
590                         {0x0Au, 0x02u},
591                         {0x0Du, 0x60u},
592                         {0x0Fu, 0x90u},
593                         {0x11u, 0x30u},
594                         {0x12u, 0x04u},
595                         {0x13u, 0xC0u},
596                         {0x19u, 0x06u},
597                         {0x1Au, 0x10u},
598                         {0x1Bu, 0x09u},
599                         {0x1Du, 0x50u},
600                         {0x1Fu, 0xA0u},
601                         {0x20u, 0x02u},
602                         {0x21u, 0x0Fu},
603                         {0x22u, 0x04u},
604                         {0x23u, 0xF0u},
605                         {0x27u, 0xFFu},
606                         {0x29u, 0x05u},
607                         {0x2Au, 0x08u},
608                         {0x2Bu, 0x0Au},
609                         {0x2Fu, 0xFFu},
610                         {0x30u, 0x10u},
611                         {0x32u, 0x06u},
612                         {0x33u, 0xFFu},
613                         {0x34u, 0x01u},
614                         {0x36u, 0x08u},
615                         {0x3Eu, 0x04u},
616                         {0x3Fu, 0x04u},
617                         {0x56u, 0x08u},
618                         {0x58u, 0x04u},
619                         {0x59u, 0x04u},
620                         {0x5Bu, 0x04u},
621                         {0x5Cu, 0x09u},
622                         {0x5Du, 0x90u},
623                         {0x5Fu, 0x01u},
624                         {0x80u, 0x50u},
625                         {0x82u, 0xA0u},
626                         {0x86u, 0x08u},
627                         {0x89u, 0x0Fu},
628                         {0x8Au, 0x07u},
629                         {0x8Bu, 0xF0u},
630                         {0x8Cu, 0x0Au},
631                         {0x8Du, 0x69u},
632                         {0x8Eu, 0x05u},
633                         {0x8Fu, 0x96u},
634                         {0x91u, 0xFFu},
635                         {0x92u, 0x40u},
636                         {0x95u, 0x33u},
637                         {0x97u, 0xCCu},
638                         {0x9Au, 0x80u},
639                         {0x9Bu, 0xFFu},
640                         {0x9Cu, 0x09u},
641                         {0x9Eu, 0x02u},
642                         {0x9Fu, 0xFFu},
643                         {0xA1u, 0xFFu},
644                         {0xA2u, 0x10u},
645                         {0xA4u, 0x04u},
646                         {0xA6u, 0x08u},
647                         {0xA9u, 0x55u},
648                         {0xAAu, 0x20u},
649                         {0xABu, 0xAAu},
650                         {0xAFu, 0xFFu},
651                         {0xB0u, 0x30u},
652                         {0xB2u, 0x0Fu},
653                         {0xB4u, 0xC0u},
654                         {0xB5u, 0xFFu},
655                         {0xBBu, 0x20u},
656                         {0xBEu, 0x11u},
657                         {0xD4u, 0x01u},
658                         {0xD8u, 0x04u},
659                         {0xD9u, 0x04u},
660                         {0xDBu, 0x04u},
661                         {0xDCu, 0x11u},
662                         {0xDDu, 0x10u},
663                         {0xDFu, 0x01u},
664                         {0x01u, 0x09u},
665                         {0x02u, 0x01u},
666                         {0x03u, 0x08u},
667                         {0x04u, 0x20u},
668                         {0x06u, 0x80u},
669                         {0x09u, 0x82u},
670                         {0x0Bu, 0x08u},
671                         {0x0Du, 0x01u},
672                         {0x0Eu, 0x04u},
673                         {0x10u, 0x28u},
674                         {0x11u, 0x02u},
675                         {0x15u, 0x01u},
676                         {0x17u, 0x20u},
677                         {0x18u, 0xA0u},
678                         {0x1Bu, 0x1Cu},
679                         {0x1Cu, 0x22u},
680                         {0x1Du, 0x01u},
681                         {0x1Eu, 0x04u},
682                         {0x1Fu, 0x02u},
683                         {0x21u, 0x10u},
684                         {0x26u, 0x08u},
685                         {0x28u, 0x02u},
686                         {0x29u, 0x50u},
687                         {0x2Au, 0x01u},
688                         {0x2Cu, 0x02u},
689                         {0x2Du, 0x01u},
690                         {0x2Eu, 0x08u},
691                         {0x2Fu, 0x08u},
692                         {0x30u, 0x24u},
693                         {0x32u, 0x01u},
694                         {0x33u, 0x41u},
695                         {0x34u, 0x80u},
696                         {0x36u, 0x01u},
697                         {0x37u, 0x10u},
698                         {0x39u, 0xA0u},
699                         {0x3Cu, 0x10u},
700                         {0x3Du, 0x80u},
701                         {0x3Eu, 0x02u},
702                         {0x46u, 0x44u},
703                         {0x47u, 0x11u},
704                         {0x5Bu, 0x80u},
705                         {0x5Cu, 0x40u},
706                         {0x5Du, 0x10u},
707                         {0x66u, 0xA0u},
708                         {0x80u, 0x40u},
709                         {0x84u, 0x01u},
710                         {0x87u, 0x20u},
711                         {0x8Du, 0x54u},
712                         {0x90u, 0x10u},
713                         {0x91u, 0x03u},
714                         {0x92u, 0x02u},
715                         {0x93u, 0x18u},
716                         {0x98u, 0x80u},
717                         {0x9Au, 0x02u},
718                         {0x9Du, 0x04u},
719                         {0x9Eu, 0x0Du},
720                         {0xA0u, 0x02u},
721                         {0xA1u, 0x41u},
722                         {0xA2u, 0x03u},
723                         {0xA3u, 0x20u},
724                         {0xA4u, 0x20u},
725                         {0xA5u, 0x80u},
726                         {0xA7u, 0x04u},
727                         {0xA9u, 0x01u},
728                         {0xACu, 0x80u},
729                         {0xADu, 0x01u},
730                         {0xAFu, 0x20u},
731                         {0xB1u, 0x48u},
732                         {0xB2u, 0x01u},
733                         {0xB3u, 0x08u},
734                         {0xB4u, 0x40u},
735                         {0xB6u, 0x40u},
736                         {0xC0u, 0x5Fu},
737                         {0xC2u, 0x5Bu},
738                         {0xC4u, 0x5Eu},
739                         {0xCAu, 0xFDu},
740                         {0xCCu, 0xBFu},
741                         {0xCEu, 0xBCu},
742                         {0xD6u, 0x38u},
743                         {0xD8u, 0x30u},
744                         {0xE0u, 0x01u},
745                         {0xE2u, 0x02u},
746                         {0xE4u, 0x08u},
747                         {0xE6u, 0x02u},
748                         {0xE8u, 0x40u},
749                         {0xEAu, 0x08u},
750                         {0xECu, 0x40u},
751                         {0xEEu, 0x03u},
752                         {0x00u, 0x02u},
753                         {0x02u, 0x04u},
754                         {0x05u, 0x06u},
755                         {0x07u, 0x09u},
756                         {0x09u, 0x05u},
757                         {0x0Bu, 0x0Au},
758                         {0x13u, 0x70u},
759                         {0x18u, 0x04u},
760                         {0x19u, 0x40u},
761                         {0x1Au, 0x02u},
762                         {0x1Bu, 0x1Fu},
763                         {0x1Cu, 0x04u},
764                         {0x1Du, 0x10u},
765                         {0x1Eu, 0x0Au},
766                         {0x1Fu, 0x2Fu},
767                         {0x21u, 0x20u},
768                         {0x23u, 0x4Fu},
769                         {0x24u, 0x04u},
770                         {0x25u, 0x0Fu},
771                         {0x26u, 0x03u},
772                         {0x29u, 0x03u},
773                         {0x2Bu, 0x0Cu},
774                         {0x2Cu, 0x04u},
775                         {0x2Eu, 0x02u},
776                         {0x30u, 0x06u},
777                         {0x31u, 0x7Fu},
778                         {0x34u, 0x08u},
779                         {0x36u, 0x01u},
780                         {0x3Au, 0x02u},
781                         {0x58u, 0x04u},
782                         {0x59u, 0x04u},
783                         {0x5Bu, 0x04u},
784                         {0x5Cu, 0x19u},
785                         {0x5Fu, 0x01u},
786                         {0x82u, 0x10u},
787                         {0x85u, 0x04u},
788                         {0x87u, 0x02u},
789                         {0x89u, 0x08u},
790                         {0x8Cu, 0x04u},
791                         {0x8Du, 0x04u},
792                         {0x8Eu, 0x02u},
793                         {0x8Fu, 0x02u},
794                         {0x91u, 0x08u},
795                         {0x94u, 0x02u},
796                         {0x95u, 0x08u},
797                         {0x96u, 0x04u},
798                         {0x98u, 0x04u},
799                         {0x99u, 0x02u},
800                         {0x9Au, 0x02u},
801                         {0x9Bu, 0x04u},
802                         {0x9Fu, 0x10u},
803                         {0xA0u, 0x04u},
804                         {0xA1u, 0x04u},
805                         {0xA2u, 0x0Au},
806                         {0xA3u, 0x02u},
807                         {0xA4u, 0x04u},
808                         {0xA5u, 0x08u},
809                         {0xA6u, 0x03u},
810                         {0xABu, 0x01u},
811                         {0xADu, 0x04u},
812                         {0xAFu, 0x02u},
813                         {0xB0u, 0x08u},
814                         {0xB1u, 0x08u},
815                         {0xB2u, 0x06u},
816                         {0xB3u, 0x06u},
817                         {0xB4u, 0x01u},
818                         {0xB5u, 0x10u},
819                         {0xB6u, 0x10u},
820                         {0xB7u, 0x01u},
821                         {0xB9u, 0x02u},
822                         {0xBAu, 0x08u},
823                         {0xBBu, 0x08u},
824                         {0xBFu, 0x01u},
825                         {0xD6u, 0x08u},
826                         {0xD8u, 0x04u},
827                         {0xD9u, 0x04u},
828                         {0xDBu, 0x04u},
829                         {0xDCu, 0x99u},
830                         {0xDDu, 0x90u},
831                         {0xDFu, 0x01u},
832                         {0x01u, 0x02u},
833                         {0x04u, 0x40u},
834                         {0x05u, 0x01u},
835                         {0x0Au, 0x09u},
836                         {0x0Eu, 0x28u},
837                         {0x10u, 0x01u},
838                         {0x12u, 0x20u},
839                         {0x16u, 0x20u},
840                         {0x17u, 0x02u},
841                         {0x19u, 0x02u},
842                         {0x1Au, 0x09u},
843                         {0x1Cu, 0x40u},
844                         {0x1Eu, 0x28u},
845                         {0x1Fu, 0x40u},
846                         {0x21u, 0x02u},
847                         {0x23u, 0x80u},
848                         {0x26u, 0x21u},
849                         {0x27u, 0x22u},
850                         {0x2Au, 0x09u},
851                         {0x2Bu, 0x08u},
852                         {0x2Du, 0x10u},
853                         {0x2Fu, 0x62u},
854                         {0x30u, 0x20u},
855                         {0x31u, 0x82u},
856                         {0x35u, 0x80u},
857                         {0x36u, 0x0Au},
858                         {0x37u, 0x20u},
859                         {0x38u, 0x04u},
860                         {0x39u, 0x20u},
861                         {0x3Eu, 0x84u},
862                         {0x3Fu, 0x10u},
863                         {0x58u, 0x0Au},
864                         {0x59u, 0x40u},
865                         {0x5Bu, 0x20u},
866                         {0x5Fu, 0x40u},
867                         {0x62u, 0x40u},
868                         {0x64u, 0x01u},
869                         {0x65u, 0x80u},
870                         {0x79u, 0x10u},
871                         {0x7Au, 0x04u},
872                         {0x82u, 0x01u},
873                         {0x87u, 0x40u},
874                         {0x89u, 0x08u},
875                         {0x90u, 0x04u},
876                         {0x91u, 0x20u},
877                         {0x92u, 0x04u},
878                         {0x93u, 0x10u},
879                         {0x98u, 0x02u},
880                         {0x99u, 0x01u},
881                         {0x9Au, 0xE8u},
882                         {0x9Du, 0x08u},
883                         {0x9Eu, 0x05u},
884                         {0x9Fu, 0xC0u},
885                         {0xA0u, 0x30u},
886                         {0xA2u, 0x0Au},
887                         {0xA3u, 0x22u},
888                         {0xA5u, 0x80u},
889                         {0xA8u, 0x44u},
890                         {0xACu, 0x24u},
891                         {0xADu, 0x10u},
892                         {0xB0u, 0x08u},
893                         {0xB1u, 0x40u},
894                         {0xB2u, 0x08u},
895                         {0xB5u, 0x02u},
896                         {0xB7u, 0x10u},
897                         {0xC0u, 0x98u},
898                         {0xC2u, 0x63u},
899                         {0xC4u, 0x35u},
900                         {0xCAu, 0xF7u},
901                         {0xCCu, 0xFDu},
902                         {0xCEu, 0x76u},
903                         {0xD6u, 0x1Fu},
904                         {0xD8u, 0x18u},
905                         {0xE2u, 0x48u},
906                         {0xE4u, 0x01u},
907                         {0xE6u, 0x20u},
908                         {0xEAu, 0x2Fu},
909                         {0xEEu, 0x0Cu},
910                         {0x8Fu, 0x08u},
911                         {0x9Eu, 0x04u},
912                         {0xA7u, 0x08u},
913                         {0xAAu, 0x01u},
914                         {0xACu, 0x10u},
915                         {0xADu, 0x40u},
916                         {0xAEu, 0x10u},
917                         {0xB4u, 0x08u},
918                         {0xB5u, 0x82u},
919                         {0xB7u, 0x40u},
920                         {0xE2u, 0x04u},
921                         {0xE6u, 0x04u},
922                         {0xE8u, 0x08u},
923                         {0xEAu, 0x84u},
924                         {0xEEu, 0x40u},
925                         {0x04u, 0x02u},
926                         {0x05u, 0xFFu},
927                         {0x06u, 0x0Du},
928                         {0x0Au, 0x10u},
929                         {0x0Bu, 0xFFu},
930                         {0x0Cu, 0x0Du},
931                         {0x10u, 0x0Du},
932                         {0x13u, 0xFFu},
933                         {0x14u, 0x0Du},
934                         {0x17u, 0xFFu},
935                         {0x18u, 0x0Du},
936                         {0x19u, 0xFFu},
937                         {0x1Du, 0x0Fu},
938                         {0x1Fu, 0xF0u},
939                         {0x20u, 0x0Du},
940                         {0x21u, 0x33u},
941                         {0x23u, 0xCCu},
942                         {0x24u, 0xE2u},
943                         {0x25u, 0x55u},
944                         {0x26u, 0x08u},
945                         {0x27u, 0xAAu},
946                         {0x28u, 0x82u},
947                         {0x29u, 0x69u},
948                         {0x2Au, 0x54u},
949                         {0x2Bu, 0x96u},
950                         {0x2Cu, 0x81u},
951                         {0x2Eu, 0x32u},
952                         {0x31u, 0xFFu},
953                         {0x32u, 0x0Fu},
954                         {0x34u, 0x70u},
955                         {0x36u, 0x80u},
956                         {0x3Au, 0x08u},
957                         {0x3Bu, 0x02u},
958                         {0x3Eu, 0x40u},
959                         {0x58u, 0x04u},
960                         {0x59u, 0x04u},
961                         {0x5Cu, 0x10u},
962                         {0x5Fu, 0x01u},
963                         {0x80u, 0x09u},
964                         {0x82u, 0x02u},
965                         {0x83u, 0x12u},
966                         {0x85u, 0x20u},
967                         {0x88u, 0x3Eu},
968                         {0x89u, 0x04u},
969                         {0x8Bu, 0x03u},
970                         {0x8Fu, 0x0Cu},
971                         {0x94u, 0x22u},
972                         {0x95u, 0x08u},
973                         {0x96u, 0x01u},
974                         {0x97u, 0x03u},
975                         {0x9Bu, 0x01u},
976                         {0x9Du, 0x01u},
977                         {0x9Fu, 0x02u},
978                         {0xA1u, 0x40u},
979                         {0xA2u, 0x38u},
980                         {0xA3u, 0x80u},
981                         {0xA4u, 0x01u},
982                         {0xA6u, 0x14u},
983                         {0xABu, 0x40u},
984                         {0xAFu, 0x80u},
985                         {0xB0u, 0x38u},
986                         {0xB1u, 0xC0u},
987                         {0xB3u, 0x20u},
988                         {0xB4u, 0x07u},
989                         {0xB5u, 0x10u},
990                         {0xB7u, 0x0Fu},
991                         {0xB8u, 0x20u},
992                         {0xBEu, 0x01u},
993                         {0xBFu, 0x05u},
994                         {0xD6u, 0x08u},
995                         {0xD8u, 0x04u},
996                         {0xD9u, 0x04u},
997                         {0xDBu, 0x04u},
998                         {0xDDu, 0x90u},
999                         {0xDFu, 0x01u},
1000                         {0x01u, 0x20u},
1001                         {0x03u, 0x40u},
1002                         {0x04u, 0x80u},
1003                         {0x05u, 0x14u},
1004                         {0x09u, 0x08u},
1005                         {0x0Cu, 0x2Au},
1006                         {0x11u, 0x08u},
1007                         {0x12u, 0x80u},
1008                         {0x15u, 0x29u},
1009                         {0x17u, 0x40u},
1010                         {0x19u, 0x20u},
1011                         {0x1Au, 0x80u},
1012                         {0x1Du, 0x54u},
1013                         {0x21u, 0x60u},
1014                         {0x22u, 0x81u},
1015                         {0x23u, 0x20u},
1016                         {0x25u, 0x01u},
1017                         {0x27u, 0x80u},
1018                         {0x29u, 0x01u},
1019                         {0x2Au, 0x80u},
1020                         {0x2Bu, 0x08u},
1021                         {0x2Cu, 0x84u},
1022                         {0x2Du, 0x04u},
1023                         {0x31u, 0x28u},
1024                         {0x33u, 0x40u},
1025                         {0x36u, 0x08u},
1026                         {0x37u, 0x91u},
1027                         {0x39u, 0xA4u},
1028                         {0x3Au, 0x01u},
1029                         {0x3Bu, 0x04u},
1030                         {0x3Cu, 0x08u},
1031                         {0x3Du, 0x20u},
1032                         {0x5Au, 0x60u},
1033                         {0x5Bu, 0x08u},
1034                         {0x60u, 0x22u},
1035                         {0x63u, 0x04u},
1036                         {0x81u, 0x10u},
1037                         {0x8Du, 0x01u},
1038                         {0x90u, 0x02u},
1039                         {0x92u, 0x49u},
1040                         {0x95u, 0x40u},
1041                         {0x97u, 0x20u},
1042                         {0x98u, 0x04u},
1043                         {0x99u, 0x01u},
1044                         {0x9Au, 0x8Au},
1045                         {0x9Bu, 0x15u},
1046                         {0x9Cu, 0x22u},
1047                         {0x9Fu, 0x20u},
1048                         {0xA0u, 0x84u},
1049                         {0xA1u, 0x10u},
1050                         {0xA2u, 0x08u},
1051                         {0xA7u, 0x10u},
1052                         {0xABu, 0x10u},
1053                         {0xB4u, 0x14u},
1054                         {0xC0u, 0xEAu},
1055                         {0xC2u, 0x74u},
1056                         {0xC4u, 0xFCu},
1057                         {0xCAu, 0xEDu},
1058                         {0xCCu, 0xFEu},
1059                         {0xCEu, 0x6Fu},
1060                         {0xD6u, 0x0Eu},
1061                         {0xD8u, 0x0Eu},
1062                         {0xE2u, 0x14u},
1063                         {0xE8u, 0x08u},
1064                         {0xEAu, 0x90u},
1065                         {0xEEu, 0x40u},
1066                         {0x25u, 0x01u},
1067                         {0x2Du, 0x02u},
1068                         {0x31u, 0x02u},
1069                         {0x33u, 0x01u},
1070                         {0x3Fu, 0x05u},
1071                         {0x59u, 0x04u},
1072                         {0x5Fu, 0x01u},
1073                         {0x85u, 0x08u},
1074                         {0x87u, 0x03u},
1075                         {0x89u, 0x37u},
1076                         {0x8Bu, 0x40u},
1077                         {0x93u, 0x2Cu},
1078                         {0x94u, 0x08u},
1079                         {0x97u, 0x7Fu},
1080                         {0x98u, 0x02u},
1081                         {0x99u, 0x4Fu},
1082                         {0x9Bu, 0x30u},
1083                         {0x9Cu, 0x04u},
1084                         {0xA1u, 0x02u},
1085                         {0xA5u, 0x10u},
1086                         {0xA7u, 0x01u},
1087                         {0xA8u, 0x01u},
1088                         {0xA9u, 0x03u},
1089                         {0xADu, 0x80u},
1090                         {0xB0u, 0x04u},
1091                         {0xB1u, 0x80u},
1092                         {0xB2u, 0x01u},
1093                         {0xB3u, 0x0Fu},
1094                         {0xB4u, 0x08u},
1095                         {0xB5u, 0x70u},
1096                         {0xB6u, 0x02u},
1097                         {0xBEu, 0x55u},
1098                         {0xBFu, 0x01u},
1099                         {0xC0u, 0x42u},
1100                         {0xC1u, 0x06u},
1101                         {0xC2u, 0x50u},
1102                         {0xC5u, 0xDEu},
1103                         {0xC6u, 0xF0u},
1104                         {0xC7u, 0x2Cu},
1105                         {0xC8u, 0x3Bu},
1106                         {0xC9u, 0xFFu},
1107                         {0xCAu, 0xFFu},
1108                         {0xCBu, 0xFFu},
1109                         {0xCFu, 0x2Cu},
1110                         {0xD6u, 0x01u},
1111                         {0xD8u, 0x04u},
1112                         {0xD9u, 0x04u},
1113                         {0xDAu, 0x04u},
1114                         {0xDBu, 0x04u},
1115                         {0xDCu, 0x10u},
1116                         {0xDDu, 0x01u},
1117                         {0xDFu, 0x01u},
1118                         {0xE2u, 0xC0u},
1119                         {0xE6u, 0x80u},
1120                         {0xE8u, 0x40u},
1121                         {0xE9u, 0x40u},
1122                         {0xEEu, 0x08u},
1123                         {0x0Cu, 0x84u},
1124                         {0x0Fu, 0x0Au},
1125                         {0x16u, 0x04u},
1126                         {0x1Du, 0x40u},
1127                         {0x1Eu, 0x88u},
1128                         {0x1Fu, 0x04u},
1129                         {0x23u, 0x50u},
1130                         {0x24u, 0x08u},
1131                         {0x25u, 0x14u},
1132                         {0x26u, 0x01u},
1133                         {0x27u, 0x14u},
1134                         {0x28u, 0x32u},
1135                         {0x2Du, 0xA6u},
1136                         {0x2Fu, 0x08u},
1137                         {0x30u, 0x02u},
1138                         {0x31u, 0x01u},
1139                         {0x36u, 0x08u},
1140                         {0x37u, 0x11u},
1141                         {0x3Cu, 0x08u},
1142                         {0x3Du, 0x20u},
1143                         {0x47u, 0x11u},
1144                         {0x4Cu, 0x14u},
1145                         {0x4Du, 0x03u},
1146                         {0x4Eu, 0x02u},
1147                         {0x55u, 0x01u},
1148                         {0x56u, 0x10u},
1149                         {0x57u, 0x08u},
1150                         {0x5Eu, 0x8Au},
1151                         {0x5Fu, 0x20u},
1152                         {0x65u, 0x40u},
1153                         {0x67u, 0x58u},
1154                         {0x6Cu, 0x21u},
1155                         {0x6Du, 0x10u},
1156                         {0x6Eu, 0x01u},
1157                         {0x74u, 0x08u},
1158                         {0x76u, 0x4Au},
1159                         {0x89u, 0x10u},
1160                         {0x8Au, 0x10u},
1161                         {0x91u, 0x04u},
1162                         {0x92u, 0x48u},
1163                         {0x94u, 0x08u},
1164                         {0x95u, 0x41u},
1165                         {0x97u, 0x20u},
1166                         {0x98u, 0x04u},
1167                         {0x99u, 0x80u},
1168                         {0x9Au, 0x84u},
1169                         {0x9Bu, 0x01u},
1170                         {0x9Cu, 0x12u},
1171                         {0x9Du, 0x20u},
1172                         {0x9Eu, 0x40u},
1173                         {0x9Fu, 0x10u},
1174                         {0xA0u, 0x06u},
1175                         {0xA2u, 0x0Au},
1176                         {0xA3u, 0x05u},
1177                         {0xA4u, 0x28u},
1178                         {0xA5u, 0x15u},
1179                         {0xA7u, 0x10u},
1180                         {0xA8u, 0x10u},
1181                         {0xAAu, 0x40u},
1182                         {0xABu, 0x20u},
1183                         {0xADu, 0x80u},
1184                         {0xAFu, 0x01u},
1185                         {0xB1u, 0x04u},
1186                         {0xB2u, 0x14u},
1187                         {0xB6u, 0x50u},
1188                         {0xC2u, 0xE0u},
1189                         {0xC4u, 0x40u},
1190                         {0xCAu, 0xFAu},
1191                         {0xCCu, 0xE0u},
1192                         {0xCEu, 0x60u},
1193                         {0xD0u, 0xA0u},
1194                         {0xD2u, 0x30u},
1195                         {0xD6u, 0xF0u},
1196                         {0xD8u, 0xF0u},
1197                         {0xE2u, 0xC8u},
1198                         {0xE4u, 0x01u},
1199                         {0xE6u, 0x20u},
1200                         {0xE8u, 0x10u},
1201                         {0xEAu, 0xA0u},
1202                         {0xEEu, 0x3Du},
1203                         {0x03u, 0x22u},
1204                         {0x05u, 0x66u},
1205                         {0x07u, 0x19u},
1206                         {0x08u, 0x60u},
1207                         {0x09u, 0x15u},
1208                         {0x0Au, 0x90u},
1209                         {0x0Bu, 0x2Au},
1210                         {0x10u, 0x0Fu},
1211                         {0x11u, 0x17u},
1212                         {0x12u, 0xF0u},
1213                         {0x13u, 0x48u},
1214                         {0x14u, 0x03u},
1215                         {0x16u, 0x0Cu},
1216                         {0x17u, 0x73u},
1217                         {0x19u, 0x03u},
1218                         {0x1Bu, 0x0Cu},
1219                         {0x1Cu, 0x05u},
1220                         {0x1Eu, 0x0Au},
1221                         {0x24u, 0x50u},
1222                         {0x25u, 0x01u},
1223                         {0x26u, 0xA0u},
1224                         {0x28u, 0x30u},
1225                         {0x2Au, 0xC0u},
1226                         {0x2Cu, 0x06u},
1227                         {0x2Eu, 0x09u},
1228                         {0x30u, 0xFFu},
1229                         {0x33u, 0x0Fu},
1230                         {0x35u, 0x70u},
1231                         {0x37u, 0x70u},
1232                         {0x3Bu, 0x08u},
1233                         {0x3Eu, 0x01u},
1234                         {0x56u, 0x08u},
1235                         {0x58u, 0x04u},
1236                         {0x59u, 0x04u},
1237                         {0x5Bu, 0x04u},
1238                         {0x5Cu, 0x10u},
1239                         {0x5Du, 0x90u},
1240                         {0x5Fu, 0x01u},
1241                         {0x80u, 0x33u},
1242                         {0x82u, 0xCCu},
1243                         {0x83u, 0x40u},
1244                         {0x84u, 0xFFu},
1245                         {0x87u, 0x04u},
1246                         {0x88u, 0x0Fu},
1247                         {0x89u, 0x10u},
1248                         {0x8Au, 0xF0u},
1249                         {0x8Bu, 0x08u},
1250                         {0x8Fu, 0x02u},
1251                         {0x90u, 0x96u},
1252                         {0x91u, 0x22u},
1253                         {0x92u, 0x69u},
1254                         {0x93u, 0x44u},
1255                         {0x94u, 0xFFu},
1256                         {0x95u, 0x08u},
1257                         {0x97u, 0x10u},
1258                         {0x99u, 0x10u},
1259                         {0x9Au, 0xFFu},
1260                         {0x9Bu, 0x08u},
1261                         {0xA1u, 0x10u},
1262                         {0xA3u, 0x08u},
1263                         {0xA4u, 0x55u},
1264                         {0xA6u, 0xAAu},
1265                         {0xA7u, 0x20u},
1266                         {0xAAu, 0xFFu},
1267                         {0xADu, 0x10u},
1268                         {0xAEu, 0xFFu},
1269                         {0xAFu, 0x09u},
1270                         {0xB1u, 0x60u},
1271                         {0xB2u, 0xFFu},
1272                         {0xB3u, 0x18u},
1273                         {0xB5u, 0x01u},
1274                         {0xB7u, 0x06u},
1275                         {0xBAu, 0x08u},
1276                         {0xBBu, 0x08u},
1277                         {0xBFu, 0x41u},
1278                         {0xD6u, 0x08u},
1279                         {0xD8u, 0x04u},
1280                         {0xD9u, 0x04u},
1281                         {0xDBu, 0x04u},
1282                         {0xDCu, 0x91u},
1283                         {0xDDu, 0x90u},
1284                         {0xDFu, 0x01u},
1285                         {0x00u, 0x18u},
1286                         {0x02u, 0x80u},
1287                         {0x06u, 0x08u},
1288                         {0x08u, 0x02u},
1289                         {0x09u, 0x04u},
1290                         {0x0Au, 0x08u},
1291                         {0x0Cu, 0x02u},
1292                         {0x0Eu, 0x12u},
1293                         {0x10u, 0x10u},
1294                         {0x11u, 0xA0u},
1295                         {0x14u, 0x08u},
1296                         {0x15u, 0x40u},
1297                         {0x16u, 0x10u},
1298                         {0x18u, 0x30u},
1299                         {0x1Du, 0x01u},
1300                         {0x20u, 0x82u},
1301                         {0x22u, 0x1Cu},
1302                         {0x23u, 0x04u},
1303                         {0x25u, 0x60u},
1304                         {0x27u, 0x21u},
1305                         {0x29u, 0x48u},
1306                         {0x2Au, 0x02u},
1307                         {0x2Bu, 0x10u},
1308                         {0x2Du, 0x04u},
1309                         {0x30u, 0x02u},
1310                         {0x32u, 0x14u},
1311                         {0x36u, 0x08u},
1312                         {0x37u, 0x21u},
1313                         {0x39u, 0x50u},
1314                         {0x3Au, 0x09u},
1315                         {0x3Du, 0x2Au},
1316                         {0x59u, 0x10u},
1317                         {0x5Au, 0x80u},
1318                         {0x5Eu, 0x20u},
1319                         {0x5Fu, 0x48u},
1320                         {0x63u, 0x0Au},
1321                         {0x64u, 0x04u},
1322                         {0x65u, 0x80u},
1323                         {0x66u, 0x04u},
1324                         {0x6Du, 0x04u},
1325                         {0x6Fu, 0x0Au},
1326                         {0x81u, 0x10u},
1327                         {0x85u, 0x10u},
1328                         {0x87u, 0x0Cu},
1329                         {0x88u, 0x41u},
1330                         {0x8Du, 0x20u},
1331                         {0x8Eu, 0x04u},
1332                         {0x8Fu, 0x0Cu},
1333                         {0x92u, 0x10u},
1334                         {0x93u, 0x40u},
1335                         {0x94u, 0x08u},
1336                         {0x95u, 0x01u},
1337                         {0x97u, 0x20u},
1338                         {0x98u, 0x08u},
1339                         {0x99u, 0x40u},
1340                         {0x9Au, 0x9Bu},
1341                         {0x9Du, 0x09u},
1342                         {0x9Eu, 0x40u},
1343                         {0x9Fu, 0x10u},
1344                         {0xA0u, 0x06u},
1345                         {0xA2u, 0x93u},
1346                         {0xA4u, 0x28u},
1347                         {0xA5u, 0x60u},
1348                         {0xA6u, 0x08u},
1349                         {0xA7u, 0x02u},
1350                         {0xAAu, 0x01u},
1351                         {0xAFu, 0x0Au},
1352                         {0xB0u, 0x04u},
1353                         {0xB2u, 0x80u},
1354                         {0xB3u, 0x01u},
1355                         {0xB5u, 0x80u},
1356                         {0xC0u, 0x4Eu},
1357                         {0xC2u, 0xBEu},
1358                         {0xC4u, 0xE7u},
1359                         {0xCAu, 0x4Bu},
1360                         {0xCCu, 0xE7u},
1361                         {0xCEu, 0xEFu},
1362                         {0xD6u, 0x7Cu},
1363                         {0xD8u, 0x7Cu},
1364                         {0xE0u, 0x01u},
1365                         {0xE2u, 0x50u},
1366                         {0xE6u, 0x14u},
1367                         {0xEAu, 0x20u},
1368                         {0xEEu, 0x20u},
1369                         {0x02u, 0x01u},
1370                         {0x04u, 0x10u},
1371                         {0x05u, 0x02u},
1372                         {0x06u, 0x20u},
1373                         {0x07u, 0x09u},
1374                         {0x09u, 0x02u},
1375                         {0x0Bu, 0x01u},
1376                         {0x0Cu, 0x40u},
1377                         {0x0Eu, 0x80u},
1378                         {0x14u, 0x20u},
1379                         {0x16u, 0x12u},
1380                         {0x19u, 0x01u},
1381                         {0x1Bu, 0x02u},
1382                         {0x1Du, 0x02u},
1383                         {0x1Fu, 0x01u},
1384                         {0x20u, 0x80u},
1385                         {0x22u, 0x44u},
1386                         {0x25u, 0x02u},
1387                         {0x27u, 0x05u},
1388                         {0x2Au, 0x08u},
1389                         {0x2Cu, 0x32u},
1390                         {0x2Eu, 0xC4u},
1391                         {0x30u, 0x06u},
1392                         {0x32u, 0x08u},
1393                         {0x33u, 0x08u},
1394                         {0x34u, 0xF0u},
1395                         {0x35u, 0x03u},
1396                         {0x36u, 0x01u},
1397                         {0x37u, 0x04u},
1398                         {0x3Bu, 0x20u},
1399                         {0x3Eu, 0x11u},
1400                         {0x56u, 0x08u},
1401                         {0x58u, 0x04u},
1402                         {0x59u, 0x04u},
1403                         {0x5Bu, 0x04u},
1404                         {0x5Cu, 0x99u},
1405                         {0x5Du, 0x90u},
1406                         {0x5Fu, 0x01u},
1407                         {0x82u, 0x80u},
1408                         {0x83u, 0x38u},
1409                         {0x84u, 0x99u},
1410                         {0x85u, 0x01u},
1411                         {0x86u, 0x22u},
1412                         {0x89u, 0x4Au},
1413                         {0x8Au, 0x70u},
1414                         {0x8Bu, 0x15u},
1415                         {0x8Du, 0x22u},
1416                         {0x8Fu, 0x45u},
1417                         {0x91u, 0x01u},
1418                         {0x93u, 0x06u},
1419                         {0x96u, 0x08u},
1420                         {0x97u, 0x01u},
1421                         {0x98u, 0x44u},
1422                         {0x99u, 0x53u},
1423                         {0x9Au, 0x88u},
1424                         {0x9Bu, 0x2Cu},
1425                         {0x9Eu, 0x07u},
1426                         {0xA7u, 0x40u},
1427                         {0xA8u, 0xAAu},
1428                         {0xAAu, 0x55u},
1429                         {0xB1u, 0x07u},
1430                         {0xB2u, 0xF0u},
1431                         {0xB6u, 0x0Fu},
1432                         {0xB7u, 0x78u},
1433                         {0xBBu, 0x02u},
1434                         {0xD8u, 0x04u},
1435                         {0xD9u, 0x04u},
1436                         {0xDBu, 0x04u},
1437                         {0xDCu, 0x11u},
1438                         {0xDFu, 0x01u},
1439                         {0x01u, 0x08u},
1440                         {0x02u, 0x01u},
1441                         {0x03u, 0x80u},
1442                         {0x04u, 0x18u},
1443                         {0x06u, 0x60u},
1444                         {0x0Bu, 0x20u},
1445                         {0x0Cu, 0x08u},
1446                         {0x0Du, 0x20u},
1447                         {0x0Eu, 0x02u},
1448                         {0x10u, 0x82u},
1449                         {0x13u, 0x10u},
1450                         {0x17u, 0x10u},
1451                         {0x18u, 0x80u},
1452                         {0x19u, 0x64u},
1453                         {0x1Cu, 0x10u},
1454                         {0x1Eu, 0x12u},
1455                         {0x20u, 0x08u},
1456                         {0x22u, 0x50u},
1457                         {0x23u, 0x10u},
1458                         {0x24u, 0x01u},
1459                         {0x25u, 0x80u},
1460                         {0x26u, 0x02u},
1461                         {0x29u, 0x04u},
1462                         {0x2Cu, 0x20u},
1463                         {0x32u, 0x50u},
1464                         {0x36u, 0x0Au},
1465                         {0x37u, 0x10u},
1466                         {0x3Bu, 0x14u},
1467                         {0x3Cu, 0x09u},
1468                         {0x3Du, 0x80u},
1469                         {0x3Eu, 0x20u},
1470                         {0x59u, 0x90u},
1471                         {0x62u, 0x80u},
1472                         {0x63u, 0x04u},
1473                         {0x68u, 0x02u},
1474                         {0x6Cu, 0x90u},
1475                         {0x6Fu, 0x09u},
1476                         {0x75u, 0x02u},
1477                         {0x76u, 0x19u},
1478                         {0x80u, 0x50u},
1479                         {0x81u, 0x20u},
1480                         {0x82u, 0x02u},
1481                         {0x83u, 0x80u},
1482                         {0x84u, 0x02u},
1483                         {0x86u, 0x10u},
1484                         {0x88u, 0x08u},
1485                         {0x89u, 0x03u},
1486                         {0x8Bu, 0x40u},
1487                         {0x8Du, 0x91u},
1488                         {0xC0u, 0x7Du},
1489                         {0xC2u, 0xE4u},
1490                         {0xC4u, 0x4Bu},
1491                         {0xCAu, 0x42u},
1492                         {0xCCu, 0xECu},
1493                         {0xCEu, 0xF6u},
1494                         {0xD6u, 0x0Cu},
1495                         {0xD8u, 0x0Cu},
1496                         {0xE0u, 0x01u},
1497                         {0xE2u, 0x90u},
1498                         {0xE4u, 0x10u},
1499                         {0xE6u, 0xC8u},
1500                         {0xAAu, 0x04u},
1501                         {0xE0u, 0x08u},
1502                         {0xE6u, 0x02u},
1503                         {0xEAu, 0x01u},
1504                         {0xEEu, 0x02u},
1505                         {0x9Eu, 0x04u},
1506                         {0xE2u, 0x08u},
1507                         {0xEEu, 0x01u},
1508                         {0x02u, 0x08u},
1509                         {0x03u, 0x08u},
1510                         {0x07u, 0x80u},
1511                         {0x0Bu, 0x07u},
1512                         {0x0Cu, 0x44u},
1513                         {0x0Eu, 0x88u},
1514                         {0x0Fu, 0x70u},
1515                         {0x11u, 0x44u},
1516                         {0x13u, 0x88u},
1517                         {0x15u, 0x99u},
1518                         {0x16u, 0x07u},
1519                         {0x17u, 0x22u},
1520                         {0x19u, 0xAAu},
1521                         {0x1Au, 0x70u},
1522                         {0x1Bu, 0x55u},
1523                         {0x1Eu, 0x80u},
1524                         {0x24u, 0x99u},
1525                         {0x26u, 0x22u},
1526                         {0x28u, 0xAAu},
1527                         {0x2Au, 0x55u},
1528                         {0x32u, 0x0Fu},
1529                         {0x34u, 0xF0u},
1530                         {0x35u, 0x0Fu},
1531                         {0x37u, 0xF0u},
1532                         {0x40u, 0x36u},
1533                         {0x41u, 0x01u},
1534                         {0x42u, 0x50u},
1535                         {0x44u, 0x04u},
1536                         {0x45u, 0x0Eu},
1537                         {0x46u, 0xFCu},
1538                         {0x47u, 0xBDu},
1539                         {0x48u, 0x3Du},
1540                         {0x49u, 0xFFu},
1541                         {0x4Au, 0xFFu},
1542                         {0x4Bu, 0xFFu},
1543                         {0x4Cu, 0x22u},
1544                         {0x4Eu, 0xF0u},
1545                         {0x4Fu, 0x08u},
1546                         {0x50u, 0x04u},
1547                         {0x54u, 0x09u},
1548                         {0x56u, 0x04u},
1549                         {0x58u, 0x04u},
1550                         {0x59u, 0x04u},
1551                         {0x5Au, 0x04u},
1552                         {0x5Bu, 0x04u},
1553                         {0x5Cu, 0x11u},
1554                         {0x5Fu, 0x01u},
1555                         {0x62u, 0xC0u},
1556                         {0x64u, 0x40u},
1557                         {0x65u, 0x01u},
1558                         {0x66u, 0x10u},
1559                         {0x67u, 0x11u},
1560                         {0x68u, 0xC0u},
1561                         {0x69u, 0x01u},
1562                         {0x6Bu, 0x11u},
1563                         {0x6Cu, 0x40u},
1564                         {0x6Du, 0x01u},
1565                         {0x6Eu, 0x40u},
1566                         {0x6Fu, 0x01u},
1567                         {0x81u, 0x0Cu},
1568                         {0x85u, 0xB8u},
1569                         {0x87u, 0x45u},
1570                         {0x89u, 0x73u},
1571                         {0x8Bu, 0x88u},
1572                         {0x8Du, 0x0Cu},
1573                         {0x91u, 0x04u},
1574                         {0x93u, 0x08u},
1575                         {0x95u, 0x08u},
1576                         {0x97u, 0x04u},
1577                         {0x98u, 0x01u},
1578                         {0x99u, 0x14u},
1579                         {0x9Bu, 0x08u},
1580                         {0x9Du, 0x80u},
1581                         {0x9Fu, 0x60u},
1582                         {0xA3u, 0x02u},
1583                         {0xA9u, 0x0Cu},
1584                         {0xADu, 0x2Fu},
1585                         {0xAFu, 0xD0u},
1586                         {0xB3u, 0x07u},
1587                         {0xB5u, 0x18u},
1588                         {0xB6u, 0x01u},
1589                         {0xB7u, 0xE0u},
1590                         {0xBBu, 0xACu},
1591                         {0xD8u, 0x04u},
1592                         {0xD9u, 0x04u},
1593                         {0xDCu, 0x09u},
1594                         {0xDFu, 0x01u},
1595                         {0x04u, 0x02u},
1596                         {0x07u, 0x01u},
1597                         {0x0Au, 0x08u},
1598                         {0x0Eu, 0x19u},
1599                         {0x17u, 0x14u},
1600                         {0x1Au, 0x02u},
1601                         {0x1Eu, 0x18u},
1602                         {0x1Fu, 0x18u},
1603                         {0x20u, 0x04u},
1604                         {0x21u, 0x0Cu},
1605                         {0x22u, 0x90u},
1606                         {0x23u, 0x10u},
1607                         {0x25u, 0x50u},
1608                         {0x28u, 0x01u},
1609                         {0x29u, 0x10u},
1610                         {0x2Bu, 0x40u},
1611                         {0x30u, 0x0Au},
1612                         {0x32u, 0x90u},
1613                         {0x37u, 0x15u},
1614                         {0x38u, 0x80u},
1615                         {0x39u, 0x29u},
1616                         {0x3Du, 0xE0u},
1617                         {0x3Eu, 0x0Au},
1618                         {0x3Fu, 0x20u},
1619                         {0x44u, 0x01u},
1620                         {0x45u, 0x04u},
1621                         {0x46u, 0x40u},
1622                         {0x47u, 0x40u},
1623                         {0x4Du, 0x84u},
1624                         {0x4Fu, 0x10u},
1625                         {0x56u, 0x25u},
1626                         {0x57u, 0xC0u},
1627                         {0x5Du, 0x04u},
1628                         {0x5Eu, 0x62u},
1629                         {0x65u, 0x40u},
1630                         {0x67u, 0x80u},
1631                         {0x87u, 0x40u},
1632                         {0x90u, 0x02u},
1633                         {0x92u, 0x09u},
1634                         {0x94u, 0x80u},
1635                         {0x95u, 0x69u},
1636                         {0x97u, 0x20u},
1637                         {0x99u, 0x40u},
1638                         {0x9Au, 0x0Au},
1639                         {0x9Bu, 0x15u},
1640                         {0x9Eu, 0x01u},
1641                         {0x9Fu, 0x40u},
1642                         {0xA4u, 0x2Au},
1643                         {0xA5u, 0x0Cu},
1644                         {0xA7u, 0x18u},
1645                         {0xAAu, 0x50u},
1646                         {0xABu, 0x08u},
1647                         {0xB2u, 0x01u},
1648                         {0xC0u, 0x90u},
1649                         {0xC2u, 0xE2u},
1650                         {0xC4u, 0x60u},
1651                         {0xCAu, 0x0Du},
1652                         {0xCCu, 0xEFu},
1653                         {0xCEu, 0xFFu},
1654                         {0xD0u, 0xD0u},
1655                         {0xD2u, 0x30u},
1656                         {0xD6u, 0xF0u},
1657                         {0xD8u, 0x90u},
1658                         {0xEAu, 0x04u},
1659                         {0xEEu, 0x04u},
1660                         {0x00u, 0x01u},
1661                         {0x01u, 0xC0u},
1662                         {0x03u, 0x02u},
1663                         {0x05u, 0x80u},
1664                         {0x0Bu, 0xFFu},
1665                         {0x0Du, 0xC0u},
1666                         {0x0Fu, 0x01u},
1667                         {0x11u, 0x90u},
1668                         {0x13u, 0x40u},
1669                         {0x15u, 0xC0u},
1670                         {0x17u, 0x08u},
1671                         {0x18u, 0x01u},
1672                         {0x19u, 0xC0u},
1673                         {0x1Bu, 0x04u},
1674                         {0x1Du, 0x1Fu},
1675                         {0x1Fu, 0x20u},
1676                         {0x23u, 0x9Fu},
1677                         {0x25u, 0x7Fu},
1678                         {0x27u, 0x80u},
1679                         {0x2Fu, 0x60u},
1680                         {0x30u, 0x01u},
1681                         {0x37u, 0xFFu},
1682                         {0x38u, 0x02u},
1683                         {0x3Fu, 0x40u},
1684                         {0x56u, 0x02u},
1685                         {0x57u, 0x20u},
1686                         {0x58u, 0x04u},
1687                         {0x59u, 0x04u},
1688                         {0x5Bu, 0x04u},
1689                         {0x5Fu, 0x01u},
1690                         {0x80u, 0x07u},
1691                         {0x81u, 0x6Cu},
1692                         {0x82u, 0x18u},
1693                         {0x84u, 0x01u},
1694                         {0x85u, 0x24u},
1695                         {0x89u, 0x91u},
1696                         {0x8Au, 0x80u},
1697                         {0x8Bu, 0x6Eu},
1698                         {0x8Cu, 0xC1u},
1699                         {0x8Du, 0x48u},
1700                         {0x90u, 0x01u},
1701                         {0x92u, 0xC0u},
1702                         {0x94u, 0xC0u},
1703                         {0x98u, 0x08u},
1704                         {0x99u, 0x24u},
1705                         {0x9Au, 0x21u},
1706                         {0x9Bu, 0x48u},
1707                         {0x9Cu, 0x04u},
1708                         {0x9Du, 0x71u},
1709                         {0x9Fu, 0x82u},
1710                         {0xA0u, 0xC1u},
1711                         {0xA1u, 0x6Cu},
1712                         {0xA4u, 0x22u},
1713                         {0xA5u, 0x10u},
1714                         {0xA6u, 0x08u},
1715                         {0xA7u, 0xEFu},
1716                         {0xA8u, 0xC1u},
1717                         {0xABu, 0x6Cu},
1718                         {0xACu, 0x10u},
1719                         {0xADu, 0x6Cu},
1720                         {0xB0u, 0x08u},
1721                         {0xB1u, 0x0Fu},
1722                         {0xB2u, 0x80u},
1723                         {0xB3u, 0xF0u},
1724                         {0xB4u, 0x3Fu},
1725                         {0xB6u, 0x40u},
1726                         {0xB8u, 0x20u},
1727                         {0xB9u, 0x08u},
1728                         {0xBEu, 0x55u},
1729                         {0xD4u, 0x40u},
1730                         {0xD6u, 0x04u},
1731                         {0xD8u, 0x04u},
1732                         {0xD9u, 0x04u},
1733                         {0xDBu, 0x04u},
1734                         {0xDFu, 0x01u},
1735                         {0x00u, 0x02u},
1736                         {0x04u, 0x04u},
1737                         {0x06u, 0x06u},
1738                         {0x07u, 0x40u},
1739                         {0x0Au, 0x04u},
1740                         {0x0Cu, 0x0Au},
1741                         {0x0Eu, 0x08u},
1742                         {0x0Fu, 0x02u},
1743                         {0x14u, 0x10u},
1744                         {0x15u, 0x09u},
1745                         {0x16u, 0x01u},
1746                         {0x17u, 0x20u},
1747                         {0x1Bu, 0x01u},
1748                         {0x1Du, 0x44u},
1749                         {0x1Eu, 0x46u},
1750                         {0x20u, 0x02u},
1751                         {0x24u, 0x10u},
1752                         {0x25u, 0x04u},
1753                         {0x26u, 0x04u},
1754                         {0x27u, 0x40u},
1755                         {0x28u, 0x10u},
1756                         {0x2Au, 0x01u},
1757                         {0x2Bu, 0x01u},
1758                         {0x2Cu, 0x1Au},
1759                         {0x2Eu, 0x02u},
1760                         {0x30u, 0x2Au},
1761                         {0x31u, 0x10u},
1762                         {0x33u, 0x40u},
1763                         {0x37u, 0x60u},
1764                         {0x38u, 0x94u},
1765                         {0x39u, 0x21u},
1766                         {0x3Cu, 0x14u},
1767                         {0x3Du, 0x01u},
1768                         {0x3Fu, 0x80u},
1769                         {0x59u, 0xC0u},
1770                         {0x62u, 0x80u},
1771                         {0x65u, 0x04u},
1772                         {0x66u, 0xA0u},
1773                         {0x67u, 0x40u},
1774                         {0x68u, 0x2Au},
1775                         {0x69u, 0x01u},
1776                         {0x6Bu, 0x20u},
1777                         {0x70u, 0x40u},
1778                         {0x72u, 0x02u},
1779                         {0x86u, 0x40u},
1780                         {0x87u, 0x40u},
1781                         {0x8Eu, 0x84u},
1782                         {0x90u, 0x04u},
1783                         {0x91u, 0x08u},
1784                         {0x94u, 0x80u},
1785                         {0x95u, 0x21u},
1786                         {0x96u, 0x40u},
1787                         {0x9Au, 0x25u},
1788                         {0x9Du, 0x90u},
1789                         {0x9Eu, 0x40u},
1790                         {0x9Fu, 0x40u},
1791                         {0xA2u, 0x80u},
1792                         {0xA3u, 0x40u},
1793                         {0xA4u, 0x2Au},
1794                         {0xA5u, 0x04u},
1795                         {0xA6u, 0x01u},
1796                         {0xAAu, 0x10u},
1797                         {0xAEu, 0x01u},
1798                         {0xB2u, 0x10u},
1799                         {0xB3u, 0x80u},
1800                         {0xC0u, 0xF8u},
1801                         {0xC2u, 0xF2u},
1802                         {0xC4u, 0xF0u},
1803                         {0xCAu, 0xFBu},
1804                         {0xCCu, 0x3Fu},
1805                         {0xCEu, 0xFFu},
1806                         {0xD8u, 0xF8u},
1807                         {0x06u, 0x08u},
1808                         {0x0Fu, 0x08u},
1809                         {0x13u, 0x40u},
1810                         {0x17u, 0x48u},
1811                         {0x33u, 0x08u},
1812                         {0x36u, 0x80u},
1813                         {0x37u, 0x08u},
1814                         {0x3Au, 0x01u},
1815                         {0x3Bu, 0x40u},
1816                         {0x3Du, 0x84u},
1817                         {0x42u, 0x01u},
1818                         {0x5Du, 0x01u},
1819                         {0x8Cu, 0x08u},
1820                         {0xC0u, 0x80u},
1821                         {0xC2u, 0x80u},
1822                         {0xC4u, 0xE0u},
1823                         {0xCCu, 0xE0u},
1824                         {0xCEu, 0xF0u},
1825                         {0xD0u, 0x10u},
1826                         {0xD6u, 0x80u},
1827                         {0x32u, 0x08u},
1828                         {0x33u, 0x40u},
1829                         {0x35u, 0x88u},
1830                         {0x38u, 0x40u},
1831                         {0x52u, 0x20u},
1832                         {0x5Bu, 0x20u},
1833                         {0x63u, 0x40u},
1834                         {0x87u, 0x40u},
1835                         {0x95u, 0x04u},
1836                         {0x96u, 0x01u},
1837                         {0x98u, 0x08u},
1838                         {0x9Au, 0x08u},
1839                         {0x9Bu, 0x40u},
1840                         {0x9Eu, 0x01u},
1841                         {0xA5u, 0x40u},
1842                         {0xA6u, 0x80u},
1843                         {0xA7u, 0x08u},
1844                         {0xADu, 0x41u},
1845                         {0xB6u, 0x01u},
1846                         {0xB7u, 0x04u},
1847                         {0xCCu, 0xF0u},
1848                         {0xCEu, 0x10u},
1849                         {0xD4u, 0xA0u},
1850                         {0xD8u, 0x40u},
1851                         {0xE6u, 0x40u},
1852                         {0xE8u, 0x40u},
1853                         {0xEAu, 0x10u},
1854                         {0x12u, 0x80u},
1855                         {0x58u, 0x08u},
1856                         {0x85u, 0x80u},
1857                         {0x86u, 0x08u},
1858                         {0x89u, 0x40u},
1859                         {0x8Cu, 0x40u},
1860                         {0x94u, 0x40u},
1861                         {0x95u, 0x04u},
1862                         {0x96u, 0x01u},
1863                         {0x98u, 0x08u},
1864                         {0x9Au, 0x08u},
1865                         {0x9Du, 0x88u},
1866                         {0x9Eu, 0x01u},
1867                         {0xA5u, 0x40u},
1868                         {0xA6u, 0x88u},
1869                         {0xA7u, 0x08u},
1870                         {0xABu, 0x20u},
1871                         {0xB2u, 0x20u},
1872                         {0xC4u, 0x10u},
1873                         {0xD6u, 0x40u},
1874                         {0xE2u, 0x10u},
1875                         {0xE4u, 0x40u},
1876                         {0xEAu, 0x80u},
1877                         {0x82u, 0x08u},
1878                         {0x83u, 0x20u},
1879                         {0x95u, 0x04u},
1880                         {0x96u, 0x01u},
1881                         {0xA6u, 0x08u},
1882                         {0xA7u, 0x08u},
1883                         {0xB1u, 0x08u},
1884                         {0xB6u, 0x01u},
1885                         {0xE2u, 0x20u},
1886                         {0xE6u, 0x20u},
1887                         {0x01u, 0x40u},
1888                         {0x05u, 0x10u},
1889                         {0x08u, 0x80u},
1890                         {0x0Fu, 0x02u},
1891                         {0x10u, 0x80u},
1892                         {0x14u, 0x20u},
1893                         {0x5Bu, 0x04u},
1894                         {0x62u, 0x04u},
1895                         {0x83u, 0x04u},
1896                         {0x87u, 0x01u},
1897                         {0x88u, 0x80u},
1898                         {0x8Du, 0x40u},
1899                         {0x8Eu, 0x04u},
1900                         {0xC0u, 0x03u},
1901                         {0xC2u, 0x03u},
1902                         {0xC4u, 0x0Cu},
1903                         {0xD6u, 0x02u},
1904                         {0xD8u, 0x02u},
1905                         {0xE2u, 0x06u},
1906                         {0xE4u, 0x08u},
1907                         {0x01u, 0x02u},
1908                         {0x05u, 0x01u},
1909                         {0x09u, 0x04u},
1910                         {0x0Eu, 0x40u},
1911                         {0x50u, 0x04u},
1912                         {0x5Fu, 0x20u},
1913                         {0x64u, 0x09u},
1914                         {0x80u, 0x20u},
1915                         {0x83u, 0x20u},
1916                         {0x88u, 0x09u},
1917                         {0x8Cu, 0x80u},
1918                         {0x98u, 0x20u},
1919                         {0x99u, 0x10u},
1920                         {0x9Du, 0x01u},
1921                         {0xA0u, 0x80u},
1922                         {0xB5u, 0x01u},
1923                         {0xC0u, 0x0Cu},
1924                         {0xC2u, 0x0Cu},
1925                         {0xD4u, 0x04u},
1926                         {0xD6u, 0x05u},
1927                         {0xD8u, 0x01u},
1928                         {0xE0u, 0x01u},
1929                         {0xE4u, 0x04u},
1930                         {0xE6u, 0x02u},
1931                         {0xEEu, 0x02u},
1932                         {0x57u, 0x08u},
1933                         {0x83u, 0x08u},
1934                         {0x87u, 0x10u},
1935                         {0x8Fu, 0x04u},
1936                         {0x92u, 0x40u},
1937                         {0x94u, 0x10u},
1938                         {0xA8u, 0x10u},
1939                         {0xA9u, 0x10u},
1940                         {0xADu, 0x02u},
1941                         {0xB4u, 0x04u},
1942                         {0xB5u, 0x04u},
1943                         {0xD4u, 0x02u},
1944                         {0xE2u, 0x02u},
1945                         {0xE8u, 0x08u},
1946                         {0xEEu, 0x02u},
1947                         {0x0Au, 0x08u},
1948                         {0x0Bu, 0x10u},
1949                         {0x0Fu, 0x88u},
1950                         {0x83u, 0x40u},
1951                         {0x92u, 0x40u},
1952                         {0x94u, 0x10u},
1953                         {0x96u, 0x08u},
1954                         {0x97u, 0x10u},
1955                         {0xA0u, 0x10u},
1956                         {0xA7u, 0x04u},
1957                         {0xACu, 0x10u},
1958                         {0xB2u, 0x04u},
1959                         {0xC2u, 0x0Fu},
1960                         {0xEAu, 0x01u},
1961                         {0x86u, 0x01u},
1962                         {0x92u, 0x80u},
1963                         {0x95u, 0x04u},
1964                         {0x96u, 0x01u},
1965                         {0xA3u, 0x20u},
1966                         {0xA7u, 0x08u},
1967                         {0xAAu, 0x40u},
1968                         {0xE2u, 0x10u},
1969                         {0xEEu, 0x80u},
1970                         {0x06u, 0x40u},
1971                         {0x57u, 0x20u},
1972                         {0x5Au, 0x80u},
1973                         {0x85u, 0x04u},
1974                         {0x86u, 0x40u},
1975                         {0x92u, 0x80u},
1976                         {0x95u, 0x04u},
1977                         {0xA3u, 0x20u},
1978                         {0xAFu, 0x08u},
1979                         {0xC0u, 0x20u},
1980                         {0xD4u, 0xC0u},
1981                         {0xE0u, 0x10u},
1982                         {0xE6u, 0x40u},
1983                         {0xEEu, 0x40u},
1984                         {0x94u, 0x50u},
1985                         {0x99u, 0x20u},
1986                         {0xA0u, 0x10u},
1987                         {0xA8u, 0x40u},
1988                         {0xAAu, 0x40u},
1989                         {0xB1u, 0x20u},
1990                         {0xE8u, 0x04u},
1991                         {0x00u, 0x40u},
1992                         {0x04u, 0x10u},
1993                         {0x54u, 0x10u},
1994                         {0x5Du, 0x20u},
1995                         {0x94u, 0x50u},
1996                         {0x99u, 0x20u},
1997                         {0xA0u, 0x10u},
1998                         {0xC0u, 0x03u},
1999                         {0xD4u, 0x02u},
2000                         {0xD6u, 0x04u},
2001                         {0x10u, 0x03u},
2002                         {0x11u, 0x01u},
2003                         {0x1Cu, 0x03u},
2004                         {0x1Du, 0x01u},
2005                         {0x00u, 0xFDu},
2006                         {0x01u, 0xAFu},
2007                         {0x02u, 0x0Au},
2008                         {0x10u, 0x55u},
2009                 };
2010
2011
2012
2013                 CYPACKED typedef struct {
2014                         void CYFAR *address;
2015                         uint16 size;
2016                 } CYPACKED_ATTR cfg_memset_t;
2017
2018
2019                 CYPACKED typedef struct {
2020                         void CYFAR *dest;
2021                         const void CYCODE *src;
2022                         uint16 size;
2023                 } CYPACKED_ATTR cfg_memcpy_t;
2024
2025                 static const cfg_memset_t CYCODE cfg_memset_list [] = {
2026                         /* address, size */
2027                         {(void CYFAR *)(CYREG_TMR0_CFG0), 12u},
2028                         {(void CYFAR *)(CYREG_PRT1_DR), 16u},
2029                         {(void CYFAR *)(CYDEV_UCFG_B0_P0_U0_BASE), 4096u},
2030                         {(void CYFAR *)(CYDEV_UCFG_B1_P2_U0_BASE), 2048u},
2031                         {(void CYFAR *)(CYDEV_UCFG_DSI0_BASE), 2560u},
2032                         {(void CYFAR *)(CYDEV_UCFG_DSI12_BASE), 512u},
2033                         {(void CYFAR *)(CYREG_BCTL1_MDCLK_EN), 16u},
2034                 };
2035
2036                 /* UCFG_BCTL0 Address: CYREG_BCTL0_MDCLK_EN Size (bytes): 16 */
2037                 static const uint8 CYCODE BS_UCFG_BCTL0_VAL[] = {
2038                         0x03u, 0x01u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x02u, 0x01u, 0x02u, 0x01u, 0x03u, 0x01u, 0x02u, 0x01u};
2039
2040                 static const cfg_memcpy_t CYCODE cfg_memcpy_list [] = {
2041                         /* dest, src, size */
2042                         {(void CYFAR *)(CYREG_BCTL0_MDCLK_EN), BS_UCFG_BCTL0_VAL, 16u},
2043                 };
2044
2045                 uint8 CYDATA i;
2046
2047                 /* Zero out critical memory blocks before beginning configuration */
2048                 for (i = 0u; i < (sizeof(cfg_memset_list)/sizeof(cfg_memset_list[0])); i++)
2049                 {
2050                         const cfg_memset_t CYCODE * CYDATA ms = &cfg_memset_list[i];
2051                         CYMEMZERO(ms->address, (size_t)(uint32)(ms->size));
2052                 }
2053
2054                 /* Copy device configuration data into registers */
2055                 for (i = 0u; i < (sizeof(cfg_memcpy_list)/sizeof(cfg_memcpy_list[0])); i++)
2056                 {
2057                         const cfg_memcpy_t CYCODE * CYDATA mc = &cfg_memcpy_list[i];
2058                         void * CYDATA destPtr = mc->dest;
2059                         const void CYCODE * CYDATA srcPtr = mc->src;
2060                         uint16 CYDATA numBytes = mc->size;
2061                         CYCONFIGCPYCODE(destPtr, srcPtr, numBytes);
2062                 }
2063
2064                 cfg_write_bytes32(cy_cfg_addr_table, cy_cfg_data_table);
2065
2066                 /* Perform normal device configuration. Order is not critical for these items. */
2067                 CYMEMZERO((void CYFAR *)(CYREG_PHUB_CFGMEM0_CFG0), 4u);
2068                 CYCONFIGCPYCODE((void CYFAR *)(CYREG_PHUB_CFGMEM1_CFG0), (const void CYCODE *)(BS_PHUB_CFGMEM1_VAL), 4u);
2069                 CYCONFIGCPYCODE((void CYFAR *)(CYREG_PHUB_CFGMEM2_CFG0), (const void CYCODE *)(BS_PHUB_CFGMEM2_VAL), 4u);
2070                 CYCONFIGCPYCODE((void CYFAR *)(CYREG_PHUB_CFGMEM3_CFG0), (const void CYCODE *)(BS_PHUB_CFGMEM3_VAL), 4u);
2071
2072                 /* Enable digital routing */
2073                 CY_SET_XTND_REG8((void CYFAR *)CYREG_BCTL0_BANK_CTL, CY_GET_XTND_REG8((void CYFAR *)CYREG_BCTL0_BANK_CTL) | 0x02u);
2074                 CY_SET_XTND_REG8((void CYFAR *)CYREG_BCTL1_BANK_CTL, CY_GET_XTND_REG8((void CYFAR *)CYREG_BCTL1_BANK_CTL) | 0x02u);
2075
2076                 /* Enable UDB array */
2077                 CY_SET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG0, CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG0) | 0x40u);
2078                 CY_SET_XTND_REG8((void CYFAR *)CYREG_PM_AVAIL_CR2, CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_AVAIL_CR2) | 0x10u);
2079         }
2080
2081         /* Perform second pass device configuration. These items must be configured in specific order after the regular configuration is done. */
2082         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT0_DR), (const void CYCODE *)(BS_IOPINS0_0_VAL), 10u);
2083         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT12_DM0), (const void CYCODE *)(BS_IOPINS0_7_VAL), 8u);
2084         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT12_DM0 + 0x00000009u), (const void CYCODE *)(BS_IOPINS1_7_VAL), 5u);
2085         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT15_DR), (const void CYCODE *)(BS_IOPINS0_8_VAL), 10u);
2086         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT2_DM0), (const void CYCODE *)(BS_IOPINS0_2_VAL), 8u);
2087         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT3_DR), (const void CYCODE *)(BS_IOPINS0_3_VAL), 10u);
2088         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT4_DM0), (const void CYCODE *)(BS_IOPINS0_4_VAL), 8u);
2089         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT5_DM0), (const void CYCODE *)(BS_IOPINS0_5_VAL), 8u);
2090         CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT6_DM0), (const void CYCODE *)(BS_IOPINS0_6_VAL), 8u);
2091
2092         /* Switch Boost to the precision bandgap reference from its internal reference */
2093         CY_SET_REG8((void CYXDATA *)CYREG_BOOST_CR2, (CY_GET_REG8((void CYXDATA *)CYREG_BOOST_CR2) | 0x08u));
2094
2095         /* Perform basic analog initialization to defaults */
2096         AnalogSetDefault();
2097
2098         /* Configure alternate active mode */
2099         CYCONFIGCPY((void CYFAR *)CYDEV_PM_STBY_BASE, (const void CYFAR *)CYDEV_PM_ACT_BASE, 14u);
2100 }