EMU EMAX 1/2 fixes.
[SCSI2SD-V6.git] / software / SCSI2SD / v4 / SCSI2SD.cydsn / SCSI2SD.cycdx
1 <?xml version="1.0" encoding="utf-8"?>
2 <blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">
3   <block name="SD_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" />
4   <block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" />
5   <block name="SD_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" />
6   <block name="SCSI_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" />
7   <block name="SCSI_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" />
8   <block name="SD_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" />
9   <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
10   <block name="timer_clock" BASE="0x0" SIZE="0x0" desc="" visible="true" />
11   <block name="Debug_Timer" BASE="0x0" SIZE="0x0" desc="" visible="true">
12     <block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
13     <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
14     <block name="TimerHW" BASE="0x0" SIZE="0x0" desc="" visible="true" />
15     <block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
16     <block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
17     <block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" />
18     <register name="Debug_Timer_GLOBAL_ENABLE" address="0x400043A3" bitWidth="8" desc="PM.ACT.CFG">
19       <field name="en_timer" from="3" to="0" access="RW" resetVal="" desc="Enable timer/counters." />
20     </register>
21     <register name="Debug_Timer_CONTROL" address="0x40004F00" bitWidth="8" desc="TMRx.CFG0">
22       <field name="EN" from="0" to="0" access="RW" resetVal="" desc="Enables timer/comparator." />
23       <field name="MODE" from="1" to="1" access="RW" resetVal="" desc="Mode. (0 = Timer; 1 = Comparator)">
24         <value name="Timer" value="0" desc="Timer mode. CNT/CMP register holds timer count value." />
25         <value name="Comparator" value="1" desc="Comparator mode. CNT/CMP register holds comparator threshold value." />
26       </field>
27       <field name="ONESHOT" from="2" to="2" access="RW" resetVal="" desc="Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block." />
28       <field name="CMP_BUFF" from="3" to="3" access="RW" resetVal="" desc="Buffer compare register. Compare register updates only on timer terminal count." />
29       <field name="INV" from="4" to="4" access="RW" resetVal="" desc="Invert sense of TIMEREN signal" />
30       <field name="DB" from="5" to="5" access="RW" resetVal="" desc="Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively.">
31         <value name="Timer" value="0" desc="CMP and TC are output." />
32         <value name="Deadband" value="1" desc="PHI1 (instead of CMP) and PHI2 (instead of TC) are output." />
33       </field>
34       <field name="DEADBAND_PERIOD" from="7" to="6" access="RW" resetVal="" desc="Deadband Period" />
35     </register>
36     <register name="Debug_Timer_CONTROL2" address="0x40004F01" bitWidth="8" desc="TMRx.CFG1">
37       <field name="IRQ_SEL" from="0" to="0" access="RW" resetVal="" desc="Irq selection. (0 = raw interrupts; 1 = status register interrupts)" />
38       <field name="FTC" from="1" to="1" access="RW" resetVal="" desc="First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled.">
39         <value name="Disable FTC" value="0" desc="Disable the single cycle pulse, which signifies the timer is starting." />
40         <value name="Enable FTC" value="1" desc="Enable the single cycle pulse, which signifies the timer is starting." />
41       </field>
42       <field name="DCOR" from="2" to="2" access="RW" resetVal="" desc="Disable Clear on Read (DCOR) of Status Register SR0." />
43       <field name="DBMODE" from="3" to="3" access="RW" resetVal="" desc="Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND)." />
44       <field name="CLK_BUS_EN_SEL" from="6" to="4" access="RW" resetVal="" desc="Digital Global Clock selection." />
45       <field name="BUS_CLK_SEL" from="7" to="7" access="RW" resetVal="" desc="Bus Clock selection." />
46     </register>
47     <register name="Debug_Timer_CONTROL3_" address="0x40004F02" bitWidth="8" desc="TMRx.CFG2">
48       <field name="TMR_CFG" from="1" to="0" access="RW" resetVal="" desc="Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ">
49         <value name="Continuous" value="0" desc="Timer runs while EN bit of CFG0 register is set to '1'." />
50         <value name="Pulsewidth" value="1" desc="Timer runs from positive to negative edge of TIMEREN." />
51         <value name="Period" value="10" desc="Timer runs from positive to positive edge of TIMEREN." />
52         <value name="Irq" value="11" desc="Timer runs until IRQ." />
53       </field>
54       <field name="COD" from="2" to="2" access="RW" resetVal="" desc="Clear On Disable (COD). Clears or gates outputs to zero." />
55       <field name="ROD" from="3" to="3" access="RW" resetVal="" desc="Reset On Disable (ROD). Resets internal state of output logic" />
56       <field name="CMP_CFG" from="6" to="4" access="RW" resetVal="" desc="Comparator configurations">
57         <value name="Equal" value="0" desc="Compare Equal " />
58         <value name="Less than" value="1" desc="Compare Less Than " />
59         <value name="Less than or equal" value="10" desc="Compare Less Than or Equal ." />
60         <value name="Greater" value="11" desc="Compare Greater Than ." />
61         <value name="Greater than or equal" value="100" desc="Compare Greater Than or Equal " />
62       </field>
63       <field name="HW_EN" from="7" to="7" access="RW" resetVal="" desc="When set Timer Enable controls counting." />
64     </register>
65     <register name="Debug_Timer_PERIOD" address="0x40004F04" bitWidth="16" desc="TMRx.PER0 - Assigned Period" />
66     <register name="Debug_Timer_COUNTER" address="0x40004F06" bitWidth="16" desc="TMRx.CNT_CMP0 - Current Down Counter Value" />
67   </block>
68   <block name="SCSI_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" />
69   <block name="SCSI_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" />
70   <block name="Debug_Timer_Interrupt" BASE="0x0" SIZE="0x0" desc="" visible="true" />
71   <block name="SCSI_Parity_Error" BASE="0x0" SIZE="0x0" desc="" visible="true">
72     <register name="SCSI_Parity_Error_STATUS_REG" address="0x40006464" bitWidth="8" desc="" />
73     <register name="SCSI_Parity_Error_MASK_REG" address="0x40006484" bitWidth="8" desc="" />
74     <register name="SCSI_Parity_Error_STATUS_AUX_CTL_REG" address="0x40006494" bitWidth="8" desc="">
75       <field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear">
76         <value name="ENABLED" value="1" desc="Enable counter" />
77         <value name="DISABLED" value="0" desc="Disable counter" />
78       </field>
79       <field name="INTRENBL" from="4" to="4" access="RW" resetVal="" desc="Enables or disables the Interrupt">
80         <value name="ENABLED" value="1" desc="Interrupt enabled" />
81         <value name="DISABLED" value="0" desc="Interrupt disabled" />
82       </field>
83       <field name="FIFO1LEVEL" from="3" to="3" access="RW" resetVal="" desc="FIFO level">
84         <value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
85         <value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
86       </field>
87       <field name="FIFO0LEVEL" from="2" to="2" access="RW" resetVal="" desc="FIFO level">
88         <value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
89         <value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
90       </field>
91       <field name="FIFO1CLEAR" from="1" to="1" access="RW" resetVal="" desc="FIFO clear">
92         <value name="ENABLED" value="1" desc="Clear FIFO state" />
93         <value name="DISABLED" value="0" desc="Normal FIFO operation" />
94       </field>
95       <field name="FIFO0CLEAR" from="0" to="0" access="RW" resetVal="" desc="FIFO clear">
96         <value name="ENABLED" value="1" desc="Clear FIFO state" />
97         <value name="DISABLED" value="0" desc="Normal FIFO operation" />
98       </field>
99     </register>
100   </block>
101   <block name="not_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
102   <block name="EXTLED" BASE="0x0" SIZE="0x0" desc="" visible="true" />
103   <block name="Clock_3" BASE="0x0" SIZE="0x0" desc="" visible="true" />
104   <block name="SCSI_SEL_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" />
105   <block name="cydff_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
106   <block name="Clock_4" BASE="0x0" SIZE="0x0" desc="" visible="true" />
107   <block name="Clock_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
108   <block name="GlitchFilter_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
109   <block name="SCSI_Filtered" BASE="0x0" SIZE="0x0" desc="" visible="true">
110     <register name="SCSI_Filtered_STATUS_REG" address="0x40006461" bitWidth="8" desc="" />
111     <register name="SCSI_Filtered_MASK_REG" address="0x40006481" bitWidth="8" desc="" />
112     <register name="SCSI_Filtered_STATUS_AUX_CTL_REG" address="0x40006491" bitWidth="8" desc="">
113       <field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear">
114         <value name="ENABLED" value="1" desc="Enable counter" />
115         <value name="DISABLED" value="0" desc="Disable counter" />
116       </field>
117       <field name="INTRENBL" from="4" to="4" access="RW" resetVal="" desc="Enables or disables the Interrupt">
118         <value name="ENABLED" value="1" desc="Interrupt enabled" />
119         <value name="DISABLED" value="0" desc="Interrupt disabled" />
120       </field>
121       <field name="FIFO1LEVEL" from="3" to="3" access="RW" resetVal="" desc="FIFO level">
122         <value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
123         <value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
124       </field>
125       <field name="FIFO0LEVEL" from="2" to="2" access="RW" resetVal="" desc="FIFO level">
126         <value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
127         <value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
128       </field>
129       <field name="FIFO1CLEAR" from="1" to="1" access="RW" resetVal="" desc="FIFO clear">
130         <value name="ENABLED" value="1" desc="Clear FIFO state" />
131         <value name="DISABLED" value="0" desc="Normal FIFO operation" />
132       </field>
133       <field name="FIFO0CLEAR" from="0" to="0" access="RW" resetVal="" desc="FIFO clear">
134         <value name="ENABLED" value="1" desc="Clear FIFO state" />
135         <value name="DISABLED" value="0" desc="Normal FIFO operation" />
136       </field>
137     </register>
138   </block>
139   <block name="cydff_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
140   <block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
141   <block name="Clock_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
142   <block name="CFG_EEPROM" BASE="0x0" SIZE="0x0" desc="" visible="true" />
143   <block name="SCSI_Out" BASE="0x0" SIZE="0x0" desc="" visible="true" />
144   <block name="SCSI_In" BASE="0x0" SIZE="0x0" desc="" visible="true" />
145   <block name="SD_MOSI" BASE="0x0" SIZE="0x0" desc="" visible="true" />
146   <block name="SD_SCK" BASE="0x0" SIZE="0x0" desc="" visible="true" />
147   <block name="SD_CS" BASE="0x0" SIZE="0x0" desc="" visible="true" />
148   <block name="SD_Data_Clk" BASE="0x0" SIZE="0x0" desc="" visible="true" />
149   <block name="SCSI_Out_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" />
150   <block name="SCSI_In_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" />
151   <block name="OddParityGen_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
152   <block name="SCSI_CTL_PHASE" BASE="0x0" SIZE="0x0" desc="" visible="true">
153     <register name="SCSI_CTL_PHASE_CONTROL_REG" address="0x40006471" bitWidth="8" desc="" />
154   </block>
155   <block name="SD_CD" BASE="0x0" SIZE="0x0" desc="" visible="true" />
156   <block name="SCSI_CLK" BASE="0x0" SIZE="0x0" desc="" visible="true" />
157   <block name="Bootloadable_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
158   <block name="USBFS" BASE="0x0" SIZE="0x0" desc="USBFS" visible="true">
159     <block name="ZeroTerminal_5" BASE="0x0" SIZE="0x0" desc="" visible="true" />
160     <block name="VirtualMux_6" BASE="0x0" SIZE="0x0" desc="" visible="true" />
161     <block name="VirtualMux_5" BASE="0x0" SIZE="0x0" desc="" visible="true" />
162     <block name="ZeroTerminal_6" BASE="0x0" SIZE="0x0" desc="" visible="true" />
163     <block name="ZeroTerminal_7" BASE="0x0" SIZE="0x0" desc="" visible="true" />
164     <block name="VirtualMux_8" BASE="0x0" SIZE="0x0" desc="" visible="true" />
165     <block name="VirtualMux_7" BASE="0x0" SIZE="0x0" desc="" visible="true" />
166     <block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
167     <block name="ep_0" BASE="0x0" SIZE="0x0" desc="" visible="true" />
168     <block name="VirtualMux_4" BASE="0x0" SIZE="0x0" desc="" visible="true" />
169     <block name="ZeroTerminal_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
170     <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
171     <block name="ZeroTerminal_4" BASE="0x0" SIZE="0x0" desc="" visible="true" />
172     <block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
173     <block name="bus_reset" BASE="0x0" SIZE="0x0" desc="" visible="true" />
174     <block name="Dm" BASE="0x0" SIZE="0x0" desc="" visible="true" />
175     <block name="sof_int" BASE="0x0" SIZE="0x0" desc="" visible="true" />
176     <block name="dp_int" BASE="0x0" SIZE="0x0" desc="" visible="true" />
177     <block name="Dp" BASE="0x0" SIZE="0x0" desc="" visible="true" />
178     <block name="ep_3" BASE="0x0" SIZE="0x0" desc="" visible="true" />
179     <block name="ep_4" BASE="0x0" SIZE="0x0" desc="" visible="true" />
180     <block name="USB" BASE="0x0" SIZE="0x0" desc="" visible="true" />
181     <block name="arb_int" BASE="0x0" SIZE="0x0" desc="" visible="true" />
182     <block name="ZeroTerminal_8" BASE="0x0" SIZE="0x0" desc="" visible="true" />
183     <block name="ep_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
184     <block name="ep_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
185     <block name="ZeroTerminal_3" BASE="0x0" SIZE="0x0" desc="" visible="true" />
186     <block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" />
187     <block name="Clock_vbus" BASE="0x0" SIZE="0x0" desc="" visible="true" />
188     <register name="USBFS_PM_USB_CR0" address="0x40004394" bitWidth="8" desc="USB Power Mode Control Register 0">
189       <field name="fsusbio_ref_en" from="0" to="0" access="RW" resetVal="" desc="" />
190       <field name="fsusbio_pd_n" from="1" to="1" access="RW" resetVal="" desc="" />
191       <field name="fsusbio_pd_pullup_n" from="2" to="2" access="RW" resetVal="" desc="" />
192     </register>
193     <register name="USBFS_PM_ACT_CFG" address="0x400043A5" bitWidth="8" desc="Active Power Mode Configuration Register" />
194     <register name="USBFS_PM_STBY_CFG" address="0x400043B5" bitWidth="8" desc="Standby Power Mode Configuration Register" />
195     <register name="USBFS_PRT.PS" address="0x400051F1" bitWidth="8" desc="Port Pin State Register">
196       <field name="PinState_DP" from="6" to="6" access="R" resetVal="" desc="" />
197       <field name="PinState_DM" from="7" to="7" access="R" resetVal="" desc="" />
198     </register>
199     <register name="USBFS_PRT_DM0" address="0x400051F2" bitWidth="8" desc="Port Drive Mode Register">
200       <field name="DriveMode_DP" from="6" to="6" access="RW" resetVal="" desc="" />
201       <field name="DriveMode_DM" from="7" to="7" access="RW" resetVal="" desc="" />
202     </register>
203     <register name="USBFS_PRT_DM1" address="0x400051F3" bitWidth="8" desc="Port Drive Mode Register">
204       <field name="PullUp_en_DP" from="6" to="6" access="RW" resetVal="" desc="" />
205       <field name="PullUp_en_DM" from="7" to="7" access="RW" resetVal="" desc="" />
206     </register>
207     <register name="USBFS_PRT.INP_DIS" address="0x400051F8" bitWidth="8" desc="Input buffer disable override">
208       <field name="seinput_dis_dp" from="6" to="6" access="RW" resetVal="" desc="" />
209       <field name="seinput_dis_dm" from="7" to="7" access="RW" resetVal="" desc="" />
210     </register>
211     <register name="USBFS_EP0_DR0" address="0x40006000" bitWidth="8" desc="bmRequestType" />
212     <register name="USBFS_EP0_DR1" address="0x40006001" bitWidth="8" desc="bRequest" />
213     <register name="USBFS_EP0_DR2" address="0x40006002" bitWidth="8" desc="wValueLo" />
214     <register name="USBFS_EP0_DR3" address="0x40006003" bitWidth="8" desc="wValueHi" />
215     <register name="USBFS_EP0_DR4" address="0x40006004" bitWidth="8" desc="wIndexLo" />
216     <register name="USBFS_EP0_DR5" address="0x40006005" bitWidth="8" desc="wIndexHi" />
217     <register name="USBFS_EP0_DR6" address="0x40006006" bitWidth="8" desc="lengthLo" />
218     <register name="USBFS_EP0_DR7" address="0x40006007" bitWidth="8" desc="lengthHi" />
219     <register name="USBFS_CR0" address="0x40006008" bitWidth="8" desc="USB Control Register 0">
220       <field name="device_address" from="6" to="0" access="R" resetVal="" desc="" />
221       <field name="usb_enable" from="7" to="7" access="RW" resetVal="" desc="" />
222     </register>
223     <register name="USBFS_CR1" address="0x40006009" bitWidth="8" desc="USB Control Register 1">
224       <field name="reg_enable" from="0" to="0" access="RW" resetVal="" desc="" />
225       <field name="enable_lock" from="1" to="1" access="RW" resetVal="" desc="" />
226       <field name="bus_activity" from="2" to="2" access="RW" resetVal="" desc="" />
227       <field name="trim_offset_msb" from="3" to="3" access="RW" resetVal="" desc="" />
228     </register>
229     <register name="USBFS_SIE_EP1_CR0" address="0x4000600E" bitWidth="8" desc="The Endpoint1 Control Register" />
230     <register name="USBFS_USBIO_CR0" address="0x40006010" bitWidth="8" desc="USBIO Control Register 0">
231       <field name="rd" from="0" to="0" access="R" resetVal="" desc="" />
232       <field name="td" from="5" to="5" access="RW" resetVal="" desc="" />
233       <field name="tse0" from="6" to="6" access="RW" resetVal="" desc="" />
234       <field name="ten" from="7" to="7" access="RW" resetVal="" desc="" />
235     </register>
236     <register name="USBFS_USBIO_CR1" address="0x40006012" bitWidth="8" desc="USBIO Control Register 1">
237       <field name="dmo" from="0" to="0" access="R" resetVal="" desc="" />
238       <field name="dpo" from="1" to="1" access="R" resetVal="" desc="" />
239       <field name="usbpuen" from="2" to="2" access="RW" resetVal="" desc="" />
240       <field name="iomode" from="5" to="5" access="RW" resetVal="" desc="" />
241     </register>
242     <register name="USBFS_SIE_EP2_CR0" address="0x4000601E" bitWidth="8" desc="The Endpoint2 Control Register" />
243     <register name="USBFS_SIE_EP3_CR0" address="0x4000602E" bitWidth="8" desc="The Endpoint3 Control Register" />
244     <register name="USBFS_SIE_EP4_CR0" address="0x4000603E" bitWidth="8" desc="The Endpoint4 Control Register" />
245     <register name="USBFS_SIE_EP5_CR0" address="0x4000604E" bitWidth="8" desc="The Endpoint5 Control Register" />
246     <register name="USBFS_SIE_EP6_CR0" address="0x4000605E" bitWidth="8" desc="The Endpoint6 Control Register" />
247     <register name="USBFS_SIE_EP7_CR0" address="0x4000606E" bitWidth="8" desc="The Endpoint7 Control Register" />
248     <register name="USBFS_SIE_EP8_CR0" address="0x4000607E" bitWidth="8" desc="The Endpoint8 Control Register" />
249     <register name="USBFS_BUF_SIZE" address="0x4000608C" bitWidth="8" desc="Dedicated Endpoint Buffer Size Register" />
250     <register name="USBFS_EP_ACTIVE" address="0x4000608E" bitWidth="8" desc="Endpoint Active Indication Register" />
251     <register name="USBFS_EP_TYPE" address="0x4000608F" bitWidth="8" desc="Endpoint Type (IN/OUT) Indication" />
252     <register name="USBFS_USB_CLK_EN" address="0x4000609D" bitWidth="8" desc="USB Block Clock Enable Register" />
253   </block>
254   <block name="SD_MISO" BASE="0x0" SIZE="0x0" desc="" visible="true" />
255   <block name="SCSI_Out_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true">
256     <register name="SCSI_Out_Ctl_CONTROL_REG" address="0x40006470" bitWidth="8" desc="" />
257   </block>
258   <block name="SCSI_Out_Bits" BASE="0x0" SIZE="0x0" desc="" visible="true">
259     <register name="SCSI_Out_Bits_CONTROL_REG" address="0x40006478" bitWidth="8" desc="" />
260   </block>
261   <block name="SCSI_Out_Mux" BASE="0x0" SIZE="0x0" desc="" visible="true" />
262   <block name="SCSI_RST_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" />
263   <block name="SCSI_Noise" BASE="0x0" SIZE="0x0" desc="" visible="true" />
264   <block name="not_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
265   <block name="SDCard" BASE="0x0" SIZE="0x0" desc="" visible="true">
266     <block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" />
267     <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
268     <block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />
269     <block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
270     <block name="BSPIM" BASE="0x0" SIZE="0x0" desc="" visible="true" />
271   </block>
272   <block name="LED1" BASE="0x0" SIZE="0x0" desc="" visible="true" />
273   <block name="scsiTarget" BASE="0x0" SIZE="0x0" desc="" visible="true" />
274 </blockRegMap>