Include missing file
[SCSI2SD-V6.git] / src / firmware / bsp.c
1 //      Copyright (C) 2016 Michael McMaster <michael@codesrc.com>
2 //
3 //      This file is part of SCSI2SD.
4 //
5 //      SCSI2SD is free software: you can redistribute it and/or modify
6 //      it under the terms of the GNU General Public License as published by
7 //      the Free Software Foundation, either version 3 of the License, or
8 //      (at your option) any later version.
9 //
10 //      SCSI2SD is distributed in the hope that it will be useful,
11 //      but WITHOUT ANY WARRANTY; without even the implied warranty of
12 //      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 //      GNU General Public License for more details.
14 //
15 //      You should have received a copy of the GNU General Public License
16 //      along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.
17
18 #include "bsp.h"
19 #include "stm32f2xx_hal.h"
20
21
22 static int usingFastClock = 0;
23
24 // TODO keep clock routines consistent with those in STM32Cubemx main.c
25
26 // The standard clock is 108MHz with 48MHz SDIO clock
27 void s2s_setNormalClock()
28 {
29         if (usingFastClock)
30         {
31                 usingFastClock = 0;
32
33                 // Stop using PLL as system clock
34                 RCC_ClkInitTypeDef RCC_ClkInitStruct;
35                 RCC_ClkInitStruct.ClockType =
36                         RCC_CLOCKTYPE_SYSCLK |
37                         RCC_CLOCKTYPE_PCLK1 |
38                         RCC_CLOCKTYPE_PCLK2;
39                 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
40                 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
41                 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
42                 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
43                 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
44
45                 // Change PLL
46                 RCC_OscInitTypeDef RCC_OscInitStruct;
47                 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
48                 RCC_OscInitStruct.HSEState = RCC_HSE_ON;
49                 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
50                 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
51                 RCC_OscInitStruct.PLL.PLLM = 20;
52                 RCC_OscInitStruct.PLL.PLLN = 432;
53                 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
54                 RCC_OscInitStruct.PLL.PLLQ = 9; // 48MHz.
55                 HAL_RCC_OscConfig(&RCC_OscInitStruct);
56
57                 // Resume using PLL for system clock
58                 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
59                 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
60         }
61 }
62
63 // The fast clock is 108MHz with 72MHz SDIO clock
64 // PLL needs to be between 67MHz and 75MHz.
65 // USB will NOT work in this mode.
66 // Unfortunately this is the only way to get faster SDIO transfers
67 // on STM32F205 due to errata on the SDIO Bypass Clock mode.
68 void s2s_setFastClock()
69 {
70         if (!usingFastClock)
71         {
72                 usingFastClock = 1;
73
74                 // Stop using PLL as system clock
75                 RCC_ClkInitTypeDef RCC_ClkInitStruct;
76                 RCC_ClkInitStruct.ClockType =
77                         RCC_CLOCKTYPE_SYSCLK |
78                         RCC_CLOCKTYPE_PCLK1 |
79                         RCC_CLOCKTYPE_PCLK2;
80                 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
81                 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
82                 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
83                 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
84                 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
85
86                 // Change PLL
87                 RCC_OscInitTypeDef RCC_OscInitStruct;
88                 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
89                 RCC_OscInitStruct.HSEState = RCC_HSE_ON;
90                 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
91                 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
92                 RCC_OscInitStruct.PLL.PLLM = 20;
93                 RCC_OscInitStruct.PLL.PLLN = 432;
94                 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
95                 RCC_OscInitStruct.PLL.PLLQ = 6; // 72MHz.
96                 HAL_RCC_OscConfig(&RCC_OscInitStruct);
97
98                 // Resume using PLL for system clock
99                 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
100                 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
101         }
102 }
103
104