Fix terrible performance

[SCSI2SD-V6.git] / src / firmware / scsiPhy.c

diff --git a/src/firmware/scsiPhy.c b/src/firmware/scsiPhy.c
index fa586c3..2231089 100755 (executable)
--- a/src/firmware/scsiPhy.c
+++ b/src/firmware/scsiPhy.c
@@ -176,30 +176,32 @@ void
 scsiRead(uint8_t* data, uint32_t count)\r
 {\r
        int i = 0;\r
+\r
+\r
+       uint32_t chunk = ((count - i) > SCSI_FIFO_DEPTH)\r
+               ? SCSI_FIFO_DEPTH : (count - i);\r
+       if (chunk >= 16)\r
+       {\r
+               // DMA is doing 32bit transfers.\r
+               chunk = chunk & 0xFFFFFFF8;\r
+       }\r
+       startScsiRx(chunk);\r
+\r
        while (i < count && likely(!scsiDev.resetFlag))\r
        {\r
-               uint32_t chunk = ((count - i) > SCSI_FIFO_DEPTH)\r
-                       ? SCSI_FIFO_DEPTH : (count - i);\r
+               while (!scsiPhyComplete() && likely(!scsiDev.resetFlag)) {}\r
+               scsiPhyFifoFlip();\r
 \r
-               if (chunk >= 16)\r
+               uint32_t nextChunk = ((count - i - chunk) > SCSI_FIFO_DEPTH)\r
+                       ? SCSI_FIFO_DEPTH : (count - i - chunk);\r
+               if (nextChunk >= 16)\r
                {\r
-                       // DMA is doing 32bit transfers.\r
-                       chunk = chunk & 0xFFFFFFF8;\r
+                       nextChunk = nextChunk & 0xFFFFFFF8;\r
                }\r
-\r
-#if FIFODEBUG\r
-               if (!scsiPhyFifoAltEmpty()) {\r
-                       // Force a lock-up.\r
-                       assertFail();\r
+               if (nextChunk > 0)\r
+               {\r
+                       startScsiRx(nextChunk);\r
                }\r
-#endif\r
-\r
-               startScsiRx(chunk);\r
-               // Wait for the next scsi interrupt (or the 1ms systick)\r
-               __WFI();\r
-\r
-               while (!scsiPhyComplete() && likely(!scsiDev.resetFlag)) {}\r
-               scsiPhyFifoFlip();\r
 \r
                if (chunk < 16)\r
                {\r
@@ -209,15 +211,10 @@ scsiRead(uint8_t* data, uint32_t count)
                {\r
                        scsiReadDMA(data + i, chunk);\r
 \r
-                       // Wait for the next DMA interrupt (or the 1ms systick)\r
-                       // It's beneficial to halt the processor to\r
-                       // give the DMA controller more memory bandwidth to work with.\r
-                       __WFI();\r
                        trace(trace_spinReadDMAPoll);\r
 \r
                        while (!scsiReadDMAPoll() && likely(!scsiDev.resetFlag))\r
                        {\r
-                               __WFI();\r
                        };\r
                }\r
 \r
@@ -230,6 +227,7 @@ scsiRead(uint8_t* data, uint32_t count)
                }\r
 #endif\r
                i += chunk;\r
+               chunk = nextChunk;\r
        }\r
 }\r
 \r
@@ -328,21 +326,15 @@ scsiWrite(const uint8_t* data, uint32_t count)
                        chunk = chunk & 0xFFFFFFF8;\r
                        scsiWriteDMA(data + i, chunk);\r
 \r
-                       // Wait for the next DMA interrupt (or the 1ms systick)\r
-                       // It's beneficial to halt the processor to\r
-                       // give the DMA controller more memory bandwidth to work with.\r
-                       __WFI();\r
                        trace(trace_spinReadDMAPoll);\r
 \r
                        while (!scsiWriteDMAPoll() && likely(!scsiDev.resetFlag))\r
                        {\r
-                               __WFI();\r
-                       };\r
+                       }\r
                }\r
 \r
                while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
                {\r
-                       __WFI();\r
                }\r
 \r
 #if FIFODEBUG\r
@@ -357,7 +349,6 @@ scsiWrite(const uint8_t* data, uint32_t count)
        }\r
        while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
        {\r
-               __WFI();\r
        }\r
 \r
 #if FIFODEBUG\r