Fix incorrect reporting of failures from self-test function. v6.2.8
authorMichael McMaster <michael@codesrc.com>
Wed, 30 Oct 2019 10:36:49 +0000 (20:36 +1000)
committerMichael McMaster <michael@codesrc.com>
Wed, 30 Oct 2019 10:36:49 +0000 (20:36 +1000)
CHANGELOG
src/firmware/config.c
src/firmware/scsiPhy.c

index a6955ff..61da61e 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,6 @@
+20191030               6.2.8
+       - Fix incorrect results from the self-test function.
+
 20191009               6.2.7
        - Slight improvements to data throughput, which may assist SCSI hosts with
        short timeouts.
index f9b288c..0e147a8 100755 (executable)
@@ -37,7 +37,7 @@
 \r
 #include <string.h>\r
 \r
-static const uint16_t FIRMWARE_VERSION = 0x0627;\r
+static const uint16_t FIRMWARE_VERSION = 0x0628;\r
 \r
 // 1 flash row\r
 static const uint8_t DEFAULT_CONFIG[128] =\r
index 9337b13..a380127 100755 (executable)
@@ -133,17 +133,6 @@ void EXTI4_IRQHandler()
        }\r
 }\r
 \r
-static void assertFail()\r
-{\r
-       while (1)\r
-       {\r
-               s2s_ledOn();\r
-               s2s_delay_ms(100);\r
-               s2s_ledOff();\r
-               s2s_delay_ms(100);\r
-       }\r
-}\r
-\r
 void\r
 scsiSetDataCount(uint32_t count)\r
 {\r
@@ -969,69 +958,8 @@ int scsiSelfTest()
        // TODO Test DBP\r
        *SCSI_CTRL_DBX = 0;\r
 \r
-       // FPGA comms test code\r
-       for(i = 0; i < 10000; ++i)\r
-       {\r
-               for (int j = 0; j < SCSI_FIFO_DEPTH; ++j)\r
-               {\r
-                       scsiDev.data[j] = j;\r
-               }\r
-\r
-               if (!scsiPhyFifoEmpty())\r
-               {\r
-                       assertFail();\r
-               }\r
-\r
-               *SCSI_CTRL_PHASE = DATA_IN;\r
-               HAL_DMA_Start(\r
-                       &memToFSMC,\r
-                       (uint32_t) &scsiDev.data[0],\r
-                       (uint32_t) SCSI_FIFO_DATA,\r
-                       SCSI_FIFO_DEPTH / 4);\r
-\r
-               HAL_DMA_PollForTransfer(\r
-                       &memToFSMC,\r
-                       HAL_DMA_FULL_TRANSFER,\r
-                       0xffffffff);\r
-\r
-               if (!scsiPhyFifoFull())\r
-               {\r
-                       assertFail();\r
-               }\r
-\r
-               memset(&scsiDev.data[0], 0, SCSI_FIFO_DEPTH);\r
-\r
-               *SCSI_CTRL_PHASE = DATA_OUT;\r
-               HAL_DMA_Start(\r
-                       &fsmcToMem,\r
-                       (uint32_t) SCSI_FIFO_DATA,\r
-                       (uint32_t) &scsiDev.data[0],\r
-                       SCSI_FIFO_DEPTH / 2);\r
-\r
-               HAL_DMA_PollForTransfer(\r
-                       &fsmcToMem,\r
-                       HAL_DMA_FULL_TRANSFER,\r
-                       0xffffffff);\r
-\r
-               if (!scsiPhyFifoEmpty())\r
-               {\r
-                       assertFail();\r
-               }\r
-\r
-\r
-               for (int j = 0; j < SCSI_FIFO_DEPTH; ++j)\r
-               {\r
-                       if (scsiDev.data[j] != (uint8_t) j)\r
-                       {\r
-                               result |= 64;\r
-                       }\r
-               }\r
-\r
-               s2s_fpgaReset();\r
-\r
-       }\r
-\r
        *SCSI_CTRL_BSY = 0;\r
+\r
        return result;\r
 }\r
 \r