scsi2sd-util bug fixes and hot swap support.
authorMichael McMaster <michael@codesrc.com>
Mon, 22 Dec 2014 23:22:01 +0000 (09:22 +1000)
committerMichael McMaster <michael@codesrc.com>
Mon, 22 Dec 2014 23:22:01 +0000 (09:22 +1000)
139 files changed:
CHANGELOG
readme.txt
software/SCSI2SD/src/config.c
software/SCSI2SD/src/config.h
software/SCSI2SD/src/diagnostic.c
software/SCSI2SD/src/disk.c
software/SCSI2SD/src/geometry.c
software/SCSI2SD/src/geometry.h
software/SCSI2SD/src/main.c
software/SCSI2SD/src/mode.c
software/SCSI2SD/src/scsi.c
software/SCSI2SD/src/scsi.h
software/SCSI2SD/src/sd.c
software/SCSI2SD/src/sd.h
software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter.h
software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c
software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfittergnu.inc
software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitteriar.inc
software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitterrv.inc
software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cymetadata.c
software/SCSI2SD/v3/SCSI2SD.cydsn/SCSI2SD.cycdx
software/SCSI2SD/v3/SCSI2SD.cydsn/SCSI2SD.cyfit
software/SCSI2SD/v3/SCSI2SD.cydsn/SCSI2SD.svd
software/SCSI2SD/v3/SCSI2SD.cydsn/TopDesign/TopDesign.cysch
software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter.h
software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c
software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfittergnu.inc
software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitteriar.inc
software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitterrv.inc
software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cymetadata.c
software/SCSI2SD/v4/SCSI2SD.cydsn/SCSI2SD.cycdx
software/SCSI2SD/v4/SCSI2SD.cydsn/SCSI2SD.cyfit
software/SCSI2SD/v4/SCSI2SD.cydsn/SCSI2SD.svd
software/SCSI2SD/v4/SCSI2SD.cydsn/TopDesign/TopDesign.cysch
software/scsi2sd-util/ConfigUtil.cc
software/scsi2sd-util/Makefile [changed mode: 0644->0755]
software/scsi2sd-util/SCSI2SD_Bootloader.cc
software/scsi2sd-util/SCSI2SD_HID.cc
software/scsi2sd-util/SCSI2SD_HID.hh
software/scsi2sd-util/TargetPanel.cc
software/scsi2sd-util/TargetPanel.hh
software/scsi2sd-util/hidapi-mac/hid.c [new file with mode: 0755]
software/scsi2sd-util/libzipper-1.0.3/COPYING [deleted file]
software/scsi2sd-util/libzipper-1.0.3/CompressedFile.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/Compressor.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/Container.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/Decompressor.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/Doxyfile.in [deleted file]
software/scsi2sd-util/libzipper-1.0.3/Exception.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/FileReader.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/FileWriter.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/INSTALL [deleted file]
software/scsi2sd-util/libzipper-1.0.3/INSTALL.Android [deleted file]
software/scsi2sd-util/libzipper-1.0.3/Makefile.am [deleted file]
software/scsi2sd-util/libzipper-1.0.3/Makefile.in [deleted file]
software/scsi2sd-util/libzipper-1.0.3/NEWS [deleted file]
software/scsi2sd-util/libzipper-1.0.3/README [deleted file]
software/scsi2sd-util/libzipper-1.0.3/Reader.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/VERSION [deleted file]
software/scsi2sd-util/libzipper-1.0.3/Writer.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/aclocal.m4 [deleted file]
software/scsi2sd-util/libzipper-1.0.3/android/zipper/Android.mk [deleted file]
software/scsi2sd-util/libzipper-1.0.3/autoconfig.h.in [deleted file]
software/scsi2sd-util/libzipper-1.0.3/autogen.sh [deleted file]
software/scsi2sd-util/libzipper-1.0.3/config.guess [deleted file]
software/scsi2sd-util/libzipper-1.0.3/config.sub [deleted file]
software/scsi2sd-util/libzipper-1.0.3/configure [deleted file]
software/scsi2sd-util/libzipper-1.0.3/configure.ac [deleted file]
software/scsi2sd-util/libzipper-1.0.3/deflate.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/deflate.hh [deleted file]
software/scsi2sd-util/libzipper-1.0.3/depcomp [deleted file]
software/scsi2sd-util/libzipper-1.0.3/doxygen.am [deleted file]
software/scsi2sd-util/libzipper-1.0.3/gzip.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/gzip.hh [deleted file]
software/scsi2sd-util/libzipper-1.0.3/install-sh [deleted file]
software/scsi2sd-util/libzipper-1.0.3/libzipper1.pc.in [deleted file]
software/scsi2sd-util/libzipper-1.0.3/ltmain.sh [deleted file]
software/scsi2sd-util/libzipper-1.0.3/missing [deleted file]
software/scsi2sd-util/libzipper-1.0.3/port/strerror_gnu.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/port/strerror_posix.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/split.hh [deleted file]
software/scsi2sd-util/libzipper-1.0.3/strerror.hh [deleted file]
software/scsi2sd-util/libzipper-1.0.3/util.hh [deleted file]
software/scsi2sd-util/libzipper-1.0.3/zip.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/zip.hh [deleted file]
software/scsi2sd-util/libzipper-1.0.3/zipper.1.in [deleted file]
software/scsi2sd-util/libzipper-1.0.3/zipper.cc [deleted file]
software/scsi2sd-util/libzipper-1.0.3/zipper.hh [deleted file]
software/scsi2sd-util/libzipper-1.0.4/COPYING [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/CompressedFile.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/Compressor.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/Container.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/Decompressor.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/Doxyfile.in [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/Exception.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/FileReader.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/FileWriter.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/INSTALL [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/INSTALL.Android [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/Makefile.am [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/Makefile.in [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/NEWS [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/README [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/Reader.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/VERSION [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/Writer.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/aclocal.m4 [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/android/zipper/Android.mk [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/autoconfig.h.in [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/autogen.sh [new file with mode: 0755]
software/scsi2sd-util/libzipper-1.0.4/config.guess [new file with mode: 0755]
software/scsi2sd-util/libzipper-1.0.4/config.h [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/config.sub [new file with mode: 0755]
software/scsi2sd-util/libzipper-1.0.4/configure [new file with mode: 0755]
software/scsi2sd-util/libzipper-1.0.4/configure.ac [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/deflate.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/deflate.hh [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/depcomp [new file with mode: 0755]
software/scsi2sd-util/libzipper-1.0.4/doxygen.am [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/gzip.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/gzip.hh [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/install-sh [new file with mode: 0755]
software/scsi2sd-util/libzipper-1.0.4/libzipper1.pc.in [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/ltmain.sh [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/missing [new file with mode: 0755]
software/scsi2sd-util/libzipper-1.0.4/port/pread.c [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/port/pwrite.c [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/port/strerror_gnu.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/port/strerror_posix.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/port/utimes.c [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/split.hh [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/strerror.hh [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/util.hh [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/zip.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/zip.hh [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/zipper.1.in [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/zipper.cc [new file with mode: 0644]
software/scsi2sd-util/libzipper-1.0.4/zipper.hh [new file with mode: 0644]
software/scsi2sd-util/scsi2sd-util.cc

index a2a5308..66bfdda 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,4 +1,4 @@
-201412XX               3.6
+20141223               4.0
        - Fix handling requests for LUNs other than 0 from SCSI-2 hosts.
        - Handle glitches of the scsi signals to improve stability and operate with
        multiple devices on the SCSI bus.
@@ -13,6 +13,8 @@
        new scsi2sd-util GUI.
        - Fix for SD cards with Samsung controllers which expect a "stop" bit
        in each SD command over SPI.
+       - Hot-swap support. The SD card can be removed whenever it's not in use
+       (ie. the LED must be OFF when the SD card is removed)
 
 20140718               3.5.2
        - Fix blank SCSI ID in scsi2sd-config output.
index ed02b79..50b5f86 100644 (file)
@@ -14,8 +14,8 @@ Features
 
     In-built active terminator.
     Can optional supply terminator power back to the SCSI bus
-    Emulates a non-removable hard drive for maximum compatibility.
-    Supports sector sizes from 64 bytes to 2048 bytes
+    Emulates up to 4 SCSI devices
+    Supports sector sizes from 64 bytes to 8192 bytes
     Firmware updatable over USB
     Highly configurable over USB
         Selectable SCSI ID
@@ -31,14 +31,13 @@ SCSI Interface
        SCSI-2 Narrow 8-bit 50-pin connector. Supports asynchronous transfers only.
 SD Card Interface
        Standard SDSC (1GB maximum size)
-       SDHC (32GB maximum size)
-       SDXC cards are untested. Donations welcome.
+       SDHC, SDXC
        Communication is via the SPI protocol at 25MHz.
 Power
        5V via standard molex drive connector.
 Dimensions
        10cm x 10cm x 1.5cm
-       A 3D-printable bracket is in testing to suit a standard 3.5" hard disk bay.
+       Mounting holes to suit standard 2.5" - 3.5" drive bracket.
 
 
 Performance
@@ -61,8 +60,7 @@ Tested with a 16GB class 10 SD card, via the commands:
  sudo dd bs=${SIZE} count=100 if=/dev/sdX of=/dev/null
 
 Compatibility
-
- Desktop systems
+ Computer systems
 
     Mac LC-III and LC-475
     Mac II running System 6.0.8
@@ -70,16 +68,20 @@ Compatibility
     Apple IIgs using Apple II High Speed SCSI controller card (from v3.3)
     Symbolics Lisp Machine XL1200, using 1280 byte sectors (from v3.4)
     PDP-11/73 running RSX11M+ V4.6
-    Microvax 3100 Model 80 running VMS 7.3 (needs patch against v3.5.2 firmware) 
+    Microvax 3100 Model 80 running VMS 7.3 (needs patch against v3.5.2 firmware)
     Amiga 500+ with GVP A530
-    Atari TT030 System V 
+    Atari TT030 System V
     Atari MEGA STE
         needs J3 TERMPWR jumper
-        1GB limit (--blocks=2048000)
+        1GB limit (--blocks=2048000) 
     Sharp X68000
-        SASI models supported. See http://gamesx.com/wiki/doku.php?id=x68000:hard_drive_on_sasi_machine for information on building a custom cable.
+        SASI models supported. See gamesx.com for information on building a custom cable.
         needs J3 TERMPWR jumper
-        Set to SCSI ID 3.  ID0 will not work.
+        Set to SCSI ID 3. ID0 will not work. 
+    Compaq XP-1000 Professional Workstation
+        Alpha 21264 CPU, 667MHz, with a QLogic SCSI controller in a PCI slot 
+    SCSI-based Macintosh Powerbooks (2.5" SCSI2SD)
+        Also reported to work on Thinkpad 860 running Win NT 4.0 PowerPC. 
 
 Samplers
 
@@ -89,14 +91,15 @@ Samplers
         There are compatibility problems with the Akai MPC3000. It works (slowly) with the alternate Vailixi OS with multi-sector transfers disabled. 
     EMU Emulator E4X with EOS 3.00b and E6400 (classic) with Eos 4.01
     Ensoniq ASR-X, ASR-10 (from v3.4, 2GB size limit)
-        ASR-20 Requires TERMPWR jumper. 
+        ASR-20 Requires TERMPWR jumper.
+        ASR-X resets when writing to devices > 2Gb. 
     Kurzweil K2000R
         See kurzweil.com for size limits which a dependant on the OS version. Older OS versions have a 1GB limit.
         SCSI cable reversed 
     Casio FZ-20M
         Requires TERMPWR jumper. The manual shows the pin25 of the DB25 connector is "not connected".
         May require scsi2sd-config --apple flag 
-    Yamaha EX5R 
+    Yamaha A5000, A3000, EX5, EX5R 
 
 Other
 
index fb0473a..ebff685 100755 (executable)
@@ -29,7 +29,7 @@
 \r
 #include <string.h>\r
 \r
-static const uint16_t FIRMWARE_VERSION = 0x0360;\r
+static const uint16_t FIRMWARE_VERSION = 0x0400;\r
 \r
 enum USB_ENDPOINTS\r
 {\r
@@ -261,7 +261,8 @@ void debugPoll()
                hidBuffer[23] = scsiDev.msgCount;\r
                hidBuffer[24] = scsiDev.cmdCount;\r
                hidBuffer[25] = scsiDev.watchdogTick;\r
-\r
+               hidBuffer[26] = blockDev.state;\r
+               \r
                hidBuffer[58] = sdDev.capacity >> 24;\r
                hidBuffer[59] = sdDev.capacity >> 16;\r
                hidBuffer[60] = sdDev.capacity >> 8;\r
@@ -300,12 +301,35 @@ void debugInit()
 }\r
 \r
 // Public method for storing MODE SELECT results.\r
-void configSave()\r
+void configSave(int scsiId, uint16_t bytesPerSector)\r
 {\r
-// TODO REIMPLEMENT\r
-//     CFG_EEPROM_Start();\r
-//     saveConfig(); // write to eeprom\r
-//     CFG_EEPROM_Stop();\r
+       int cfgIdx;\r
+       for (cfgIdx = 0; cfgIdx < MAX_SCSI_TARGETS; ++cfgIdx)\r
+       {\r
+               const TargetConfig* tgt = getConfigByIndex(cfgIdx);\r
+               if ((tgt->scsiId & CONFIG_TARGET_ID_BITS) == scsiId)\r
+               {\r
+                       // Save row to flash\r
+                       // We only save the first row of the configuration\r
+                       // this contains the parameters changeable by a MODE SELECT command\r
+                       uint8_t rowData[CYDEV_FLS_ROW_SIZE];\r
+                       TargetConfig* rowCfgData = (TargetConfig*)&rowData;\r
+                       memcpy(rowCfgData, tgt, sizeof(rowData));\r
+                       rowCfgData->bytesPerSector = bytesPerSector;\r
+\r
+\r
+                       uint8_t spcBuffer[CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE];\r
+                       CyFlash_Start();\r
+                       CySetFlashEEBuffer(spcBuffer);\r
+                       CySetTemp();\r
+                       CyWriteRowData(\r
+                               SCSI_CONFIG_ARRAY,\r
+                               SCSI_CONFIG_0_ROW + (cfgIdx * SCSI_CONFIG_ROWS),\r
+                               (uint8_t*)rowCfgData);\r
+                       CyFlash_Stop();\r
+                       return;\r
+               }\r
+       }\r
 }\r
 \r
 \r
index bce06e7..c16767c 100755 (executable)
@@ -23,7 +23,7 @@
 void configInit(void);\r
 void debugInit(void);\r
 void configPoll(void);\r
-void configSave(void);\r
+void configSave(int scsiId, uint16_t byesPerSector);\r
 \r
 const TargetConfig* getConfigByIndex(int index);\r
 const TargetConfig* getConfigById(int scsiId);\r
index 15e624f..c518d75 100755 (executable)
@@ -95,10 +95,16 @@ void scsiReceiveDiagnostic()
                // Convert each supplied address back to a simple\r
                // 64bit linear address, then convert back again.\r
                uint64 fromByteAddr =\r
-                       scsiByteAddress(scsiDev.target->cfg, suppliedFmt, &scsiDev.data[6]);\r
+                       scsiByteAddress(\r
+                               scsiDev.target->liveCfg.bytesPerSector,\r
+                               suppliedFmt,\r
+                               &scsiDev.data[6]);\r
 \r
                scsiSaveByteAddress(\r
-                       scsiDev.target->cfg, translateFmt, fromByteAddr, &scsiDev.data[6]);\r
+                       scsiDev.target->liveCfg.bytesPerSector,\r
+                       translateFmt,\r
+                       fromByteAddr,\r
+                       &scsiDev.data[6]);\r
 \r
                // Fill out the rest of the response.\r
                // (Clear out any optional bits).\r
@@ -137,7 +143,7 @@ void scsiReadBuffer()
        // READ BUFFER\r
        // Used for testing the speed of the SCSI interface.\r
        uint8 mode = scsiDev.data[1] & 7;\r
-       \r
+\r
        int allocLength =\r
                (((uint32) scsiDev.cdb[6]) << 16) +\r
                (((uint32) scsiDev.cdb[7]) << 8) +\r
@@ -151,7 +157,7 @@ void scsiReadBuffer()
                scsiDev.data[1] = (maxSize >> 16) & 0xff;\r
                scsiDev.data[2] = (maxSize >> 8) & 0xff;\r
                scsiDev.data[3] = maxSize & 0xff;\r
-               \r
+\r
                scsiDev.dataLen =\r
                        (allocLength > MAX_SECTOR_SIZE) ? MAX_SECTOR_SIZE : allocLength;\r
                scsiDev.phase = DATA_IN;\r
index adafdf4..ec28f98 100755 (executable)
@@ -32,10 +32,15 @@ Transfer transfer;
 \r
 static int doSdInit()\r
 {\r
-       int result = sdInit();\r
-       if (result)\r
+       int result = 0;\r
+       if (blockDev.state & DISK_PRESENT)\r
        {\r
-               blockDev.state = blockDev.state | DISK_INITIALISED;\r
+               result = sdInit();\r
+       \r
+               if (result)\r
+               {\r
+                       blockDev.state = blockDev.state | DISK_INITIALISED;\r
+               }\r
        }\r
        return result;\r
 }\r
@@ -84,9 +89,12 @@ static void doFormatUnitHeader(void)
 \r
        if (! DSP) // disable save parameters\r
        {\r
-               configSave(); // Save the "MODE SELECT savable parameters"\r
+               // Save the "MODE SELECT savable parameters"\r
+               configSave(\r
+                       scsiDev.target->targetId,\r
+                       scsiDev.target->liveCfg.bytesPerSector);\r
        }\r
-       \r
+\r
        if (IP)\r
        {\r
                // We need to read the initialisation pattern header first.\r
@@ -113,7 +121,10 @@ static void doReadCapacity()
                scsiDev.cdb[5];\r
        int pmi = scsiDev.cdb[8] & 1;\r
 \r
-       uint32_t capacity = getScsiCapacity(scsiDev.target->cfg);\r
+       uint32_t capacity = getScsiCapacity(\r
+               scsiDev.target->cfg->sdSectorStart,\r
+               scsiDev.target->liveCfg.bytesPerSector,\r
+               scsiDev.target->cfg->scsiSectors);\r
 \r
        if (!pmi && lba)\r
        {\r
@@ -135,7 +146,7 @@ static void doReadCapacity()
                scsiDev.data[2] = highestBlock >> 8;\r
                scsiDev.data[3] = highestBlock;\r
 \r
-               uint32_t bytesPerSector = scsiDev.target->cfg->bytesPerSector;\r
+               uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;\r
                scsiDev.data[4] = bytesPerSector >> 24;\r
                scsiDev.data[5] = bytesPerSector >> 16;\r
                scsiDev.data[6] = bytesPerSector >> 8;\r
@@ -161,7 +172,12 @@ static void doWrite(uint32 lba, uint32 blocks)
                scsiDev.target->sense.asc = WRITE_PROTECTED;\r
                scsiDev.phase = STATUS;\r
        }\r
-       else if (((uint64) lba) + blocks > getScsiCapacity(scsiDev.target->cfg))\r
+       else if (((uint64) lba) + blocks >\r
+               getScsiCapacity(\r
+                       scsiDev.target->cfg->sdSectorStart,\r
+                       scsiDev.target->liveCfg.bytesPerSector,\r
+                       scsiDev.target->cfg->scsiSectors\r
+                       ))\r
        {\r
                scsiDev.status = CHECK_CONDITION;\r
                scsiDev.target->sense.code = ILLEGAL_REQUEST;\r
@@ -175,8 +191,8 @@ static void doWrite(uint32 lba, uint32 blocks)
                transfer.blocks = blocks;\r
                transfer.currentBlock = 0;\r
                scsiDev.phase = DATA_OUT;\r
-               scsiDev.dataLen = scsiDev.target->cfg->bytesPerSector;\r
-               scsiDev.dataPtr = scsiDev.target->cfg->bytesPerSector;\r
+               scsiDev.dataLen = scsiDev.target->liveCfg.bytesPerSector;\r
+               scsiDev.dataPtr = scsiDev.target->liveCfg.bytesPerSector;\r
 \r
                // No need for single-block writes atm.  Overhead of the\r
                // multi-block write is minimal.\r
@@ -189,7 +205,10 @@ static void doWrite(uint32 lba, uint32 blocks)
 \r
 static void doRead(uint32 lba, uint32 blocks)\r
 {\r
-       uint32_t capacity = getScsiCapacity(scsiDev.target->cfg);\r
+       uint32_t capacity = getScsiCapacity(\r
+               scsiDev.target->cfg->sdSectorStart,\r
+               scsiDev.target->liveCfg.bytesPerSector,\r
+               scsiDev.target->cfg->scsiSectors);\r
        if (((uint64) lba) + blocks > capacity)\r
        {\r
                scsiDev.status = CHECK_CONDITION;\r
@@ -224,7 +243,12 @@ static void doRead(uint32 lba, uint32 blocks)
 \r
 static void doSeek(uint32 lba)\r
 {\r
-       if (lba >= getScsiCapacity(scsiDev.target->cfg))\r
+       if (lba >=\r
+               getScsiCapacity(\r
+                       scsiDev.target->cfg->sdSectorStart,\r
+                       scsiDev.target->liveCfg.bytesPerSector,\r
+                       scsiDev.target->cfg->scsiSectors)\r
+               )\r
        {\r
                scsiDev.status = CHECK_CONDITION;\r
                scsiDev.target->sense.code = ILLEGAL_REQUEST;\r
@@ -304,7 +328,7 @@ int scsiDiskCommand()
                // FORMAT UNIT\r
                // We don't really do any formatting, but we need to read the correct\r
                // number of bytes in the DATA_OUT phase to make the SCSI host happy.\r
-               \r
+\r
                int fmtData = (scsiDev.cdb[1] & 0x10) ? 1 : 0;\r
                if (fmtData)\r
                {\r
@@ -466,8 +490,16 @@ void scsiDiskPoll()
                scsiEnterPhase(DATA_IN);\r
 \r
                int totalSDSectors =\r
-                       transfer.blocks * SDSectorsPerSCSISector(scsiDev.target->cfg);\r
-               uint32_t sdLBA = SCSISector2SD(scsiDev.target->cfg, transfer.lba);\r
+                       transfer.blocks *\r
+                               SDSectorsPerSCSISector(scsiDev.target->liveCfg.bytesPerSector);\r
+               uint32_t sdLBA =\r
+                       SCSISector2SD(\r
+                               scsiDev.target->cfg->sdSectorStart,\r
+                               scsiDev.target->liveCfg.bytesPerSector,\r
+                               transfer.lba);\r
+\r
+               const int sdPerScsi =\r
+                       SDSectorsPerSCSISector(scsiDev.target->liveCfg.bytesPerSector);\r
                int buffers = sizeof(scsiDev.data) / SD_SECTOR_SIZE;\r
                int prep = 0;\r
                int i = 0;\r
@@ -504,10 +536,9 @@ void scsiDiskPoll()
                        else if ((scsiActive == 0) && ((prep - i) > 0))\r
                        {\r
                                int dmaBytes = SD_SECTOR_SIZE;\r
-                               if ((i % SDSectorsPerSCSISector(scsiDev.target->cfg)) ==\r
-                                       (SDSectorsPerSCSISector(scsiDev.target->cfg) - 1))\r
+                               if ((i % sdPerScsi) == (sdPerScsi - 1))\r
                                {\r
-                                       dmaBytes = scsiDev.target->cfg->bytesPerSector % SD_SECTOR_SIZE;\r
+                                       dmaBytes = scsiDev.target->liveCfg.bytesPerSector % SD_SECTOR_SIZE;\r
                                        if (dmaBytes == 0) dmaBytes = SD_SECTOR_SIZE;\r
                                }\r
                                scsiWriteDMA(&scsiDev.data[SD_SECTOR_SIZE * (i % buffers)], dmaBytes);\r
@@ -525,8 +556,9 @@ void scsiDiskPoll()
        {\r
                scsiEnterPhase(DATA_OUT);\r
 \r
-               int totalSDSectors =\r
-                       transfer.blocks * SDSectorsPerSCSISector(scsiDev.target->cfg);\r
+               const int sdPerScsi =\r
+                       SDSectorsPerSCSISector(scsiDev.target->liveCfg.bytesPerSector);\r
+               int totalSDSectors = transfer.blocks * sdPerScsi;\r
                int buffers = sizeof(scsiDev.data) / SD_SECTOR_SIZE;\r
                int prep = 0;\r
                int i = 0;\r
@@ -563,10 +595,9 @@ void scsiDiskPoll()
                                !scsiDisconnected)\r
                        {\r
                                int dmaBytes = SD_SECTOR_SIZE;\r
-                               if ((prep % SDSectorsPerSCSISector(scsiDev.target->cfg)) ==\r
-                                       (SDSectorsPerSCSISector(scsiDev.target->cfg) - 1))\r
+                               if ((prep % sdPerScsi) == (sdPerScsi - 1))\r
                                {\r
-                                       dmaBytes = scsiDev.target->cfg->bytesPerSector % SD_SECTOR_SIZE;\r
+                                       dmaBytes = scsiDev.target->liveCfg.bytesPerSector % SD_SECTOR_SIZE;\r
                                        if (dmaBytes == 0) dmaBytes = SD_SECTOR_SIZE;\r
                                }\r
                                scsiReadDMA(&scsiDev.data[SD_SECTOR_SIZE * (prep % buffers)], dmaBytes);\r
@@ -681,27 +712,5 @@ void scsiDiskInit()
                blockDev.state = blockDev.state | DISK_WP;\r
        }\r
        #endif\r
-\r
-       // The Card-detect switches of micro-sd sockets are not standard. Don't make\r
-       // use of SD_CD so we can use sockets from other manufacturers.\r
-       // Detect presence of the card by testing whether it responds to commands.\r
-       // if (SD_CD_Read() == 1)\r
-       {\r
-               int retry;\r
-               blockDev.state = blockDev.state | DISK_PRESENT;\r
-\r
-               // Wait up to 5 seconds for the SD card to wake up.\r
-               for (retry = 0; retry < 5; ++retry)\r
-               {\r
-                       if (doSdInit())\r
-                       {\r
-                               break;\r
-                       }\r
-                       else\r
-                       {\r
-                               CyDelay(1000);\r
-                       }\r
-               }\r
-       }\r
 }\r
 \r
index d746d33..cbf71ce 100755 (executable)
 \r
 #include <string.h>\r
 \r
-uint32_t getScsiCapacity(const TargetConfig* config)\r
+uint32_t getScsiCapacity(\r
+       uint32_t sdSectorStart,\r
+       uint16_t bytesPerSector,\r
+       uint32_t scsiSectors)\r
 {\r
        uint32_t capacity =\r
-               (sdDev.capacity - config->sdSectorStart) /\r
-                       SDSectorsPerSCSISector(config);\r
-       if (config->scsiSectors && (capacity > config->scsiSectors))\r
+               (sdDev.capacity - sdSectorStart) /\r
+                       SDSectorsPerSCSISector(bytesPerSector);\r
+       if (scsiSectors && (capacity > scsiSectors))\r
        {\r
-               capacity = config->scsiSectors;\r
+               capacity = scsiSectors;\r
        }\r
        return capacity;\r
 }\r
 \r
 \r
-uint32_t SCSISector2SD(const TargetConfig* config, uint32_t scsiSector)\r
+uint32_t SCSISector2SD(\r
+       uint32_t sdSectorStart,\r
+       uint16_t bytesPerSector,\r
+       uint32_t scsiSector)\r
 {\r
-       return scsiSector * SDSectorsPerSCSISector(config) + config->sdSectorStart;\r
+       return scsiSector * SDSectorsPerSCSISector(bytesPerSector) + sdSectorStart;\r
 }\r
 \r
 // Standard mapping according to ECMA-107 and ISO/IEC 9293:1994\r
@@ -56,7 +62,10 @@ void LBA2CHS(uint32 lba, uint32* c, uint8* h, uint32* s)
        *s = (lba % SCSI_SECTORS_PER_TRACK) + 1;\r
 }\r
 \r
-uint64 scsiByteAddress(const TargetConfig* config, int format, const uint8* addr)\r
+uint64 scsiByteAddress(\r
+       uint16_t bytesPerSector,\r
+       int format,\r
+       const uint8* addr)\r
 {\r
        uint64 result;\r
        switch (format)\r
@@ -69,7 +78,7 @@ uint64 scsiByteAddress(const TargetConfig* config, int format, const uint8* addr
                        (((uint32) addr[2]) << 8) +\r
                        addr[3];\r
 \r
-               result = (uint64_t) config->bytesPerSector * lba;\r
+               result = (uint64_t) bytesPerSector * lba;\r
        } break;\r
 \r
        case ADDRESS_PHYSICAL_BYTE:\r
@@ -87,7 +96,7 @@ uint64 scsiByteAddress(const TargetConfig* config, int format, const uint8* addr
                        (((uint32) addr[6]) << 8) +\r
                        addr[7];\r
 \r
-               result = CHS2LBA(cyl, head, 1) * (uint64_t) config->bytesPerSector + bytes;\r
+               result = CHS2LBA(cyl, head, 1) * (uint64_t) bytesPerSector + bytes;\r
        } break;\r
 \r
        case ADDRESS_PHYSICAL_SECTOR:\r
@@ -105,7 +114,7 @@ uint64 scsiByteAddress(const TargetConfig* config, int format, const uint8* addr
                        (((uint32) addr[6]) << 8) +\r
                        addr[7];\r
 \r
-               result = CHS2LBA(cyl, head, sector) * (uint64_t) config->bytesPerSector;\r
+               result = CHS2LBA(cyl, head, sector) * (uint64_t) bytesPerSector;\r
        } break;\r
 \r
        default:\r
@@ -116,10 +125,14 @@ uint64 scsiByteAddress(const TargetConfig* config, int format, const uint8* addr
 }\r
 \r
 \r
-void scsiSaveByteAddress(const TargetConfig* config, int format, uint64 byteAddr, uint8* buf)\r
+void scsiSaveByteAddress(\r
+       uint16_t bytesPerSector,\r
+       int format,\r
+       uint64 byteAddr,\r
+       uint8* buf)\r
 {\r
-       uint32 lba = byteAddr / config->bytesPerSector;\r
-       uint32 byteOffset = byteAddr % config->bytesPerSector;\r
+       uint32 lba = byteAddr / bytesPerSector;\r
+       uint32 byteOffset = byteAddr % bytesPerSector;\r
 \r
        switch (format)\r
        {\r
@@ -145,7 +158,7 @@ void scsiSaveByteAddress(const TargetConfig* config, int format, uint64 byteAddr
 \r
                LBA2CHS(lba, &cyl, &head, &sector);\r
 \r
-               bytes = sector * config->bytesPerSector + byteOffset;\r
+               bytes = sector * bytesPerSector + byteOffset;\r
 \r
                buf[0] = cyl >> 16;\r
                buf[1] = cyl >> 8;\r
index b20ab60..6d1e7af 100755 (executable)
@@ -35,14 +35,20 @@ typedef enum
        ADDRESS_PHYSICAL_SECTOR = 5
 } SCSI_ADDRESS_FORMAT;
 
-static inline int SDSectorsPerSCSISector(const TargetConfig* config)
+static inline int SDSectorsPerSCSISector(uint16_t bytesPerSector)
 {
-       return (config->bytesPerSector + SD_SECTOR_SIZE - 1) / SD_SECTOR_SIZE;
+       return (bytesPerSector + SD_SECTOR_SIZE - 1) / SD_SECTOR_SIZE;
 }
 
-uint32_t getScsiCapacity(const TargetConfig* config);
+uint32_t getScsiCapacity(
+       uint32_t sdSectorStart,
+       uint16_t bytesPerSector,
+       uint32_t scsiSectors);
 
-uint32_t SCSISector2SD(const TargetConfig* config, uint32_t scsiSector);
+uint32_t SCSISector2SD(
+       uint32_t sdSectorStart,
+       uint16_t bytesPerSector,
+       uint32_t scsiSector);
 
 uint64 CHS2LBA(uint32 c, uint8 h, uint32 s);
 void LBA2CHS(uint32 lba, uint32* c, uint8* h, uint32* s);
@@ -51,9 +57,9 @@ void LBA2CHS(uint32 lba, uint32* c, uint8* h, uint32* s);
 // a linear byte address.
 // addr must be >= 8 bytes.
 uint64 scsiByteAddress(
-       const TargetConfig* config, int format, const uint8* addr);
+       uint16_t bytesPerSector, int format, const uint8* addr);
 void scsiSaveByteAddress(
-       const TargetConfig* config, int format, uint64 byteAddr, uint8* buf);
+       uint16_t bytesPerSector, int format, uint64 byteAddr, uint8* buf);
 
 
 #endif
index 35e3bf7..2f9180b 100755 (executable)
@@ -42,7 +42,10 @@ int main()
 \r
        scsiInit();\r
        scsiDiskInit();\r
-\r
+       \r
+       uint32_t lastSDPoll = getTime_ms();\r
+       sdPoll();\r
+       \r
        while (1)\r
        {\r
                scsiDev.watchdogTick++;\r
@@ -50,6 +53,13 @@ int main()
                scsiPoll();\r
                scsiDiskPoll();\r
                configPoll();\r
+               \r
+               uint32_t now = getTime_ms();\r
+               if (diffTime_ms(lastSDPoll, now) > 200)\r
+               {\r
+                       lastSDPoll = now;\r
+                       sdPoll();\r
+               }\r
        }\r
        return 0;\r
 }\r
index 16207ec..5538cb4 100755 (executable)
@@ -200,7 +200,7 @@ static void doModeSense(
                        scsiDev.data[idx++] = 0; // reserved\r
 \r
                        // Block length\r
-                       uint32_t bytesPerSector = scsiDev.target->cfg->bytesPerSector;\r
+                       uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;\r
                        scsiDev.data[idx++] = bytesPerSector >> 16;\r
                        scsiDev.data[idx++] = bytesPerSector >> 8;\r
                        scsiDev.data[idx++] = bytesPerSector & 0xFF;\r
@@ -226,7 +226,7 @@ static void doModeSense(
                        if (pc != 0x01)\r
                        {\r
                                // Fill out the configured bytes-per-sector\r
-                               uint32_t bytesPerSector = scsiDev.target->cfg->bytesPerSector;\r
+                               uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;\r
                                scsiDev.data[idx+12] = bytesPerSector >> 8;\r
                                scsiDev.data[idx+13] = bytesPerSector & 0xFF;\r
                        }\r
@@ -250,7 +250,14 @@ static void doModeSense(
                                uint32 cyl;\r
                                uint8 head;\r
                                uint32 sector;\r
-                               LBA2CHS(getScsiCapacity(scsiDev.target->cfg), &cyl, &head, &sector);\r
+                               LBA2CHS(\r
+                                       getScsiCapacity(\r
+                                               scsiDev.target->cfg->sdSectorStart,\r
+                                               scsiDev.target->liveCfg.bytesPerSector,\r
+                                               scsiDev.target->cfg->scsiSectors),\r
+                                       &cyl,\r
+                                       &head,\r
+                                       &sector);\r
 \r
                                scsiDev.data[idx+2] = cyl >> 16;\r
                                scsiDev.data[idx+3] = cyl >> 8;\r
@@ -343,7 +350,7 @@ static void doModeSelect(void)
                        blockDescLen = scsiDev.data[3];\r
                        idx = 4;\r
                }\r
-               \r
+\r
                // The unwritten rule.  Blocksizes are normally set using the\r
                // block descriptor value, not by changing page 0x03.\r
                if (blockDescLen >= 8)\r
@@ -357,10 +364,13 @@ static void doModeSelect(void)
                        {\r
                                goto bad;\r
                        }\r
-                       else if (bytesPerSector != scsiDev.target->cfg->bytesPerSector)\r
+                       else\r
                        {\r
-                               // TODO REIMPLEMENT CONFIG SAVEconfig->bytesPerSector = bytesPerSector;\r
-                               configSave();\r
+                               scsiDev.target->liveCfg.bytesPerSector = bytesPerSector;\r
+                               if (bytesPerSector != scsiDev.target->cfg->bytesPerSector)\r
+                               {\r
+                                       configSave(scsiDev.target->targetId, bytesPerSector);\r
+                               }\r
                        }\r
                }\r
                idx += blockDescLen;\r
@@ -389,15 +399,15 @@ static void doModeSelect(void)
                                        goto bad;\r
                                }\r
 \r
-                               // TODO CONFIGFAVE REIMPLEMENT config->bytesPerSector = bytesPerSector;\r
+                               scsiDev.target->liveCfg.bytesPerSector = bytesPerSector;\r
                                if (scsiDev.cdb[1] & 1) // SP Save Pages flag\r
                                {\r
-                                       configSave();\r
+                                       configSave(scsiDev.target->targetId, bytesPerSector);\r
                                }\r
                        }\r
                        break;\r
                        //default:\r
-                       \r
+\r
                                // Easiest to just ignore for now. We'll get here when changing\r
                                // the SCSI block size via the descriptor header.\r
                        }\r
index 061818f..25a3815 100755 (executable)
@@ -846,6 +846,8 @@ void scsiInit()
                {\r
                        scsiDev.targets[i].targetId = cfg->scsiId & CONFIG_TARGET_ID_BITS;\r
                        scsiDev.targets[i].cfg = cfg;\r
+\r
+                       scsiDev.targets[i].liveCfg.bytesPerSector = cfg->bytesPerSector;\r
                }\r
                else\r
                {\r
index 8aa1cd5..828a496 100755 (executable)
@@ -61,11 +61,21 @@ typedef enum
 #define MAX_SECTOR_SIZE 8192
 #define MIN_SECTOR_SIZE 64
 
+// Shadow parameters, possibly not saved to flash yet.
+// Set via Mode Select
+typedef struct
+{
+       uint16_t bytesPerSector;
+} LiveCfg;
+
 typedef struct
 {
        uint8_t targetId;
+
        const TargetConfig* cfg;
 
+       LiveCfg liveCfg;
+
        ScsiSense sense;
 
        uint16 unitAttention; // Set to the sense qualifier key to be returned.
index ba000d9..b7ffab1 100755 (executable)
@@ -161,7 +161,11 @@ sdReadMultiSectorPrep()
 {\r
        uint8 v;\r
        uint32 scsiLBA = (transfer.lba + transfer.currentBlock);\r
-       uint32 sdLBA = SCSISector2SD(scsiDev.target->cfg, scsiLBA);\r
+       uint32 sdLBA =\r
+               SCSISector2SD(\r
+                       scsiDev.target->cfg->sdSectorStart,\r
+                       scsiDev.target->liveCfg.bytesPerSector,\r
+                       scsiLBA);\r
 \r
        if (!sdDev.ccs)\r
        {\r
@@ -652,6 +656,7 @@ int sdInit()
 \r
        sdInitDMA();\r
 \r
+       SD_CS_SetDriveMode(SD_CS_DM_STRONG);\r
        SD_CS_Write(1); // Set CS inactive (active low)\r
 \r
        // Set the SPI clock for 400kHz transfers\r
@@ -731,13 +736,18 @@ void sdWriteMultiSectorPrep()
        // will just be a bit slower.\r
        // Max 22bit parameter.\r
        uint32_t sdBlocks =\r
-               transfer.blocks * SDSectorsPerSCSISector(scsiDev.target->cfg);\r
+               transfer.blocks *\r
+                       SDSectorsPerSCSISector(scsiDev.target->liveCfg.bytesPerSector);\r
        uint32 blocks = sdBlocks > 0x7FFFFF ? 0x7FFFFF : sdBlocks;\r
        sdCommandAndResponse(SD_APP_CMD, 0);\r
        sdCommandAndResponse(SD_APP_SET_WR_BLK_ERASE_COUNT, blocks);\r
 \r
        uint32 scsiLBA = (transfer.lba + transfer.currentBlock);\r
-       uint32 sdLBA = SCSISector2SD(scsiDev.target->cfg, scsiLBA);\r
+       uint32 sdLBA =\r
+               SCSISector2SD(\r
+                       scsiDev.target->cfg->sdSectorStart,\r
+                       scsiDev.target->liveCfg.bytesPerSector,\r
+                       scsiLBA);\r
        if (!sdDev.ccs)\r
        {\r
                sdLBA = sdLBA * SD_SECTOR_SIZE;\r
@@ -758,3 +768,56 @@ void sdWriteMultiSectorPrep()
        }\r
 }\r
 \r
+void sdPoll()\r
+{\r
+       // Check if there's an SD card present.\r
+       if ((scsiDev.phase == BUS_FREE) &&\r
+               !dmaInProgress)\r
+       {\r
+               // The CS line is pulled high by the SD card.\r
+               // De-assert the line, and check if it's high.\r
+               // This isn't foolproof as it'll be left floating without\r
+               // an SD card. We can't use the built-in pull-down resistor as it will\r
+               // overpower the SD pullup resistor.\r
+               SD_CS_Write(0);\r
+               SD_CS_SetDriveMode(SD_CS_DM_DIG_HIZ);\r
+               \r
+               CyDelayCycles(16);\r
+               uint8_t cs = SD_CS_Read();\r
+               SD_CS_SetDriveMode(SD_CS_DM_STRONG)     ;\r
+\r
+               if (cs && !(blockDev.state & DISK_PRESENT))\r
+               {\r
+                       static int firstInit = 1;\r
+               \r
+                       // Debounce\r
+                       CyDelay(250);\r
+                       \r
+                       if (sdInit())\r
+                       {\r
+                               blockDev.state |= DISK_PRESENT | DISK_INITIALISED;\r
+                               \r
+                               if (!firstInit)\r
+                               {\r
+                                       int i;\r
+                                       for (i = 0; i < MAX_SCSI_TARGETS; ++i)\r
+                                       {\r
+                                               scsiDev.targets[i].unitAttention = PARAMETERS_CHANGED;\r
+                                       }\r
+                               }\r
+                               firstInit = 0;\r
+                       }\r
+               }\r
+               else if (!cs && (blockDev.state & DISK_PRESENT))\r
+               {\r
+                       sdDev.capacity = 0;\r
+                       blockDev.state &= ~DISK_PRESENT;\r
+                       blockDev.state &= ~DISK_INITIALISED;\r
+                       int i;\r
+                       for (i = 0; i < MAX_SCSI_TARGETS; ++i)\r
+                       {\r
+                               scsiDev.targets[i].unitAttention = PARAMETERS_CHANGED;\r
+                       }\r
+               }\r
+       }\r
+}\r
index ffa4dd0..7fec481 100755 (executable)
@@ -70,4 +70,6 @@ void sdReadSingleSectorDMA(uint32_t lba, uint8_t* outputBuffer);
 int sdReadSectorDMAPoll();
 void sdCompleteRead(void);
 
+void sdPoll();
+
 #endif
index 2ee57e0..d9cdcac 100644 (file)
 /* SCSI_Parity_Error */\r
 #define SCSI_Parity_Error_sts_sts_reg__0__MASK 0x01u\r
 #define SCSI_Parity_Error_sts_sts_reg__0__POS 0\r
-#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL\r
-#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB07_08_ST\r
+#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB06_07_ACTL\r
+#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB06_07_ST\r
 #define SCSI_Parity_Error_sts_sts_reg__MASK 0x01u\r
-#define SCSI_Parity_Error_sts_sts_reg__MASK_REG CYREG_B0_UDB07_MSK\r
-#define SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB07_ACTL\r
-#define SCSI_Parity_Error_sts_sts_reg__STATUS_REG CYREG_B0_UDB07_ST\r
+#define SCSI_Parity_Error_sts_sts_reg__MASK_REG CYREG_B0_UDB06_MSK\r
+#define SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB06_ACTL\r
+#define SCSI_Parity_Error_sts_sts_reg__STATUS_REG CYREG_B0_UDB06_ST\r
 \r
 /* USBFS_bus_reset */\r
 #define USBFS_bus_reset__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
 /* SCSI_CTL_PHASE */\r
 #define SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK 0x01u\r
 #define SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS 0\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB02_03_ACTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB02_03_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB02_03_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB02_03_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB02_03_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB02_03_MSK\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB02_03_MSK\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB02_03_MSK\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB02_03_MSK\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB00_01_ACTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB00_01_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB00_01_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB00_01_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB00_01_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB00_01_MSK\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB00_01_MSK\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB00_01_MSK\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB00_01_MSK\r
 #define SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK 0x02u\r
 #define SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS 1\r
 #define SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK 0x04u\r
 #define SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS 2\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB02_ACTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB02_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB02_ST_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB02_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB02_ST_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB00_ACTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB00_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB00_ST_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB00_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB00_ST_CTL\r
 #define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK 0x07u\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB02_MSK\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB00_MSK_ACTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB00_MSK\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB00_MSK_ACTL\r
 \r
 /* SCSI_Filtered */\r
 #define SCSI_Filtered_sts_sts_reg__0__MASK 0x01u\r
 #define SCSI_Filtered_sts_sts_reg__0__POS 0\r
-#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB00_01_ACTL\r
-#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB00_01_ST\r
+#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB14_15_ACTL\r
+#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB14_15_ST\r
 #define SCSI_Filtered_sts_sts_reg__1__MASK 0x02u\r
 #define SCSI_Filtered_sts_sts_reg__1__POS 1\r
 #define SCSI_Filtered_sts_sts_reg__2__MASK 0x04u\r
 #define SCSI_Filtered_sts_sts_reg__4__MASK 0x10u\r
 #define SCSI_Filtered_sts_sts_reg__4__POS 4\r
 #define SCSI_Filtered_sts_sts_reg__MASK 0x1Fu\r
-#define SCSI_Filtered_sts_sts_reg__MASK_REG CYREG_B0_UDB00_MSK\r
-#define SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB00_ACTL\r
-#define SCSI_Filtered_sts_sts_reg__STATUS_REG CYREG_B0_UDB00_ST\r
+#define SCSI_Filtered_sts_sts_reg__MASK_REG CYREG_B0_UDB14_MSK\r
+#define SCSI_Filtered_sts_sts_reg__MASK_ST_AUX_CTL_REG CYREG_B0_UDB14_MSK_ACTL\r
+#define SCSI_Filtered_sts_sts_reg__PER_ST_AUX_CTL_REG CYREG_B0_UDB14_MSK_ACTL\r
+#define SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB14_ACTL\r
+#define SCSI_Filtered_sts_sts_reg__STATUS_CNT_REG CYREG_B0_UDB14_ST_CTL\r
+#define SCSI_Filtered_sts_sts_reg__STATUS_CONTROL_REG CYREG_B0_UDB14_ST_CTL\r
+#define SCSI_Filtered_sts_sts_reg__STATUS_REG CYREG_B0_UDB14_ST\r
 \r
 /* SCSI_Out_Bits */\r
 #define SCSI_Out_Bits_Sync_ctrl_reg__0__MASK 0x01u\r
 #define SCSI_Out_Bits_Sync_ctrl_reg__0__POS 0\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB03_04_ACTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB03_04_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB03_04_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB03_04_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB03_04_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB03_04_MSK\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB03_04_MSK\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB03_04_MSK\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB03_04_MSK\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB04_05_ACTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB04_05_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB04_05_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB04_05_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB04_05_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB04_05_MSK\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB04_05_MSK\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB04_05_MSK\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB04_05_MSK\r
 #define SCSI_Out_Bits_Sync_ctrl_reg__1__MASK 0x02u\r
 #define SCSI_Out_Bits_Sync_ctrl_reg__1__POS 1\r
 #define SCSI_Out_Bits_Sync_ctrl_reg__2__MASK 0x04u\r
 #define SCSI_Out_Bits_Sync_ctrl_reg__6__POS 6\r
 #define SCSI_Out_Bits_Sync_ctrl_reg__7__MASK 0x80u\r
 #define SCSI_Out_Bits_Sync_ctrl_reg__7__POS 7\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB03_ACTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB03_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB03_ST_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB03_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB03_ST_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB04_ACTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB04_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB04_ST_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB04_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB04_ST_CTL\r
 #define SCSI_Out_Bits_Sync_ctrl_reg__MASK 0xFFu\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB03_MSK\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB04_MSK_ACTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB04_MSK\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB04_MSK_ACTL\r
 \r
 /* USBFS_arb_int */\r
 #define USBFS_arb_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
 /* SCSI_Out_Ctl */\r
 #define SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK 0x01u\r
 #define SCSI_Out_Ctl_Sync_ctrl_reg__0__POS 0\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB11_12_ACTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB11_12_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB11_12_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB11_12_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB11_12_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB11_12_MSK\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB11_12_MSK\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB11_12_MSK\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB11_12_MSK\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB11_ACTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB11_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB11_ST_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB11_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB11_ST_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB14_15_ACTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB14_15_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB14_15_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB14_15_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB14_15_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB14_15_MSK\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB14_15_MSK\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB14_15_MSK\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB14_15_MSK\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB14_ACTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB14_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB14_ST_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB14_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB14_ST_CTL\r
 #define SCSI_Out_Ctl_Sync_ctrl_reg__MASK 0x01u\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB11_MSK\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB14_MSK_ACTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB14_MSK\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB14_MSK_ACTL\r
 \r
 /* SCSI_Out_DBx */\r
 #define SCSI_Out_DBx__0__AG CYREG_PRT6_AG\r
 #define SCSI_RST_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
 \r
 /* SDCard_BSPIM */\r
-#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB06_07_ACTL\r
-#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG CYREG_B1_UDB06_07_ST\r
-#define SDCard_BSPIM_BitCounter_ST__MASK_REG CYREG_B1_UDB06_MSK\r
-#define SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL\r
-#define SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL\r
-#define SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG CYREG_B1_UDB06_ACTL\r
-#define SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG CYREG_B1_UDB06_ST_CTL\r
-#define SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG CYREG_B1_UDB06_ST_CTL\r
-#define SDCard_BSPIM_BitCounter_ST__STATUS_REG CYREG_B1_UDB06_ST\r
-#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG CYREG_B1_UDB06_07_ACTL\r
-#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG CYREG_B1_UDB06_07_CTL\r
-#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG CYREG_B1_UDB06_07_CTL\r
-#define SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG CYREG_B1_UDB06_07_CTL\r
-#define SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG CYREG_B1_UDB06_07_CTL\r
-#define SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG CYREG_B1_UDB06_07_MSK\r
-#define SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG CYREG_B1_UDB06_07_MSK\r
-#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG CYREG_B1_UDB06_07_MSK\r
-#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG CYREG_B1_UDB06_07_MSK\r
-#define SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG CYREG_B1_UDB06_ACTL\r
-#define SDCard_BSPIM_BitCounter__CONTROL_REG CYREG_B1_UDB06_CTL\r
-#define SDCard_BSPIM_BitCounter__CONTROL_ST_REG CYREG_B1_UDB06_ST_CTL\r
-#define SDCard_BSPIM_BitCounter__COUNT_REG CYREG_B1_UDB06_CTL\r
-#define SDCard_BSPIM_BitCounter__COUNT_ST_REG CYREG_B1_UDB06_ST_CTL\r
-#define SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL\r
-#define SDCard_BSPIM_BitCounter__PERIOD_REG CYREG_B1_UDB06_MSK\r
-#define SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL\r
-#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB05_06_ACTL\r
-#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG CYREG_B1_UDB05_06_ST\r
+#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL\r
+#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG CYREG_B1_UDB04_05_ST\r
+#define SDCard_BSPIM_BitCounter_ST__MASK_REG CYREG_B1_UDB04_MSK\r
+#define SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL\r
+#define SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL\r
+#define SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG CYREG_B1_UDB04_ACTL\r
+#define SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG CYREG_B1_UDB04_ST_CTL\r
+#define SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG CYREG_B1_UDB04_ST_CTL\r
+#define SDCard_BSPIM_BitCounter_ST__STATUS_REG CYREG_B1_UDB04_ST\r
+#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL\r
+#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG CYREG_B1_UDB04_05_CTL\r
+#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG CYREG_B1_UDB04_05_CTL\r
+#define SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG CYREG_B1_UDB04_05_CTL\r
+#define SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG CYREG_B1_UDB04_05_CTL\r
+#define SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG CYREG_B1_UDB04_05_MSK\r
+#define SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG CYREG_B1_UDB04_05_MSK\r
+#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG CYREG_B1_UDB04_05_MSK\r
+#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG CYREG_B1_UDB04_05_MSK\r
+#define SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG CYREG_B1_UDB04_ACTL\r
+#define SDCard_BSPIM_BitCounter__CONTROL_REG CYREG_B1_UDB04_CTL\r
+#define SDCard_BSPIM_BitCounter__CONTROL_ST_REG CYREG_B1_UDB04_ST_CTL\r
+#define SDCard_BSPIM_BitCounter__COUNT_REG CYREG_B1_UDB04_CTL\r
+#define SDCard_BSPIM_BitCounter__COUNT_ST_REG CYREG_B1_UDB04_ST_CTL\r
+#define SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL\r
+#define SDCard_BSPIM_BitCounter__PERIOD_REG CYREG_B1_UDB04_MSK\r
+#define SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL\r
+#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB07_08_ACTL\r
+#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG CYREG_B1_UDB07_08_ST\r
 #define SDCard_BSPIM_RxStsReg__4__MASK 0x10u\r
 #define SDCard_BSPIM_RxStsReg__4__POS 4\r
 #define SDCard_BSPIM_RxStsReg__5__MASK 0x20u\r
 #define SDCard_BSPIM_RxStsReg__6__MASK 0x40u\r
 #define SDCard_BSPIM_RxStsReg__6__POS 6\r
 #define SDCard_BSPIM_RxStsReg__MASK 0x70u\r
-#define SDCard_BSPIM_RxStsReg__MASK_REG CYREG_B1_UDB05_MSK\r
-#define SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG CYREG_B1_UDB05_ACTL\r
-#define SDCard_BSPIM_RxStsReg__STATUS_REG CYREG_B1_UDB05_ST\r
+#define SDCard_BSPIM_RxStsReg__MASK_REG CYREG_B1_UDB07_MSK\r
+#define SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG CYREG_B1_UDB07_ACTL\r
+#define SDCard_BSPIM_RxStsReg__STATUS_REG CYREG_B1_UDB07_ST\r
 #define SDCard_BSPIM_TxStsReg__0__MASK 0x01u\r
 #define SDCard_BSPIM_TxStsReg__0__POS 0\r
-#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB06_07_ACTL\r
-#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG CYREG_B0_UDB06_07_ST\r
+#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL\r
+#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG CYREG_B0_UDB07_08_ST\r
 #define SDCard_BSPIM_TxStsReg__1__MASK 0x02u\r
 #define SDCard_BSPIM_TxStsReg__1__POS 1\r
 #define SDCard_BSPIM_TxStsReg__2__MASK 0x04u\r
 #define SDCard_BSPIM_TxStsReg__4__MASK 0x10u\r
 #define SDCard_BSPIM_TxStsReg__4__POS 4\r
 #define SDCard_BSPIM_TxStsReg__MASK 0x1Fu\r
-#define SDCard_BSPIM_TxStsReg__MASK_REG CYREG_B0_UDB06_MSK\r
-#define SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG CYREG_B0_UDB06_ACTL\r
-#define SDCard_BSPIM_TxStsReg__STATUS_REG CYREG_B0_UDB06_ST\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG CYREG_B1_UDB05_06_A0\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG CYREG_B1_UDB05_06_A1\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG CYREG_B1_UDB05_06_D0\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG CYREG_B1_UDB05_06_D1\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG CYREG_B1_UDB05_06_ACTL\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG CYREG_B1_UDB05_06_F0\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG CYREG_B1_UDB05_06_F1\r
-#define SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG CYREG_B1_UDB05_A0_A1\r
-#define SDCard_BSPIM_sR8_Dp_u0__A0_REG CYREG_B1_UDB05_A0\r
-#define SDCard_BSPIM_sR8_Dp_u0__A1_REG CYREG_B1_UDB05_A1\r
-#define SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG CYREG_B1_UDB05_D0_D1\r
-#define SDCard_BSPIM_sR8_Dp_u0__D0_REG CYREG_B1_UDB05_D0\r
-#define SDCard_BSPIM_sR8_Dp_u0__D1_REG CYREG_B1_UDB05_D1\r
-#define SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG CYREG_B1_UDB05_ACTL\r
-#define SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG CYREG_B1_UDB05_F0_F1\r
-#define SDCard_BSPIM_sR8_Dp_u0__F0_REG CYREG_B1_UDB05_F0\r
-#define SDCard_BSPIM_sR8_Dp_u0__F1_REG CYREG_B1_UDB05_F1\r
+#define SDCard_BSPIM_TxStsReg__MASK_REG CYREG_B0_UDB07_MSK\r
+#define SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG CYREG_B0_UDB07_ACTL\r
+#define SDCard_BSPIM_TxStsReg__STATUS_REG CYREG_B0_UDB07_ST\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG CYREG_B1_UDB04_05_A0\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG CYREG_B1_UDB04_05_A1\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG CYREG_B1_UDB04_05_D0\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG CYREG_B1_UDB04_05_D1\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG CYREG_B1_UDB04_05_F0\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG CYREG_B1_UDB04_05_F1\r
+#define SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG CYREG_B1_UDB04_A0_A1\r
+#define SDCard_BSPIM_sR8_Dp_u0__A0_REG CYREG_B1_UDB04_A0\r
+#define SDCard_BSPIM_sR8_Dp_u0__A1_REG CYREG_B1_UDB04_A1\r
+#define SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG CYREG_B1_UDB04_D0_D1\r
+#define SDCard_BSPIM_sR8_Dp_u0__D0_REG CYREG_B1_UDB04_D0\r
+#define SDCard_BSPIM_sR8_Dp_u0__D1_REG CYREG_B1_UDB04_D1\r
+#define SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG CYREG_B1_UDB04_ACTL\r
+#define SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG CYREG_B1_UDB04_F0_F1\r
+#define SDCard_BSPIM_sR8_Dp_u0__F0_REG CYREG_B1_UDB04_F0\r
+#define SDCard_BSPIM_sR8_Dp_u0__F1_REG CYREG_B1_UDB04_F1\r
+#define SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL\r
+#define SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL\r
 \r
 /* USBFS_dp_int */\r
 #define USBFS_dp_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
 /* scsiTarget */\r
 #define scsiTarget_StatusReg__0__MASK 0x01u\r
 #define scsiTarget_StatusReg__0__POS 0\r
-#define scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB03_04_ACTL\r
-#define scsiTarget_StatusReg__16BIT_STATUS_REG CYREG_B0_UDB03_04_ST\r
+#define scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB05_06_ACTL\r
+#define scsiTarget_StatusReg__16BIT_STATUS_REG CYREG_B0_UDB05_06_ST\r
 #define scsiTarget_StatusReg__1__MASK 0x02u\r
 #define scsiTarget_StatusReg__1__POS 1\r
 #define scsiTarget_StatusReg__2__MASK 0x04u\r
 #define scsiTarget_StatusReg__4__MASK 0x10u\r
 #define scsiTarget_StatusReg__4__POS 4\r
 #define scsiTarget_StatusReg__MASK 0x1Fu\r
-#define scsiTarget_StatusReg__MASK_REG CYREG_B0_UDB03_MSK\r
-#define scsiTarget_StatusReg__MASK_ST_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL\r
-#define scsiTarget_StatusReg__PER_ST_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL\r
-#define scsiTarget_StatusReg__STATUS_AUX_CTL_REG CYREG_B0_UDB03_ACTL\r
-#define scsiTarget_StatusReg__STATUS_CNT_REG CYREG_B0_UDB03_ST_CTL\r
-#define scsiTarget_StatusReg__STATUS_CONTROL_REG CYREG_B0_UDB03_ST_CTL\r
-#define scsiTarget_StatusReg__STATUS_REG CYREG_B0_UDB03_ST\r
-#define scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB12_13_ACTL\r
-#define scsiTarget_datapath_PI__16BIT_STATUS_REG CYREG_B0_UDB12_13_ST\r
-#define scsiTarget_datapath_PI__MASK_REG CYREG_B0_UDB12_MSK\r
-#define scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL\r
-#define scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL\r
-#define scsiTarget_datapath_PI__STATUS_AUX_CTL_REG CYREG_B0_UDB12_ACTL\r
-#define scsiTarget_datapath_PI__STATUS_CNT_REG CYREG_B0_UDB12_ST_CTL\r
-#define scsiTarget_datapath_PI__STATUS_CONTROL_REG CYREG_B0_UDB12_ST_CTL\r
-#define scsiTarget_datapath_PI__STATUS_REG CYREG_B0_UDB12_ST\r
-#define scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB12_13_ACTL\r
-#define scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB12_13_CTL\r
-#define scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB12_13_CTL\r
-#define scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB12_13_CTL\r
-#define scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG CYREG_B0_UDB12_13_CTL\r
-#define scsiTarget_datapath_PO__16BIT_MASK_MASK_REG CYREG_B0_UDB12_13_MSK\r
-#define scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG CYREG_B0_UDB12_13_MSK\r
-#define scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG CYREG_B0_UDB12_13_MSK\r
-#define scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB12_13_MSK\r
-#define scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG CYREG_B0_UDB12_ACTL\r
-#define scsiTarget_datapath_PO__CONTROL_REG CYREG_B0_UDB12_CTL\r
-#define scsiTarget_datapath_PO__CONTROL_ST_REG CYREG_B0_UDB12_ST_CTL\r
-#define scsiTarget_datapath_PO__COUNT_REG CYREG_B0_UDB12_CTL\r
-#define scsiTarget_datapath_PO__COUNT_ST_REG CYREG_B0_UDB12_ST_CTL\r
-#define scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL\r
-#define scsiTarget_datapath_PO__PERIOD_REG CYREG_B0_UDB12_MSK\r
-#define scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL\r
-#define scsiTarget_datapath__16BIT_A0_REG CYREG_B0_UDB12_13_A0\r
-#define scsiTarget_datapath__16BIT_A1_REG CYREG_B0_UDB12_13_A1\r
-#define scsiTarget_datapath__16BIT_D0_REG CYREG_B0_UDB12_13_D0\r
-#define scsiTarget_datapath__16BIT_D1_REG CYREG_B0_UDB12_13_D1\r
-#define scsiTarget_datapath__16BIT_DP_AUX_CTL_REG CYREG_B0_UDB12_13_ACTL\r
-#define scsiTarget_datapath__16BIT_F0_REG CYREG_B0_UDB12_13_F0\r
-#define scsiTarget_datapath__16BIT_F1_REG CYREG_B0_UDB12_13_F1\r
-#define scsiTarget_datapath__A0_A1_REG CYREG_B0_UDB12_A0_A1\r
-#define scsiTarget_datapath__A0_REG CYREG_B0_UDB12_A0\r
-#define scsiTarget_datapath__A1_REG CYREG_B0_UDB12_A1\r
-#define scsiTarget_datapath__D0_D1_REG CYREG_B0_UDB12_D0_D1\r
-#define scsiTarget_datapath__D0_REG CYREG_B0_UDB12_D0\r
-#define scsiTarget_datapath__D1_REG CYREG_B0_UDB12_D1\r
-#define scsiTarget_datapath__DP_AUX_CTL_REG CYREG_B0_UDB12_ACTL\r
-#define scsiTarget_datapath__F0_F1_REG CYREG_B0_UDB12_F0_F1\r
-#define scsiTarget_datapath__F0_REG CYREG_B0_UDB12_F0\r
-#define scsiTarget_datapath__F1_REG CYREG_B0_UDB12_F1\r
-#define scsiTarget_datapath__MSK_DP_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL\r
-#define scsiTarget_datapath__PER_DP_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL\r
+#define scsiTarget_StatusReg__MASK_REG CYREG_B0_UDB05_MSK\r
+#define scsiTarget_StatusReg__STATUS_AUX_CTL_REG CYREG_B0_UDB05_ACTL\r
+#define scsiTarget_StatusReg__STATUS_REG CYREG_B0_UDB05_ST\r
+#define scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB01_02_ACTL\r
+#define scsiTarget_datapath_PI__16BIT_STATUS_REG CYREG_B0_UDB01_02_ST\r
+#define scsiTarget_datapath_PI__MASK_REG CYREG_B0_UDB01_MSK\r
+#define scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG CYREG_B0_UDB01_MSK_ACTL\r
+#define scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG CYREG_B0_UDB01_MSK_ACTL\r
+#define scsiTarget_datapath_PI__STATUS_AUX_CTL_REG CYREG_B0_UDB01_ACTL\r
+#define scsiTarget_datapath_PI__STATUS_CNT_REG CYREG_B0_UDB01_ST_CTL\r
+#define scsiTarget_datapath_PI__STATUS_CONTROL_REG CYREG_B0_UDB01_ST_CTL\r
+#define scsiTarget_datapath_PI__STATUS_REG CYREG_B0_UDB01_ST\r
+#define scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB01_02_ACTL\r
+#define scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB01_02_CTL\r
+#define scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB01_02_CTL\r
+#define scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB01_02_CTL\r
+#define scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG CYREG_B0_UDB01_02_CTL\r
+#define scsiTarget_datapath_PO__16BIT_MASK_MASK_REG CYREG_B0_UDB01_02_MSK\r
+#define scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG CYREG_B0_UDB01_02_MSK\r
+#define scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG CYREG_B0_UDB01_02_MSK\r
+#define scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB01_02_MSK\r
+#define scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG CYREG_B0_UDB01_ACTL\r
+#define scsiTarget_datapath_PO__CONTROL_REG CYREG_B0_UDB01_CTL\r
+#define scsiTarget_datapath_PO__CONTROL_ST_REG CYREG_B0_UDB01_ST_CTL\r
+#define scsiTarget_datapath_PO__COUNT_REG CYREG_B0_UDB01_CTL\r
+#define scsiTarget_datapath_PO__COUNT_ST_REG CYREG_B0_UDB01_ST_CTL\r
+#define scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB01_MSK_ACTL\r
+#define scsiTarget_datapath_PO__PERIOD_REG CYREG_B0_UDB01_MSK\r
+#define scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG CYREG_B0_UDB01_MSK_ACTL\r
+#define scsiTarget_datapath__16BIT_A0_REG CYREG_B0_UDB01_02_A0\r
+#define scsiTarget_datapath__16BIT_A1_REG CYREG_B0_UDB01_02_A1\r
+#define scsiTarget_datapath__16BIT_D0_REG CYREG_B0_UDB01_02_D0\r
+#define scsiTarget_datapath__16BIT_D1_REG CYREG_B0_UDB01_02_D1\r
+#define scsiTarget_datapath__16BIT_DP_AUX_CTL_REG CYREG_B0_UDB01_02_ACTL\r
+#define scsiTarget_datapath__16BIT_F0_REG CYREG_B0_UDB01_02_F0\r
+#define scsiTarget_datapath__16BIT_F1_REG CYREG_B0_UDB01_02_F1\r
+#define scsiTarget_datapath__A0_A1_REG CYREG_B0_UDB01_A0_A1\r
+#define scsiTarget_datapath__A0_REG CYREG_B0_UDB01_A0\r
+#define scsiTarget_datapath__A1_REG CYREG_B0_UDB01_A1\r
+#define scsiTarget_datapath__D0_D1_REG CYREG_B0_UDB01_D0_D1\r
+#define scsiTarget_datapath__D0_REG CYREG_B0_UDB01_D0\r
+#define scsiTarget_datapath__D1_REG CYREG_B0_UDB01_D1\r
+#define scsiTarget_datapath__DP_AUX_CTL_REG CYREG_B0_UDB01_ACTL\r
+#define scsiTarget_datapath__F0_F1_REG CYREG_B0_UDB01_F0_F1\r
+#define scsiTarget_datapath__F0_REG CYREG_B0_UDB01_F0\r
+#define scsiTarget_datapath__F1_REG CYREG_B0_UDB01_F1\r
+#define scsiTarget_datapath__MSK_DP_AUX_CTL_REG CYREG_B0_UDB01_MSK_ACTL\r
+#define scsiTarget_datapath__PER_DP_AUX_CTL_REG CYREG_B0_UDB01_MSK_ACTL\r
 \r
 /* USBFS_ep_0 */\r
 #define USBFS_ep_0__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
index ff81377..8463e7b 100644 (file)
@@ -121,7 +121,7 @@ static void CyClockStartupError(uint8 errorCode)
 }\r
 #endif\r
 \r
-#define CY_CFG_BASE_ADDR_COUNT 41u\r
+#define CY_CFG_BASE_ADDR_COUNT 40u\r
 CYPACKED typedef struct\r
 {\r
        uint8 offset;\r
@@ -335,7 +335,7 @@ void cyfitter_cfg(void)
 \r
        /* IOPINS0_3 Address: CYREG_PRT3_DR Size (bytes): 10 */\r
        static const uint8 CYCODE BS_IOPINS0_3_VAL[] = {\r
-               0x10u, 0x00u, 0x63u, 0x1Cu, 0x1Cu, 0x00u, 0x0Cu, 0x00u, 0x00u, 0x00u};\r
+               0x10u, 0x00u, 0x63u, 0x1Cu, 0x1Cu, 0x00u, 0x0Cu, 0x00u, 0x00u, 0x01u};\r
 \r
        /* IOPINS0_4 Address: CYREG_PRT4_DM0 Size (bytes): 8 */\r
        static const uint8 CYCODE BS_IOPINS0_4_VAL[] = {\r
@@ -383,390 +383,357 @@ void cyfitter_cfg(void)
                        0x4000520Bu, /* Base address: 0x40005200 Count: 11 */\r
                        0x40006401u, /* Base address: 0x40006400 Count: 1 */\r
                        0x40006501u, /* Base address: 0x40006500 Count: 1 */\r
-                       0x40010047u, /* Base address: 0x40010000 Count: 71 */\r
-                       0x4001013Fu, /* Base address: 0x40010100 Count: 63 */\r
-                       0x40010249u, /* Base address: 0x40010200 Count: 73 */\r
-                       0x40010354u, /* Base address: 0x40010300 Count: 84 */\r
-                       0x40010453u, /* Base address: 0x40010400 Count: 83 */\r
-                       0x4001054Fu, /* Base address: 0x40010500 Count: 79 */\r
-                       0x40010651u, /* Base address: 0x40010600 Count: 81 */\r
-                       0x40010747u, /* Base address: 0x40010700 Count: 71 */\r
-                       0x4001090Bu, /* Base address: 0x40010900 Count: 11 */\r
-                       0x40010A4Au, /* Base address: 0x40010A00 Count: 74 */\r
-                       0x40010B4Au, /* Base address: 0x40010B00 Count: 74 */\r
-                       0x40010C39u, /* Base address: 0x40010C00 Count: 57 */\r
-                       0x40010D5Cu, /* Base address: 0x40010D00 Count: 92 */\r
-                       0x40010E44u, /* Base address: 0x40010E00 Count: 68 */\r
-                       0x40010F3Bu, /* Base address: 0x40010F00 Count: 59 */\r
-                       0x40011465u, /* Base address: 0x40011400 Count: 101 */\r
-                       0x4001154Fu, /* Base address: 0x40011500 Count: 79 */\r
-                       0x40011650u, /* Base address: 0x40011600 Count: 80 */\r
-                       0x40011744u, /* Base address: 0x40011700 Count: 68 */\r
-                       0x40011804u, /* Base address: 0x40011800 Count: 4 */\r
+                       0x4001003Bu, /* Base address: 0x40010000 Count: 59 */\r
+                       0x40010136u, /* Base address: 0x40010100 Count: 54 */\r
+                       0x40010244u, /* Base address: 0x40010200 Count: 68 */\r
+                       0x40010358u, /* Base address: 0x40010300 Count: 88 */\r
+                       0x40010445u, /* Base address: 0x40010400 Count: 69 */\r
+                       0x40010551u, /* Base address: 0x40010500 Count: 81 */\r
+                       0x40010653u, /* Base address: 0x40010600 Count: 83 */\r
+                       0x40010755u, /* Base address: 0x40010700 Count: 85 */\r
+                       0x4001090Du, /* Base address: 0x40010900 Count: 13 */\r
+                       0x40010A47u, /* Base address: 0x40010A00 Count: 71 */\r
+                       0x40010B47u, /* Base address: 0x40010B00 Count: 71 */\r
+                       0x40010C51u, /* Base address: 0x40010C00 Count: 81 */\r
+                       0x40010D54u, /* Base address: 0x40010D00 Count: 84 */\r
+                       0x40010E4Au, /* Base address: 0x40010E00 Count: 74 */\r
+                       0x40010F34u, /* Base address: 0x40010F00 Count: 52 */\r
+                       0x4001141Eu, /* Base address: 0x40011400 Count: 30 */\r
+                       0x40011555u, /* Base address: 0x40011500 Count: 85 */\r
+                       0x40011655u, /* Base address: 0x40011600 Count: 85 */\r
+                       0x40011746u, /* Base address: 0x40011700 Count: 70 */\r
                        0x40011907u, /* Base address: 0x40011900 Count: 7 */\r
                        0x40011B09u, /* Base address: 0x40011B00 Count: 9 */\r
                        0x40014018u, /* Base address: 0x40014000 Count: 24 */\r
-                       0x4001411Du, /* Base address: 0x40014100 Count: 29 */\r
-                       0x40014210u, /* Base address: 0x40014200 Count: 16 */\r
+                       0x40014122u, /* Base address: 0x40014100 Count: 34 */\r
+                       0x40014209u, /* Base address: 0x40014200 Count: 9 */\r
                        0x4001430Bu, /* Base address: 0x40014300 Count: 11 */\r
-                       0x40014411u, /* Base address: 0x40014400 Count: 17 */\r
-                       0x40014514u, /* Base address: 0x40014500 Count: 20 */\r
-                       0x4001460Du, /* Base address: 0x40014600 Count: 13 */\r
+                       0x4001440Fu, /* Base address: 0x40014400 Count: 15 */\r
+                       0x4001451Cu, /* Base address: 0x40014500 Count: 28 */\r
+                       0x4001460Eu, /* Base address: 0x40014600 Count: 14 */\r
                        0x4001470Cu, /* Base address: 0x40014700 Count: 12 */\r
-                       0x40014809u, /* Base address: 0x40014800 Count: 9 */\r
-                       0x40014910u, /* Base address: 0x40014900 Count: 16 */\r
-                       0x40014C01u, /* Base address: 0x40014C00 Count: 1 */\r
-                       0x40014D04u, /* Base address: 0x40014D00 Count: 4 */\r
-                       0x40015004u, /* Base address: 0x40015000 Count: 4 */\r
+                       0x40014806u, /* Base address: 0x40014800 Count: 6 */\r
+                       0x4001490Bu, /* Base address: 0x40014900 Count: 11 */\r
+                       0x40014C05u, /* Base address: 0x40014C00 Count: 5 */\r
+                       0x40014D0Au, /* Base address: 0x40014D00 Count: 10 */\r
+                       0x40015002u, /* Base address: 0x40015000 Count: 2 */\r
                        0x40015104u, /* Base address: 0x40015100 Count: 4 */\r
                };\r
 \r
                static const cy_cfg_addrvalue_t CYCODE cy_cfg_data_table[] = {\r
                        {0x7Eu, 0x02u},\r
                        {0x01u, 0x20u},\r
-                       {0x0Au, 0x36u},\r
-                       {0x00u, 0x12u},\r
-                       {0x01u, 0x04u},\r
-                       {0x18u, 0x08u},\r
-                       {0x1Cu, 0x61u},\r
-                       {0x20u, 0x50u},\r
-                       {0x21u, 0x90u},\r
+                       {0x0Au, 0x4Bu},\r
+                       {0x00u, 0x11u},\r
+                       {0x01u, 0x02u},\r
+                       {0x18u, 0x04u},\r
+                       {0x1Cu, 0x71u},\r
+                       {0x20u, 0x58u},\r
+                       {0x21u, 0xC8u},\r
                        {0x2Cu, 0x0Eu},\r
-                       {0x30u, 0x0Au},\r
-                       {0x31u, 0x09u},\r
+                       {0x30u, 0x05u},\r
+                       {0x31u, 0x06u},\r
                        {0x34u, 0x80u},\r
                        {0x7Cu, 0x40u},\r
-                       {0x2Cu, 0x02u},\r
-                       {0x86u, 0x0Fu},\r
-                       {0x02u, 0x10u},\r
-                       {0x03u, 0x08u},\r
-                       {0x04u, 0x01u},\r
-                       {0x06u, 0x02u},\r
-                       {0x07u, 0x07u},\r
-                       {0x0Bu, 0x70u},\r
-                       {0x0Cu, 0x02u},\r
-                       {0x0Du, 0x44u},\r
-                       {0x0Eu, 0x01u},\r
-                       {0x0Fu, 0x88u},\r
-                       {0x14u, 0x02u},\r
-                       {0x15u, 0x99u},\r
-                       {0x16u, 0x05u},\r
-                       {0x17u, 0x22u},\r
-                       {0x18u, 0x02u},\r
-                       {0x1Au, 0x09u},\r
-                       {0x1Cu, 0x10u},\r
-                       {0x1Du, 0xAAu},\r
-                       {0x1Eu, 0x20u},\r
-                       {0x1Fu, 0x55u},\r
-                       {0x26u, 0x20u},\r
+                       {0x21u, 0x02u},\r
+                       {0x84u, 0x0Fu},\r
+                       {0x00u, 0x01u},\r
+                       {0x10u, 0x04u},\r
+                       {0x11u, 0x01u},\r
+                       {0x19u, 0x02u},\r
                        {0x28u, 0x02u},\r
-                       {0x2Au, 0x01u},\r
-                       {0x2Bu, 0x80u},\r
                        {0x30u, 0x04u},\r
-                       {0x32u, 0x08u},\r
-                       {0x33u, 0x0Fu},\r
-                       {0x34u, 0x03u},\r
-                       {0x35u, 0xF0u},\r
-                       {0x36u, 0x30u},\r
-                       {0x3Au, 0x20u},\r
-                       {0x3Eu, 0x40u},\r
+                       {0x31u, 0x02u},\r
+                       {0x33u, 0x01u},\r
+                       {0x34u, 0x01u},\r
+                       {0x36u, 0x02u},\r
+                       {0x3Eu, 0x51u},\r
+                       {0x3Fu, 0x05u},\r
+                       {0x56u, 0x08u},\r
                        {0x58u, 0x04u},\r
                        {0x59u, 0x04u},\r
                        {0x5Bu, 0x04u},\r
-                       {0x5Cu, 0x19u},\r
+                       {0x5Du, 0x90u},\r
                        {0x5Fu, 0x01u},\r
-                       {0x81u, 0x02u},\r
-                       {0x83u, 0x01u},\r
-                       {0x87u, 0x04u},\r
-                       {0x8Du, 0x02u},\r
-                       {0x8Fu, 0x01u},\r
-                       {0x91u, 0x01u},\r
-                       {0x92u, 0x02u},\r
-                       {0x93u, 0x02u},\r
-                       {0x9Au, 0x04u},\r
-                       {0x9Cu, 0x04u},\r
-                       {0x9Du, 0x02u},\r
-                       {0x9Eu, 0x08u},\r
-                       {0x9Fu, 0x01u},\r
-                       {0xA2u, 0x01u},\r
-                       {0xA5u, 0x02u},\r
-                       {0xA7u, 0x11u},\r
-                       {0xAAu, 0x08u},\r
-                       {0xAFu, 0x08u},\r
+                       {0x81u, 0x04u},\r
+                       {0x83u, 0x10u},\r
+                       {0x8Bu, 0x1Cu},\r
+                       {0x8Fu, 0x08u},\r
+                       {0x91u, 0x04u},\r
+                       {0x93u, 0x08u},\r
+                       {0x99u, 0x18u},\r
+                       {0x9Bu, 0x04u},\r
+                       {0x9Cu, 0x01u},\r
+                       {0xA9u, 0x01u},\r
+                       {0xADu, 0x02u},\r
                        {0xB0u, 0x01u},\r
-                       {0xB1u, 0x10u},\r
-                       {0xB2u, 0x0Cu},\r
-                       {0xB3u, 0x04u},\r
-                       {0xB4u, 0x02u},\r
-                       {0xB5u, 0x08u},\r
-                       {0xB7u, 0x03u},\r
-                       {0xBBu, 0x80u},\r
-                       {0xBEu, 0x04u},\r
-                       {0xD6u, 0x08u},\r
+                       {0xB1u, 0x1Cu},\r
+                       {0xB3u, 0x02u},\r
+                       {0xB5u, 0x01u},\r
+                       {0xBEu, 0x01u},\r
+                       {0xBFu, 0x14u},\r
+                       {0xC0u, 0x53u},\r
+                       {0xC1u, 0x04u},\r
+                       {0xC2u, 0x20u},\r
+                       {0xC5u, 0xECu},\r
+                       {0xC6u, 0xD2u},\r
+                       {0xC7u, 0xF0u},\r
+                       {0xC8u, 0x2Fu},\r
+                       {0xC9u, 0xFFu},\r
+                       {0xCAu, 0xFFu},\r
+                       {0xCBu, 0xFFu},\r
+                       {0xCFu, 0x2Cu},\r
+                       {0xD6u, 0x01u},\r
                        {0xD8u, 0x04u},\r
                        {0xD9u, 0x04u},\r
+                       {0xDAu, 0x04u},\r
                        {0xDBu, 0x04u},\r
-                       {0xDCu, 0x99u},\r
-                       {0xDDu, 0x90u},\r
+                       {0xDCu, 0x10u},\r
+                       {0xDDu, 0x01u},\r
                        {0xDFu, 0x01u},\r
-                       {0x00u, 0x04u},\r
-                       {0x01u, 0x01u},\r
-                       {0x03u, 0x02u},\r
-                       {0x08u, 0x10u},\r
-                       {0x0Au, 0x22u},\r
-                       {0x0Bu, 0x01u},\r
-                       {0x0Du, 0x10u},\r
-                       {0x0Eu, 0x80u},\r
-                       {0x0Fu, 0x01u},\r
-                       {0x11u, 0x24u},\r
-                       {0x16u, 0x88u},\r
-                       {0x18u, 0x04u},\r
-                       {0x19u, 0x10u},\r
-                       {0x1Au, 0x21u},\r
-                       {0x1Bu, 0x12u},\r
-                       {0x1Cu, 0x20u},\r
+                       {0xE2u, 0xC0u},\r
+                       {0xE6u, 0x80u},\r
+                       {0xE8u, 0x40u},\r
+                       {0xE9u, 0x40u},\r
+                       {0xEEu, 0x08u},\r
+                       {0x00u, 0x01u},\r
+                       {0x08u, 0x02u},\r
+                       {0x0Fu, 0x02u},\r
+                       {0x12u, 0x04u},\r
+                       {0x19u, 0x62u},\r
                        {0x1Eu, 0x80u},\r
-                       {0x1Fu, 0x10u},\r
-                       {0x20u, 0x08u},\r
-                       {0x21u, 0x14u},\r
-                       {0x22u, 0x08u},\r
-                       {0x24u, 0x02u},\r
-                       {0x25u, 0x91u},\r
-                       {0x27u, 0x12u},\r
-                       {0x2Bu, 0x08u},\r
-                       {0x2Fu, 0x12u},\r
-                       {0x30u, 0x80u},\r
-                       {0x31u, 0x04u},\r
-                       {0x36u, 0x40u},\r
-                       {0x37u, 0x02u},\r
-                       {0x38u, 0x80u},\r
-                       {0x39u, 0x28u},\r
-                       {0x3Bu, 0x02u},\r
+                       {0x23u, 0x50u},\r
+                       {0x25u, 0x01u},\r
+                       {0x26u, 0x16u},\r
+                       {0x27u, 0x40u},\r
+                       {0x2Fu, 0x05u},\r
+                       {0x31u, 0x11u},\r
+                       {0x37u, 0x11u},\r
+                       {0x38u, 0xC0u},\r
                        {0x3Du, 0x02u},\r
-                       {0x3Eu, 0x80u},\r
-                       {0x3Fu, 0x04u},\r
+                       {0x3Eu, 0xA0u},\r
+                       {0x45u, 0x28u},\r
+                       {0x47u, 0x01u},\r
+                       {0x4Cu, 0x40u},\r
+                       {0x4Du, 0x08u},\r
+                       {0x4Eu, 0x02u},\r
+                       {0x54u, 0x01u},\r
+                       {0x56u, 0x80u},\r
+                       {0x57u, 0x22u},\r
                        {0x58u, 0x40u},\r
-                       {0x5Au, 0x18u},\r
-                       {0x5Bu, 0x02u},\r
-                       {0x5Cu, 0x80u},\r
-                       {0x5Du, 0x20u},\r
-                       {0x62u, 0x80u},\r
-                       {0x66u, 0xA0u},\r
-                       {0x67u, 0x04u},\r
-                       {0x80u, 0x80u},\r
-                       {0x81u, 0x90u},\r
-                       {0x82u, 0x80u},\r
-                       {0x84u, 0x10u},\r
-                       {0x88u, 0x10u},\r
-                       {0x89u, 0x20u},\r
-                       {0x8Au, 0x02u},\r
-                       {0x8Du, 0x40u},\r
-                       {0xC0u, 0x0Du},\r
-                       {0xC2u, 0xD7u},\r
-                       {0xC4u, 0x56u},\r
-                       {0xCAu, 0x54u},\r
-                       {0xCCu, 0x9Au},\r
-                       {0xCEu, 0xDFu},\r
-                       {0xD6u, 0x3Fu},\r
-                       {0xD8u, 0x38u},\r
-                       {0xE2u, 0x04u},\r
-                       {0xE4u, 0x05u},\r
-                       {0xE6u, 0xA2u},\r
-                       {0x01u, 0x02u},\r
-                       {0x02u, 0x10u},\r
-                       {0x03u, 0x01u},\r
-                       {0x04u, 0x05u},\r
-                       {0x05u, 0x02u},\r
-                       {0x06u, 0x02u},\r
-                       {0x07u, 0x05u},\r
-                       {0x0Du, 0x02u},\r
-                       {0x0Fu, 0x09u},\r
+                       {0x5Du, 0x02u},\r
+                       {0x5Eu, 0xA8u},\r
+                       {0x63u, 0x02u},\r
+                       {0x65u, 0x60u},\r
+                       {0x67u, 0x50u},\r
+                       {0x68u, 0x02u},\r
+                       {0x6Au, 0x24u},\r
+                       {0x6Du, 0x19u},\r
+                       {0x6Eu, 0x40u},\r
+                       {0x75u, 0x80u},\r
+                       {0x76u, 0x58u},\r
+                       {0x82u, 0x02u},\r
+                       {0x85u, 0x04u},\r
+                       {0x86u, 0x04u},\r
+                       {0x88u, 0x02u},\r
+                       {0x8Cu, 0x40u},\r
+                       {0xC0u, 0x08u},\r
+                       {0xC2u, 0x88u},\r
+                       {0xC4u, 0x02u},\r
+                       {0xCAu, 0x30u},\r
+                       {0xCCu, 0xA5u},\r
+                       {0xCEu, 0xB0u},\r
+                       {0xD0u, 0xE0u},\r
+                       {0xD2u, 0x10u},\r
+                       {0xD6u, 0xF8u},\r
+                       {0xD8u, 0xF8u},\r
+                       {0xE0u, 0x01u},\r
+                       {0xE4u, 0x02u},\r
+                       {0xE6u, 0x90u},\r
+                       {0x03u, 0x2Cu},\r
+                       {0x04u, 0xC0u},\r
+                       {0x05u, 0x10u},\r
+                       {0x07u, 0x01u},\r
+                       {0x08u, 0x23u},\r
+                       {0x0Au, 0x44u},\r
+                       {0x0Bu, 0x7Fu},\r
+                       {0x0Cu, 0x1Au},\r
+                       {0x0Du, 0x08u},\r
+                       {0x0Fu, 0x03u},\r
                        {0x10u, 0x04u},\r
-                       {0x11u, 0x01u},\r
-                       {0x12u, 0x03u},\r
-                       {0x13u, 0x02u},\r
-                       {0x14u, 0x01u},\r
-                       {0x16u, 0x06u},\r
-                       {0x19u, 0x02u},\r
-                       {0x1Bu, 0x11u},\r
-                       {0x1Eu, 0x08u},\r
-                       {0x28u, 0x03u},\r
-                       {0x2Au, 0x04u},\r
-                       {0x2Cu, 0x08u},\r
-                       {0x2Eu, 0x10u},\r
-                       {0x30u, 0x07u},\r
-                       {0x31u, 0x04u},\r
-                       {0x33u, 0x10u},\r
-                       {0x34u, 0x18u},\r
-                       {0x35u, 0x08u},\r
-                       {0x36u, 0x07u},\r
-                       {0x37u, 0x03u},\r
-                       {0x3Au, 0x82u},\r
-                       {0x3Bu, 0x80u},\r
-                       {0x3Eu, 0x10u},\r
+                       {0x11u, 0x37u},\r
+                       {0x12u, 0x1Au},\r
+                       {0x13u, 0x40u},\r
+                       {0x14u, 0x1Au},\r
+                       {0x15u, 0x03u},\r
+                       {0x18u, 0x1Au},\r
+                       {0x19u, 0x4Fu},\r
+                       {0x1Bu, 0x30u},\r
+                       {0x1Cu, 0x1Au},\r
+                       {0x24u, 0x25u},\r
+                       {0x25u, 0x02u},\r
+                       {0x26u, 0x88u},\r
+                       {0x28u, 0x45u},\r
+                       {0x2Au, 0x30u},\r
+                       {0x2Cu, 0x1Au},\r
+                       {0x30u, 0x1Eu},\r
+                       {0x32u, 0xE0u},\r
+                       {0x33u, 0x0Fu},\r
+                       {0x36u, 0x01u},\r
+                       {0x37u, 0x70u},\r
+                       {0x38u, 0x08u},\r
+                       {0x3Au, 0x02u},\r
+                       {0x3Eu, 0x40u},\r
+                       {0x56u, 0x08u},\r
                        {0x58u, 0x04u},\r
                        {0x59u, 0x04u},\r
                        {0x5Bu, 0x04u},\r
-                       {0x5Cu, 0x90u},\r
+                       {0x5Cu, 0x10u},\r
+                       {0x5Du, 0x90u},\r
                        {0x5Fu, 0x01u},\r
-                       {0x80u, 0x05u},\r
-                       {0x82u, 0x0Au},\r
-                       {0x83u, 0xFFu},\r
-                       {0x84u, 0x06u},\r
-                       {0x86u, 0x09u},\r
-                       {0x89u, 0x55u},\r
-                       {0x8Bu, 0xAAu},\r
-                       {0x90u, 0x0Fu},\r
-                       {0x92u, 0xF0u},\r
-                       {0x97u, 0xFFu},\r
-                       {0x98u, 0x60u},\r
-                       {0x99u, 0x0Fu},\r
-                       {0x9Au, 0x90u},\r
-                       {0x9Bu, 0xF0u},\r
-                       {0x9Cu, 0x03u},\r
-                       {0x9Du, 0xFFu},\r
-                       {0x9Eu, 0x0Cu},\r
-                       {0xA1u, 0x69u},\r
-                       {0xA3u, 0x96u},\r
-                       {0xA7u, 0xFFu},\r
-                       {0xA8u, 0x50u},\r
-                       {0xA9u, 0xFFu},\r
-                       {0xAAu, 0xA0u},\r
-                       {0xACu, 0x30u},\r
-                       {0xADu, 0x33u},\r
-                       {0xAEu, 0xC0u},\r
-                       {0xAFu, 0xCCu},\r
-                       {0xB2u, 0xFFu},\r
-                       {0xB5u, 0xFFu},\r
-                       {0xBBu, 0x20u},\r
-                       {0xBEu, 0x04u},\r
+                       {0x81u, 0x01u},\r
+                       {0x85u, 0x01u},\r
+                       {0x89u, 0x02u},\r
+                       {0x8Au, 0x04u},\r
+                       {0x8Bu, 0x04u},\r
+                       {0x8Eu, 0x01u},\r
+                       {0x94u, 0x05u},\r
+                       {0x96u, 0x0Au},\r
+                       {0x97u, 0x04u},\r
+                       {0x9Au, 0x08u},\r
+                       {0x9Bu, 0x02u},\r
+                       {0xA1u, 0x01u},\r
+                       {0xA5u, 0x01u},\r
+                       {0xAEu, 0x02u},\r
+                       {0xB2u, 0x0Cu},\r
+                       {0xB4u, 0x03u},\r
+                       {0xB5u, 0x06u},\r
+                       {0xB7u, 0x01u},\r
+                       {0xB9u, 0x80u},\r
+                       {0xBEu, 0x14u},\r
+                       {0xBFu, 0x50u},\r
+                       {0xD6u, 0x08u},\r
                        {0xD8u, 0x04u},\r
                        {0xD9u, 0x04u},\r
                        {0xDBu, 0x04u},\r
-                       {0xDCu, 0x10u},\r
+                       {0xDDu, 0x90u},\r
                        {0xDFu, 0x01u},\r
-                       {0x00u, 0x08u},\r
-                       {0x03u, 0x80u},\r
-                       {0x04u, 0x04u},\r
-                       {0x06u, 0x80u},\r
-                       {0x08u, 0x01u},\r
-                       {0x0Au, 0x01u},\r
-                       {0x0Bu, 0x04u},\r
-                       {0x0Eu, 0xA1u},\r
-                       {0x0Fu, 0x02u},\r
-                       {0x10u, 0x40u},\r
-                       {0x13u, 0x52u},\r
-                       {0x14u, 0x01u},\r
-                       {0x17u, 0x20u},\r
-                       {0x18u, 0x10u},\r
-                       {0x1Eu, 0x80u},\r
-                       {0x1Fu, 0x60u},\r
-                       {0x21u, 0x20u},\r
-                       {0x25u, 0x05u},\r
-                       {0x26u, 0x20u},\r
-                       {0x27u, 0x02u},\r
-                       {0x29u, 0x90u},\r
-                       {0x2Au, 0x06u},\r
-                       {0x30u, 0x81u},\r
-                       {0x31u, 0x24u},\r
-                       {0x32u, 0x01u},\r
-                       {0x36u, 0x20u},\r
-                       {0x37u, 0x02u},\r
-                       {0x38u, 0x02u},\r
-                       {0x39u, 0x20u},\r
-                       {0x3Cu, 0x40u},\r
-                       {0x3Du, 0x0Au},\r
-                       {0x44u, 0x10u},\r
-                       {0x45u, 0x08u},\r
-                       {0x58u, 0x10u},\r
-                       {0x59u, 0x01u},\r
-                       {0x5Au, 0x40u},\r
-                       {0x5Bu, 0x08u},\r
-                       {0x62u, 0x80u},\r
-                       {0x69u, 0x55u},\r
-                       {0x6Cu, 0x10u},\r
-                       {0x6Du, 0xA0u},\r
-                       {0x71u, 0x80u},\r
-                       {0x72u, 0x88u},\r
-                       {0x73u, 0x54u},\r
-                       {0x80u, 0x10u},\r
-                       {0x81u, 0x10u},\r
-                       {0x85u, 0x80u},\r
-                       {0x89u, 0x40u},\r
-                       {0x8Bu, 0x10u},\r
-                       {0x8Cu, 0xC0u},\r
-                       {0x8Fu, 0x0Au},\r
-                       {0x90u, 0x02u},\r
-                       {0x92u, 0x40u},\r
-                       {0x94u, 0x80u},\r
-                       {0x95u, 0x44u},\r
-                       {0x96u, 0x1Au},\r
-                       {0x97u, 0x02u},\r
-                       {0x99u, 0x10u},\r
-                       {0x9Au, 0x22u},\r
-                       {0x9Bu, 0x10u},\r
-                       {0x9Cu, 0x40u},\r
-                       {0x9Du, 0x04u},\r
-                       {0x9Eu, 0x08u},\r
-                       {0xA0u, 0x04u},\r
-                       {0xA2u, 0x08u},\r
-                       {0xA3u, 0x10u},\r
+                       {0x00u, 0x80u},\r
+                       {0x03u, 0x04u},\r
+                       {0x04u, 0x20u},\r
+                       {0x05u, 0x04u},\r
+                       {0x06u, 0x02u},\r
+                       {0x0Bu, 0x14u},\r
+                       {0x0Cu, 0x90u},\r
+                       {0x0Du, 0x04u},\r
+                       {0x0Eu, 0x80u},\r
+                       {0x13u, 0x40u},\r
+                       {0x14u, 0x04u},\r
+                       {0x15u, 0x40u},\r
+                       {0x17u, 0x08u},\r
+                       {0x1Au, 0x08u},\r
+                       {0x1Bu, 0x08u},\r
+                       {0x1Du, 0x84u},\r
+                       {0x1Eu, 0xA0u},\r
+                       {0x21u, 0x50u},\r
+                       {0x25u, 0x48u},\r
+                       {0x27u, 0x11u},\r
+                       {0x2Bu, 0x90u},\r
+                       {0x2Fu, 0x20u},\r
+                       {0x30u, 0x08u},\r
+                       {0x32u, 0x10u},\r
+                       {0x35u, 0x08u},\r
+                       {0x37u, 0x11u},\r
+                       {0x38u, 0x08u},\r
+                       {0x39u, 0x02u},\r
+                       {0x3Bu, 0x10u},\r
+                       {0x3Du, 0x02u},\r
+                       {0x3Eu, 0x24u},\r
+                       {0x3Fu, 0x80u},\r
+                       {0x58u, 0x08u},\r
+                       {0x59u, 0x22u},\r
+                       {0x5Au, 0x80u},\r
+                       {0x5Fu, 0xA0u},\r
+                       {0x60u, 0x12u},\r
+                       {0x61u, 0x11u},\r
+                       {0x62u, 0x04u},\r
+                       {0x67u, 0x0Au},\r
+                       {0x81u, 0x20u},\r
+                       {0x83u, 0x80u},\r
+                       {0x85u, 0x10u},\r
+                       {0x88u, 0x0Au},\r
+                       {0x8Bu, 0x80u},\r
+                       {0x8Cu, 0x10u},\r
+                       {0x8Du, 0x19u},\r
+                       {0x90u, 0x48u},\r
+                       {0x91u, 0x13u},\r
+                       {0x92u, 0x44u},\r
+                       {0x94u, 0x01u},\r
+                       {0x95u, 0x84u},\r
+                       {0x96u, 0x08u},\r
+                       {0x97u, 0x0Au},\r
+                       {0x99u, 0x88u},\r
+                       {0x9Au, 0xD8u},\r
+                       {0x9Bu, 0x40u},\r
+                       {0x9Cu, 0x02u},\r
+                       {0x9Du, 0x11u},\r
+                       {0x9Eu, 0x24u},\r
+                       {0x9Fu, 0x11u},\r
+                       {0xA0u, 0x01u},\r
+                       {0xA1u, 0x15u},\r
+                       {0xA3u, 0x21u},\r
+                       {0xA5u, 0x28u},\r
                        {0xA7u, 0x08u},\r
-                       {0xACu, 0x80u},\r
-                       {0xAEu, 0x01u},\r
-                       {0xB1u, 0x01u},\r
-                       {0xB6u, 0x40u},\r
-                       {0xC0u, 0x3Cu},\r
-                       {0xC2u, 0xBBu},\r
-                       {0xC4u, 0xC3u},\r
-                       {0xCAu, 0x0Fu},\r
-                       {0xCCu, 0xAEu},\r
-                       {0xCEu, 0xD5u},\r
-                       {0xD6u, 0x0Fu},\r
-                       {0xD8u, 0x08u},\r
-                       {0xE0u, 0x04u},\r
+                       {0xA8u, 0x04u},\r
+                       {0xA9u, 0x10u},\r
+                       {0xAAu, 0x10u},\r
+                       {0xADu, 0x01u},\r
+                       {0xAEu, 0x04u},\r
+                       {0xB0u, 0x40u},\r
+                       {0xB3u, 0x08u},\r
+                       {0xB5u, 0x40u},\r
+                       {0xB7u, 0x02u},\r
+                       {0xC0u, 0xE3u},\r
+                       {0xC2u, 0xF6u},\r
+                       {0xC4u, 0xE1u},\r
+                       {0xCAu, 0x43u},\r
+                       {0xCCu, 0xE6u},\r
+                       {0xCEu, 0xF7u},\r
+                       {0xD6u, 0x3Fu},\r
+                       {0xD8u, 0x3Fu},\r
                        {0xE2u, 0x08u},\r
-                       {0xE6u, 0x28u},\r
-                       {0xE8u, 0x08u},\r
-                       {0xEEu, 0x42u},\r
-                       {0x04u, 0x30u},\r
-                       {0x06u, 0xC0u},\r
-                       {0x07u, 0x80u},\r
-                       {0x08u, 0xFFu},\r
-                       {0x09u, 0x0Fu},\r
-                       {0x0Cu, 0x05u},\r
-                       {0x0Du, 0xC0u},\r
-                       {0x0Eu, 0x0Au},\r
-                       {0x0Fu, 0x1Fu},\r
-                       {0x10u, 0x03u},\r
-                       {0x12u, 0x0Cu},\r
-                       {0x13u, 0x70u},\r
-                       {0x15u, 0x90u},\r
-                       {0x16u, 0xFFu},\r
-                       {0x17u, 0x2Fu},\r
-                       {0x18u, 0xFFu},\r
-                       {0x19u, 0x05u},\r
-                       {0x1Bu, 0x0Au},\r
-                       {0x1Cu, 0x0Fu},\r
-                       {0x1Eu, 0xF0u},\r
-                       {0x20u, 0x09u},\r
-                       {0x21u, 0x03u},\r
-                       {0x22u, 0x06u},\r
-                       {0x23u, 0x0Cu},\r
-                       {0x27u, 0x80u},\r
+                       {0xE6u, 0x0Fu},\r
+                       {0xE8u, 0x02u},\r
+                       {0xEAu, 0x21u},\r
+                       {0xEEu, 0x53u},\r
+                       {0x03u, 0x70u},\r
+                       {0x04u, 0x05u},\r
+                       {0x06u, 0x0Au},\r
+                       {0x08u, 0x06u},\r
+                       {0x0Au, 0x09u},\r
+                       {0x0Bu, 0x08u},\r
+                       {0x0Cu, 0x03u},\r
+                       {0x0Eu, 0x0Cu},\r
+                       {0x0Fu, 0x80u},\r
+                       {0x10u, 0x30u},\r
+                       {0x11u, 0x99u},\r
+                       {0x12u, 0xC0u},\r
+                       {0x13u, 0x22u},\r
+                       {0x14u, 0x0Fu},\r
+                       {0x15u, 0xAAu},\r
+                       {0x16u, 0xF0u},\r
+                       {0x17u, 0x55u},\r
+                       {0x18u, 0x60u},\r
+                       {0x1Au, 0x90u},\r
+                       {0x1Bu, 0x07u},\r
+                       {0x1Du, 0x44u},\r
+                       {0x1Fu, 0x88u},\r
                        {0x28u, 0x50u},\r
-                       {0x29u, 0x06u},\r
                        {0x2Au, 0xA0u},\r
-                       {0x2Bu, 0x09u},\r
-                       {0x2Cu, 0x90u},\r
-                       {0x2Du, 0xA0u},\r
-                       {0x2Eu, 0x60u},\r
-                       {0x2Fu, 0x4Fu},\r
-                       {0x31u, 0x7Fu},\r
+                       {0x31u, 0xF0u},\r
+                       {0x35u, 0x0Fu},\r
                        {0x36u, 0xFFu},\r
-                       {0x37u, 0x80u},\r
                        {0x3Eu, 0x40u},\r
-                       {0x3Fu, 0x40u},\r
                        {0x56u, 0x08u},\r
                        {0x58u, 0x04u},\r
                        {0x59u, 0x04u},\r
@@ -774,1234 +741,1202 @@ void cyfitter_cfg(void)
                        {0x5Cu, 0x10u},\r
                        {0x5Du, 0x90u},\r
                        {0x5Fu, 0x01u},\r
-                       {0x82u, 0x70u},\r
-                       {0x84u, 0x02u},\r
-                       {0x85u, 0xC8u},\r
-                       {0x86u, 0x05u},\r
-                       {0x87u, 0x03u},\r
-                       {0x88u, 0x40u},\r
-                       {0x8Cu, 0x70u},\r
-                       {0x8Fu, 0x0Cu},\r
-                       {0x93u, 0x01u},\r
-                       {0x94u, 0x01u},\r
-                       {0x96u, 0x02u},\r
-                       {0x97u, 0x20u},\r
-                       {0x98u, 0x02u},\r
-                       {0x99u, 0x04u},\r
-                       {0x9Au, 0x09u},\r
-                       {0x9Bu, 0xA3u},\r
-                       {0x9Cu, 0x02u},\r
-                       {0x9Eu, 0x01u},\r
-                       {0xA4u, 0x02u},\r
-                       {0xA6u, 0x01u},\r
-                       {0xA9u, 0x01u},\r
-                       {0xAAu, 0x20u},\r
-                       {0xABu, 0x62u},\r
-                       {0xACu, 0x10u},\r
-                       {0xAFu, 0x12u},\r
-                       {0xB0u, 0x70u},\r
-                       {0xB1u, 0x10u},\r
-                       {0xB2u, 0x03u},\r
-                       {0xB4u, 0x04u},\r
-                       {0xB5u, 0xE0u},\r
-                       {0xB6u, 0x08u},\r
+                       {0x80u, 0x3Au},\r
+                       {0x81u, 0x44u},\r
+                       {0x82u, 0x45u},\r
+                       {0x83u, 0x88u},\r
+                       {0x86u, 0x19u},\r
+                       {0x87u, 0x80u},\r
+                       {0x88u, 0x01u},\r
+                       {0x8Au, 0x06u},\r
+                       {0x8Cu, 0x2Au},\r
+                       {0x8Du, 0x99u},\r
+                       {0x8Eu, 0x55u},\r
+                       {0x8Fu, 0x22u},\r
+                       {0x90u, 0x01u},\r
+                       {0x97u, 0x70u},\r
+                       {0x98u, 0x08u},\r
+                       {0x99u, 0xAAu},\r
+                       {0x9Bu, 0x55u},\r
+                       {0x9Cu, 0x18u},\r
+                       {0x9Eu, 0x60u},\r
+                       {0x9Fu, 0x07u},\r
+                       {0xA2u, 0x10u},\r
+                       {0xA3u, 0x08u},\r
+                       {0xA8u, 0x33u},\r
+                       {0xAAu, 0x4Cu},\r
+                       {0xB4u, 0x07u},\r
+                       {0xB5u, 0xF0u},\r
+                       {0xB6u, 0x78u},\r
                        {0xB7u, 0x0Fu},\r
-                       {0xBAu, 0x08u},\r
-                       {0xBEu, 0x01u},\r
+                       {0xBAu, 0xA0u},\r
                        {0xD8u, 0x04u},\r
                        {0xD9u, 0x04u},\r
-                       {0xDCu, 0x09u},\r
+                       {0xDBu, 0x04u},\r
+                       {0xDCu, 0x11u},\r
                        {0xDFu, 0x01u},\r
-                       {0x00u, 0x90u},\r
-                       {0x01u, 0x04u},\r
-                       {0x05u, 0x80u},\r
-                       {0x06u, 0x88u},\r
-                       {0x07u, 0x10u},\r
-                       {0x09u, 0x01u},\r
-                       {0x0Au, 0x06u},\r
-                       {0x0Bu, 0x20u},\r
-                       {0x0Eu, 0x1Au},\r
-                       {0x11u, 0x50u},\r
-                       {0x12u, 0x40u},\r
-                       {0x16u, 0x22u},\r
-                       {0x17u, 0x20u},\r
-                       {0x1Bu, 0x40u},\r
-                       {0x1Du, 0x01u},\r
-                       {0x1Eu, 0x1Au},\r
-                       {0x21u, 0x02u},\r
-                       {0x22u, 0x80u},\r
-                       {0x23u, 0x80u},\r
-                       {0x25u, 0x40u},\r
-                       {0x26u, 0x02u},\r
-                       {0x27u, 0x08u},\r
-                       {0x28u, 0x88u},\r
-                       {0x2Bu, 0x12u},\r
-                       {0x2Cu, 0x02u},\r
-                       {0x2Fu, 0x04u},\r
-                       {0x31u, 0x26u},\r
-                       {0x36u, 0x02u},\r
-                       {0x37u, 0x28u},\r
-                       {0x38u, 0xA0u},\r
-                       {0x39u, 0x08u},\r
-                       {0x3Bu, 0x20u},\r
-                       {0x3Cu, 0x04u},\r
-                       {0x3Du, 0x80u},\r
-                       {0x3Eu, 0x88u},\r
-                       {0x58u, 0x40u},\r
-                       {0x63u, 0x01u},\r
-                       {0x87u, 0x01u},\r
-                       {0x88u, 0x80u},\r
-                       {0x89u, 0x10u},\r
-                       {0x8Au, 0x02u},\r
-                       {0x8Bu, 0x04u},\r
-                       {0x8Fu, 0x08u},\r
-                       {0x90u, 0xB2u},\r
-                       {0x91u, 0x5Du},\r
-                       {0x93u, 0x80u},\r
-                       {0x94u, 0x04u},\r
-                       {0x95u, 0x20u},\r
-                       {0x96u, 0x1Au},\r
-                       {0x99u, 0x04u},\r
-                       {0x9Au, 0x20u},\r
-                       {0x9Bu, 0x10u},\r
-                       {0x9Fu, 0x20u},\r
-                       {0xA1u, 0xA0u},\r
-                       {0xA2u, 0x08u},\r
-                       {0xA3u, 0x12u},\r
-                       {0xA6u, 0x90u},\r
-                       {0xA7u, 0x01u},\r
-                       {0xA9u, 0x05u},\r
-                       {0xABu, 0x01u},\r
-                       {0xADu, 0x08u},\r
-                       {0xAFu, 0x20u},\r
-                       {0xB1u, 0x04u},\r
-                       {0xB3u, 0x08u},\r
-                       {0xB4u, 0x40u},\r
-                       {0xB6u, 0x04u},\r
-                       {0xB7u, 0x80u},\r
-                       {0xC0u, 0xF7u},\r
-                       {0xC2u, 0xEFu},\r
-                       {0xC4u, 0xEBu},\r
-                       {0xCAu, 0x3Fu},\r
-                       {0xCCu, 0xE7u},\r
-                       {0xCEu, 0x5Eu},\r
-                       {0xD6u, 0x08u},\r
-                       {0xD8u, 0x08u},\r
-                       {0xE2u, 0x18u},\r
-                       {0xE6u, 0x48u},\r
-                       {0xEAu, 0x06u},\r
-                       {0xEEu, 0x05u},\r
-                       {0x01u, 0x0Du},\r
-                       {0x04u, 0x7Fu},\r
-                       {0x05u, 0x02u},\r
-                       {0x06u, 0x80u},\r
-                       {0x07u, 0x08u},\r
-                       {0x09u, 0x01u},\r
-                       {0x0Au, 0xFFu},\r
-                       {0x0Bu, 0x02u},\r
-                       {0x0Du, 0x02u},\r
-                       {0x0Eu, 0x9Fu},\r
-                       {0x0Fu, 0x0Du},\r
-                       {0x10u, 0x80u},\r
-                       {0x11u, 0x0Du},\r
-                       {0x14u, 0xC0u},\r
-                       {0x15u, 0x10u},\r
-                       {0x16u, 0x08u},\r
-                       {0x18u, 0xC0u},\r
-                       {0x19u, 0x02u},\r
-                       {0x1Au, 0x04u},\r
-                       {0x1Bu, 0x04u},\r
-                       {0x1Cu, 0xC0u},\r
-                       {0x1Du, 0x10u},\r
+                       {0x00u, 0x84u},\r
+                       {0x03u, 0x04u},\r
+                       {0x05u, 0x10u},\r
+                       {0x06u, 0x20u},\r
+                       {0x07u, 0x41u},\r
+                       {0x0Bu, 0x54u},\r
+                       {0x0Eu, 0x06u},\r
+                       {0x0Fu, 0x80u},\r
+                       {0x10u, 0x08u},\r
+                       {0x16u, 0x80u},\r
+                       {0x17u, 0x10u},\r
+                       {0x1Au, 0x02u},\r
+                       {0x1Du, 0x30u},\r
                        {0x1Eu, 0x02u},\r
-                       {0x20u, 0x90u},\r
-                       {0x21u, 0x0Du},\r
-                       {0x22u, 0x40u},\r
-                       {0x25u, 0x0Du},\r
-                       {0x26u, 0x60u},\r
-                       {0x28u, 0x1Fu},\r
-                       {0x29u, 0x0Du},\r
-                       {0x2Au, 0x20u},\r
-                       {0x2Cu, 0xC0u},\r
-                       {0x2Eu, 0x01u},\r
-                       {0x35u, 0x10u},\r
-                       {0x36u, 0xFFu},\r
-                       {0x37u, 0x0Fu},\r
-                       {0x39u, 0x20u},\r
+                       {0x20u, 0x84u},\r
+                       {0x21u, 0x01u},\r
+                       {0x22u, 0x10u},\r
+                       {0x24u, 0x02u},\r
+                       {0x26u, 0x80u},\r
+                       {0x27u, 0x04u},\r
+                       {0x2Du, 0x01u},\r
+                       {0x31u, 0x08u},\r
+                       {0x32u, 0x10u},\r
+                       {0x33u, 0x41u},\r
+                       {0x36u, 0x80u},\r
+                       {0x37u, 0x14u},\r
+                       {0x39u, 0x02u},\r
+                       {0x3Au, 0x50u},\r
+                       {0x3Du, 0x82u},\r
+                       {0x3Eu, 0x08u},\r
+                       {0x58u, 0x80u},\r
+                       {0x5Cu, 0x60u},\r
+                       {0x5Du, 0x0Au},\r
+                       {0x60u, 0x01u},\r
+                       {0x64u, 0x01u},\r
+                       {0x68u, 0x04u},\r
+                       {0x69u, 0x84u},\r
+                       {0x6Au, 0x81u},\r
+                       {0x70u, 0x08u},\r
+                       {0x73u, 0x45u},\r
+                       {0x88u, 0xA1u},\r
+                       {0x8Eu, 0x40u},\r
+                       {0x90u, 0x40u},\r
+                       {0x91u, 0x11u},\r
+                       {0x92u, 0x44u},\r
+                       {0x93u, 0x0Au},\r
+                       {0x94u, 0x21u},\r
+                       {0x95u, 0x4Cu},\r
+                       {0x96u, 0x20u},\r
+                       {0x97u, 0x54u},\r
+                       {0x99u, 0x88u},\r
+                       {0x9Au, 0xD8u},\r
+                       {0x9Bu, 0x51u},\r
+                       {0x9Cu, 0x14u},\r
+                       {0x9Eu, 0x22u},\r
+                       {0x9Fu, 0x0Cu},\r
+                       {0xA0u, 0x01u},\r
+                       {0xA1u, 0xDDu},\r
+                       {0xA2u, 0x18u},\r
+                       {0xA3u, 0x63u},\r
+                       {0xA4u, 0xC8u},\r
+                       {0xA5u, 0x20u},\r
+                       {0xA7u, 0x10u},\r
+                       {0xA8u, 0x01u},\r
+                       {0xA9u, 0x02u},\r
+                       {0xABu, 0x02u},\r
+                       {0xAEu, 0x08u},\r
+                       {0xB3u, 0x01u},\r
+                       {0xB6u, 0x40u},\r
+                       {0xB7u, 0x60u},\r
+                       {0xC0u, 0xF7u},\r
+                       {0xC2u, 0xDEu},\r
+                       {0xC4u, 0x52u},\r
+                       {0xCAu, 0x80u},\r
+                       {0xCCu, 0x7Fu},\r
+                       {0xCEu, 0xDDu},\r
+                       {0xD6u, 0xF8u},\r
+                       {0xD8u, 0x18u},\r
+                       {0xE8u, 0x01u},\r
+                       {0xEAu, 0x0Cu},\r
+                       {0xEEu, 0x04u},\r
+                       {0x01u, 0x33u},\r
+                       {0x03u, 0xCCu},\r
+                       {0x06u, 0x12u},\r
+                       {0x08u, 0x88u},\r
+                       {0x0Au, 0x03u},\r
+                       {0x0Bu, 0xFFu},\r
+                       {0x0Eu, 0x01u},\r
+                       {0x0Fu, 0xFFu},\r
+                       {0x14u, 0xE0u},\r
+                       {0x15u, 0xFFu},\r
+                       {0x18u, 0x21u},\r
+                       {0x19u, 0xFFu},\r
+                       {0x1Au, 0x02u},\r
+                       {0x1Du, 0x0Fu},\r
+                       {0x1Eu, 0xECu},\r
+                       {0x1Fu, 0xF0u},\r
+                       {0x23u, 0xFFu},\r
+                       {0x24u, 0x04u},\r
+                       {0x26u, 0x43u},\r
+                       {0x29u, 0x55u},\r
+                       {0x2Bu, 0xAAu},\r
+                       {0x2Du, 0x69u},\r
+                       {0x2Fu, 0x96u},\r
+                       {0x30u, 0x10u},\r
+                       {0x34u, 0xE0u},\r
+                       {0x36u, 0x0Fu},\r
+                       {0x37u, 0xFFu},\r
                        {0x3Bu, 0x80u},\r
-                       {0x3Eu, 0x40u},\r
-                       {0x54u, 0x09u},\r
-                       {0x56u, 0x04u},\r
+                       {0x3Eu, 0x10u},\r
+                       {0x54u, 0x01u},\r
                        {0x58u, 0x04u},\r
                        {0x59u, 0x04u},\r
                        {0x5Bu, 0x04u},\r
+                       {0x5Cu, 0x10u},\r
+                       {0x5Du, 0x10u},\r
                        {0x5Fu, 0x01u},\r
-                       {0x80u, 0x20u},\r
-                       {0x81u, 0x02u},\r
-                       {0x82u, 0x90u},\r
-                       {0x83u, 0x11u},\r
-                       {0x88u, 0x4Du},\r
-                       {0x8Au, 0xB2u},\r
-                       {0x8Du, 0x02u},\r
-                       {0x8Fu, 0x01u},\r
-                       {0x94u, 0x08u},\r
-                       {0x95u, 0x01u},\r
-                       {0x96u, 0x44u},\r
-                       {0x97u, 0x02u},\r
-                       {0x99u, 0x02u},\r
-                       {0x9Bu, 0x09u},\r
-                       {0x9Cu, 0x10u},\r
-                       {0x9Du, 0x02u},\r
-                       {0x9Eu, 0x22u},\r
-                       {0x9Fu, 0x05u},\r
-                       {0xA8u, 0x04u},\r
+                       {0x80u, 0x03u},\r
+                       {0x81u, 0x22u},\r
+                       {0x82u, 0x0Cu},\r
+                       {0x83u, 0x10u},\r
+                       {0x84u, 0x20u},\r
+                       {0x85u, 0x29u},\r
+                       {0x86u, 0x4Fu},\r
+                       {0x87u, 0x16u},\r
+                       {0x89u, 0x17u},\r
+                       {0x8Au, 0x70u},\r
+                       {0x8Bu, 0x28u},\r
+                       {0x8Cu, 0x05u},\r
+                       {0x8Du, 0x06u},\r
+                       {0x8Eu, 0x0Au},\r
+                       {0x8Fu, 0x50u},\r
+                       {0x95u, 0x52u},\r
+                       {0x97u, 0x04u},\r
+                       {0x98u, 0x0Fu},\r
+                       {0x99u, 0x50u},\r
+                       {0x9Bu, 0x06u},\r
+                       {0x9Cu, 0x10u},\r
+                       {0x9Du, 0x56u},\r
+                       {0x9Eu, 0x2Fu},\r
+                       {0xA0u, 0x40u},\r
+                       {0xA1u, 0x56u},\r
+                       {0xA2u, 0x1Fu},\r
+                       {0xA5u, 0x04u},\r
+                       {0xA8u, 0x06u},\r
+                       {0xA9u, 0x31u},\r
                        {0xAAu, 0x09u},\r
-                       {0xB0u, 0xC0u},\r
-                       {0xB1u, 0x04u},\r
-                       {0xB2u, 0x03u},\r
-                       {0xB3u, 0x03u},\r
-                       {0xB4u, 0x3Cu},\r
-                       {0xB5u, 0x10u},\r
+                       {0xABu, 0x0Eu},\r
+                       {0xAFu, 0x40u},\r
+                       {0xB1u, 0x30u},\r
+                       {0xB2u, 0x7Fu},\r
+                       {0xB3u, 0x40u},\r
+                       {0xB5u, 0x0Fu},\r
                        {0xB7u, 0x08u},\r
-                       {0xBBu, 0x08u},\r
-                       {0xBEu, 0x15u},\r
-                       {0xD4u, 0x01u},\r
+                       {0xB9u, 0x20u},\r
+                       {0xBBu, 0x02u},\r
+                       {0xBFu, 0x44u},\r
+                       {0xD4u, 0x09u},\r
+                       {0xD6u, 0x04u},\r
                        {0xD8u, 0x04u},\r
                        {0xD9u, 0x04u},\r
                        {0xDBu, 0x04u},\r
-                       {0xDCu, 0x90u},\r
-                       {0xDDu, 0x10u},\r
+                       {0xDCu, 0x01u},\r
                        {0xDFu, 0x01u},\r
-                       {0x01u, 0x01u},\r
-                       {0x03u, 0x08u},\r
-                       {0x04u, 0xA4u},\r
-                       {0x09u, 0x84u},\r
-                       {0x0Cu, 0x10u},\r
-                       {0x0Eu, 0x99u},\r
+                       {0x02u, 0x80u},\r
+                       {0x03u, 0x1Au},\r
+                       {0x04u, 0x40u},\r
+                       {0x05u, 0x18u},\r
+                       {0x09u, 0x40u},\r
+                       {0x0Au, 0x04u},\r
+                       {0x0Bu, 0x04u},\r
+                       {0x0Eu, 0x22u},\r
+                       {0x0Fu, 0x08u},\r
+                       {0x11u, 0x23u},\r
+                       {0x15u, 0x80u},\r
+                       {0x16u, 0x01u},\r
+                       {0x17u, 0x08u},\r
+                       {0x1Bu, 0x08u},\r
+                       {0x1Cu, 0x40u},\r
+                       {0x1Eu, 0x02u},\r
+                       {0x1Fu, 0x10u},\r
+                       {0x20u, 0x04u},\r
+                       {0x21u, 0x09u},\r
+                       {0x22u, 0x42u},\r
+                       {0x23u, 0x08u},\r
+                       {0x26u, 0x80u},\r
+                       {0x28u, 0x24u},\r
+                       {0x29u, 0x10u},\r
+                       {0x2Au, 0x46u},\r
+                       {0x2Du, 0x01u},\r
+                       {0x2Fu, 0x05u},\r
+                       {0x30u, 0x90u},\r
+                       {0x32u, 0x14u},\r
+                       {0x33u, 0x40u},\r
+                       {0x36u, 0x88u},\r
+                       {0x37u, 0x10u},\r
+                       {0x38u, 0x24u},\r
+                       {0x39u, 0x42u},\r
+                       {0x3Du, 0x80u},\r
+                       {0x3Eu, 0x20u},\r
+                       {0x3Fu, 0x02u},\r
+                       {0x58u, 0x28u},\r
+                       {0x59u, 0x01u},\r
+                       {0x5Au, 0x80u},\r
+                       {0x5Fu, 0x40u},\r
+                       {0x61u, 0x80u},\r
+                       {0x63u, 0x80u},\r
+                       {0x83u, 0x40u},\r
+                       {0x87u, 0x10u},\r
+                       {0x8Bu, 0x48u},\r
+                       {0x90u, 0x02u},\r
+                       {0x91u, 0x94u},\r
+                       {0x92u, 0x47u},\r
+                       {0x93u, 0x0Bu},\r
+                       {0x94u, 0x20u},\r
+                       {0x95u, 0x48u},\r
+                       {0x97u, 0x10u},\r
+                       {0x99u, 0x80u},\r
+                       {0x9Au, 0x20u},\r
+                       {0x9Bu, 0x10u},\r
+                       {0x9Cu, 0x14u},\r
+                       {0x9Eu, 0x02u},\r
+                       {0x9Fu, 0x08u},\r
+                       {0xA0u, 0x04u},\r
+                       {0xA1u, 0xD5u},\r
+                       {0xA2u, 0x18u},\r
+                       {0xA3u, 0x03u},\r
+                       {0xA4u, 0x80u},\r
+                       {0xA7u, 0x10u},\r
+                       {0xA9u, 0x08u},\r
+                       {0xAAu, 0x20u},\r
+                       {0xACu, 0x04u},\r
+                       {0xB0u, 0x01u},\r
+                       {0xB1u, 0x02u},\r
+                       {0xB2u, 0x01u},\r
+                       {0xB3u, 0x20u},\r
+                       {0xB6u, 0x01u},\r
+                       {0xC0u, 0xEFu},\r
+                       {0xC2u, 0xE3u},\r
+                       {0xC4u, 0x2Au},\r
+                       {0xCAu, 0xBFu},\r
+                       {0xCCu, 0x7Eu},\r
+                       {0xCEu, 0xBFu},\r
+                       {0xD6u, 0x1Fu},\r
+                       {0xD8u, 0x09u},\r
+                       {0xE2u, 0x09u},\r
+                       {0xEAu, 0x14u},\r
+                       {0xECu, 0x06u},\r
+                       {0xEEu, 0x10u},\r
+                       {0x9Cu, 0x20u},\r
+                       {0x9Eu, 0x02u},\r
+                       {0xA0u, 0x02u},\r
+                       {0xA5u, 0x11u},\r
+                       {0xA6u, 0x04u},\r
+                       {0xA9u, 0x03u},\r
+                       {0xABu, 0x50u},\r
+                       {0xADu, 0x04u},\r
+                       {0xB2u, 0x44u},\r
+                       {0xB4u, 0x40u},\r
+                       {0xE2u, 0x09u},\r
+                       {0xE8u, 0x20u},\r
+                       {0xEEu, 0x31u},\r
+                       {0x00u, 0x10u},\r
+                       {0x02u, 0x08u},\r
+                       {0x04u, 0x10u},\r
+                       {0x06u, 0x08u},\r
+                       {0x07u, 0x02u},\r
+                       {0x08u, 0x08u},\r
+                       {0x0Au, 0x10u},\r
+                       {0x0Bu, 0x08u},\r
+                       {0x0Cu, 0x01u},\r
+                       {0x0Eu, 0x02u},\r
+                       {0x10u, 0x10u},\r
                        {0x12u, 0x08u},\r
-                       {0x16u, 0x06u},\r
-                       {0x17u, 0x05u},\r
-                       {0x19u, 0x08u},\r
+                       {0x14u, 0x10u},\r
+                       {0x16u, 0x08u},\r
+                       {0x17u, 0x01u},\r
                        {0x1Au, 0x04u},\r
-                       {0x1Bu, 0x02u},\r
-                       {0x1Du, 0x40u},\r
-                       {0x21u, 0x28u},\r
-                       {0x22u, 0x84u},\r
-                       {0x23u, 0x40u},\r
-                       {0x25u, 0x40u},\r
-                       {0x27u, 0x04u},\r
-                       {0x2Cu, 0x10u},\r
-                       {0x2Eu, 0x12u},\r
-                       {0x31u, 0x28u},\r
-                       {0x32u, 0x80u},\r
-                       {0x35u, 0x40u},\r
-                       {0x37u, 0x29u},\r
-                       {0x3Bu, 0x41u},\r
-                       {0x3Cu, 0x04u},\r
-                       {0x3Du, 0x80u},\r
-                       {0x3Eu, 0x21u},\r
-                       {0x5Bu, 0x80u},\r
-                       {0x5Cu, 0x40u},\r
-                       {0x5Du, 0x20u},\r
-                       {0x5Eu, 0x02u},\r
-                       {0x5Fu, 0x04u},\r
-                       {0x66u, 0x01u},\r
-                       {0x67u, 0x02u},\r
-                       {0x82u, 0x01u},\r
-                       {0x8Au, 0x01u},\r
-                       {0x8Bu, 0x08u},\r
-                       {0x8Du, 0x01u},\r
-                       {0x90u, 0x12u},\r
-                       {0x91u, 0x55u},\r
-                       {0x93u, 0xA1u},\r
-                       {0x94u, 0x04u},\r
-                       {0x96u, 0x0Eu},\r
-                       {0x97u, 0x08u},\r
-                       {0x99u, 0x01u},\r
-                       {0x9Bu, 0x80u},\r
-                       {0x9Cu, 0x40u},\r
-                       {0x9Du, 0x80u},\r
-                       {0x9Eu, 0x40u},\r
-                       {0x9Fu, 0x20u},\r
-                       {0xA1u, 0x84u},\r
-                       {0xA2u, 0x08u},\r
-                       {0xA3u, 0x40u},\r
-                       {0xA4u, 0x42u},\r
-                       {0xA5u, 0x01u},\r
-                       {0xA6u, 0x10u},\r
-                       {0xA9u, 0x04u},\r
-                       {0xB1u, 0x10u},\r
-                       {0xB4u, 0x08u},\r
-                       {0xC0u, 0xEAu},\r
-                       {0xC2u, 0xF5u},\r
-                       {0xC4u, 0xF2u},\r
-                       {0xCAu, 0xE0u},\r
-                       {0xCCu, 0xFEu},\r
-                       {0xCEu, 0xF9u},\r
-                       {0xD6u, 0xF8u},\r
-                       {0xD8u, 0x90u},\r
-                       {0xE2u, 0x08u},\r
-                       {0xE6u, 0x48u},\r
-                       {0xEAu, 0x04u},\r
-                       {0x91u, 0x40u},\r
-                       {0x92u, 0x08u},\r
-                       {0x93u, 0x80u},\r
-                       {0xA1u, 0x40u},\r
-                       {0xABu, 0x10u},\r
-                       {0xB1u, 0x88u},\r
-                       {0xB4u, 0x81u},\r
-                       {0xE2u, 0x08u},\r
-                       {0xE6u, 0x08u},\r
-                       {0xE8u, 0x80u},\r
-                       {0xEAu, 0x40u},\r
-                       {0x00u, 0xFFu},\r
-                       {0x01u, 0x55u},\r
-                       {0x03u, 0xAAu},\r
-                       {0x09u, 0xFFu},\r
-                       {0x0Au, 0xFFu},\r
-                       {0x0Du, 0x0Fu},\r
-                       {0x0Eu, 0xFFu},\r
-                       {0x0Fu, 0xF0u},\r
-                       {0x10u, 0x33u},\r
-                       {0x12u, 0xCCu},\r
-                       {0x13u, 0xFFu},\r
-                       {0x17u, 0xFFu},\r
-                       {0x18u, 0x55u},\r
-                       {0x19u, 0x69u},\r
-                       {0x1Au, 0xAAu},\r
-                       {0x1Bu, 0x96u},\r
-                       {0x1Cu, 0x0Fu},\r
-                       {0x1Eu, 0xF0u},\r
-                       {0x1Fu, 0xFFu},\r
-                       {0x21u, 0xFFu},\r
-                       {0x22u, 0xFFu},\r
-                       {0x24u, 0xFFu},\r
-                       {0x2Cu, 0x96u},\r
-                       {0x2Du, 0x33u},\r
-                       {0x2Eu, 0x69u},\r
-                       {0x2Fu, 0xCCu},\r
-                       {0x31u, 0xFFu},\r
-                       {0x36u, 0xFFu},\r
-                       {0x3Au, 0x80u},\r
-                       {0x3Bu, 0x02u},\r
+                       {0x1Bu, 0x04u},\r
+                       {0x20u, 0x02u},\r
+                       {0x22u, 0x01u},\r
+                       {0x24u, 0x02u},\r
+                       {0x26u, 0x01u},\r
+                       {0x28u, 0x02u},\r
+                       {0x2Au, 0x01u},\r
+                       {0x2Cu, 0x02u},\r
+                       {0x2Eu, 0x01u},\r
+                       {0x30u, 0x04u},\r
+                       {0x31u, 0x01u},\r
+                       {0x33u, 0x04u},\r
+                       {0x34u, 0x18u},\r
+                       {0x35u, 0x02u},\r
+                       {0x36u, 0x03u},\r
+                       {0x37u, 0x08u},\r
+                       {0x3Au, 0xA0u},\r
                        {0x56u, 0x08u},\r
                        {0x58u, 0x04u},\r
                        {0x59u, 0x04u},\r
                        {0x5Bu, 0x04u},\r
-                       {0x5Cu, 0x11u},\r
+                       {0x5Cu, 0x99u},\r
                        {0x5Du, 0x90u},\r
                        {0x5Fu, 0x01u},\r
                        {0x82u, 0x08u},\r
-                       {0x83u, 0x80u},\r
-                       {0x85u, 0xAAu},\r
-                       {0x86u, 0x80u},\r
-                       {0x87u, 0x55u},\r
-                       {0x88u, 0x0Au},\r
-                       {0x8Au, 0x05u},\r
-                       {0x8Bu, 0x08u},\r
-                       {0x8Eu, 0x07u},\r
-                       {0x8Fu, 0x07u},\r
-                       {0x91u, 0x44u},\r
-                       {0x92u, 0x40u},\r
-                       {0x93u, 0x88u},\r
-                       {0x95u, 0x99u},\r
-                       {0x96u, 0x20u},\r
-                       {0x97u, 0x22u},\r
-                       {0x9Au, 0x10u},\r
-                       {0x9Bu, 0x70u},\r
-                       {0x9Cu, 0x04u},\r
-                       {0x9Eu, 0x08u},\r
-                       {0xA0u, 0x50u},\r
-                       {0xA2u, 0xA0u},\r
-                       {0xA4u, 0x09u},\r
-                       {0xA6u, 0x02u},\r
-                       {0xB0u, 0xC0u},\r
-                       {0xB2u, 0x30u},\r
-                       {0xB3u, 0xF0u},\r
-                       {0xB6u, 0x0Fu},\r
-                       {0xB7u, 0x0Fu},\r
-                       {0xBEu, 0x05u},\r
-                       {0xD6u, 0x08u},\r
+                       {0x83u, 0x01u},\r
+                       {0x86u, 0x04u},\r
+                       {0x89u, 0x04u},\r
+                       {0x8Bu, 0x02u},\r
+                       {0x8Du, 0x04u},\r
+                       {0x8Eu, 0x01u},\r
+                       {0x8Fu, 0x02u},\r
+                       {0x90u, 0x08u},\r
+                       {0x96u, 0x02u},\r
+                       {0x98u, 0x08u},\r
+                       {0x99u, 0x02u},\r
+                       {0x9Bu, 0x04u},\r
+                       {0x9Cu, 0x08u},\r
+                       {0x9Du, 0x04u},\r
+                       {0x9Fu, 0x02u},\r
+                       {0xA6u, 0x08u},\r
+                       {0xA9u, 0x04u},\r
+                       {0xABu, 0x02u},\r
+                       {0xB0u, 0x04u},\r
+                       {0xB2u, 0x02u},\r
+                       {0xB3u, 0x06u},\r
+                       {0xB4u, 0x08u},\r
+                       {0xB5u, 0x01u},\r
+                       {0xB6u, 0x01u},\r
+                       {0xBBu, 0x08u},\r
+                       {0xBEu, 0x10u},\r
                        {0xD8u, 0x04u},\r
                        {0xD9u, 0x04u},\r
-                       {0xDBu, 0x04u},\r
-                       {0xDCu, 0x11u},\r
-                       {0xDDu, 0x90u},\r
+                       {0xDCu, 0x99u},\r
                        {0xDFu, 0x01u},\r
-                       {0x02u, 0x02u},\r
-                       {0x03u, 0x84u},\r
-                       {0x05u, 0x48u},\r
-                       {0x07u, 0x48u},\r
+                       {0x00u, 0x0Eu},\r
+                       {0x01u, 0xA0u},\r
+                       {0x04u, 0x40u},\r
+                       {0x05u, 0x06u},\r
                        {0x08u, 0x02u},\r
-                       {0x09u, 0x10u},\r
-                       {0x0Au, 0x01u},\r
-                       {0x0Du, 0x04u},\r
-                       {0x0Eu, 0x0Au},\r
-                       {0x0Fu, 0x80u},\r
-                       {0x10u, 0x01u},\r
-                       {0x11u, 0x02u},\r
-                       {0x13u, 0x08u},\r
-                       {0x17u, 0x05u},\r
-                       {0x18u, 0x02u},\r
-                       {0x1Au, 0x01u},\r
-                       {0x1Du, 0x40u},\r
-                       {0x1Fu, 0x0Au},\r
-                       {0x23u, 0x40u},\r
-                       {0x25u, 0x40u},\r
-                       {0x27u, 0x10u},\r
-                       {0x2Bu, 0x81u},\r
-                       {0x31u, 0x20u},\r
-                       {0x32u, 0x42u},\r
-                       {0x33u, 0x04u},\r
-                       {0x36u, 0x03u},\r
-                       {0x37u, 0x14u},\r
-                       {0x3Au, 0x10u},\r
-                       {0x3Bu, 0x41u},\r
-                       {0x3Du, 0x89u},\r
-                       {0x3Eu, 0x10u},\r
-                       {0x3Fu, 0x80u},\r
-                       {0x59u, 0xA0u},\r
-                       {0x5Cu, 0x80u},\r
-                       {0x60u, 0x02u},\r
-                       {0x61u, 0x10u},\r
-                       {0x63u, 0x04u},\r
-                       {0x64u, 0x01u},\r
-                       {0x66u, 0x80u},\r
-                       {0x6Cu, 0x02u},\r
-                       {0x6Du, 0x40u},\r
-                       {0x6Fu, 0x01u},\r
-                       {0x85u, 0x60u},\r
-                       {0x8Bu, 0x44u},\r
-                       {0x8Fu, 0x0Au},\r
-                       {0x91u, 0x09u},\r
-                       {0x92u, 0x98u},\r
-                       {0x93u, 0x81u},\r
-                       {0x9Au, 0x10u},\r
-                       {0x9Bu, 0x4Cu},\r
-                       {0x9Du, 0x10u},\r
-                       {0x9Eu, 0x80u},\r
-                       {0xA1u, 0x35u},\r
-                       {0xA2u, 0x06u},\r
-                       {0xA3u, 0x81u},\r
-                       {0xA4u, 0x02u},\r
-                       {0xA8u, 0x04u},\r
-                       {0xAAu, 0x03u},\r
-                       {0xACu, 0x08u},\r
-                       {0xADu, 0x80u},\r
-                       {0xB0u, 0x80u},\r
-                       {0xB6u, 0x46u},\r
-                       {0xC0u, 0xFBu},\r
-                       {0xC2u, 0xFBu},\r
-                       {0xC4u, 0x3Du},\r
-                       {0xCAu, 0x09u},\r
-                       {0xCCu, 0xEFu},\r
-                       {0xCEu, 0xFDu},\r
-                       {0xD6u, 0x1Cu},\r
-                       {0xD8u, 0x1Cu},\r
-                       {0xE2u, 0x38u},\r
-                       {0xE6u, 0x22u},\r
-                       {0xEAu, 0x48u},\r
-                       {0xEEu, 0x90u},\r
-                       {0x00u, 0x01u},\r
-                       {0x03u, 0xE7u},\r
-                       {0x05u, 0x20u},\r
-                       {0x09u, 0x08u},\r
-                       {0x11u, 0x01u},\r
-                       {0x13u, 0x44u},\r
-                       {0x15u, 0x61u},\r
-                       {0x17u, 0x82u},\r
-                       {0x18u, 0x04u},\r
-                       {0x19u, 0x10u},\r
+                       {0x09u, 0x20u},\r
+                       {0x0Au, 0x20u},\r
+                       {0x0Cu, 0x20u},\r
+                       {0x0Du, 0x02u},\r
+                       {0x0Fu, 0x21u},\r
+                       {0x12u, 0xAAu},\r
+                       {0x15u, 0x08u},\r
+                       {0x19u, 0xB0u},\r
+                       {0x1Au, 0x40u},\r
+                       {0x1Cu, 0x40u},\r
+                       {0x1Du, 0x44u},\r
+                       {0x1Eu, 0x04u},\r
+                       {0x1Fu, 0x08u},\r
                        {0x20u, 0x02u},\r
-                       {0x27u, 0x02u},\r
-                       {0x28u, 0x08u},\r
-                       {0x29u, 0x86u},\r
-                       {0x2Bu, 0x61u},\r
-                       {0x30u, 0x01u},\r
-                       {0x31u, 0x07u},\r
-                       {0x32u, 0x08u},\r
-                       {0x33u, 0x08u},\r
-                       {0x34u, 0x04u},\r
-                       {0x35u, 0xE0u},\r
-                       {0x36u, 0x02u},\r
+                       {0x21u, 0x10u},\r
+                       {0x22u, 0x1Au},\r
+                       {0x24u, 0x20u},\r
+                       {0x25u, 0x04u},\r
+                       {0x26u, 0x20u},\r
+                       {0x27u, 0x10u},\r
+                       {0x2Fu, 0x08u},\r
+                       {0x32u, 0x28u},\r
+                       {0x35u, 0x40u},\r
                        {0x37u, 0x10u},\r
-                       {0x3Eu, 0x55u},\r
-                       {0x3Fu, 0x44u},\r
-                       {0x40u, 0x53u},\r
-                       {0x41u, 0x06u},\r
-                       {0x42u, 0x40u},\r
-                       {0x45u, 0xC2u},\r
-                       {0x46u, 0x0Eu},\r
-                       {0x47u, 0xDFu},\r
-                       {0x48u, 0x37u},\r
-                       {0x49u, 0xFFu},\r
-                       {0x4Au, 0xFFu},\r
-                       {0x4Bu, 0xFFu},\r
-                       {0x4Fu, 0x2Cu},\r
-                       {0x56u, 0x01u},\r
+                       {0x38u, 0x04u},\r
+                       {0x39u, 0x20u},\r
+                       {0x3Cu, 0x40u},\r
+                       {0x3Fu, 0x22u},\r
+                       {0x58u, 0x28u},\r
+                       {0x5Bu, 0x40u},\r
+                       {0x61u, 0x20u},\r
+                       {0x62u, 0x80u},\r
+                       {0x63u, 0x22u},\r
+                       {0x8Eu, 0x01u},\r
+                       {0x90u, 0x80u},\r
+                       {0x91u, 0x08u},\r
+                       {0x93u, 0x01u},\r
+                       {0x94u, 0x20u},\r
+                       {0x95u, 0x04u},\r
+                       {0x96u, 0x40u},\r
+                       {0x98u, 0x0Au},\r
+                       {0x9Du, 0x91u},\r
+                       {0x9Eu, 0x02u},\r
+                       {0xA0u, 0x26u},\r
+                       {0xA1u, 0x02u},\r
+                       {0xA5u, 0x35u},\r
+                       {0xA6u, 0x45u},\r
+                       {0xAAu, 0xC0u},\r
+                       {0xABu, 0x08u},\r
+                       {0xADu, 0x04u},\r
+                       {0xB0u, 0x28u},\r
+                       {0xB2u, 0x02u},\r
+                       {0xB6u, 0x08u},\r
+                       {0xC0u, 0xBFu},\r
+                       {0xC2u, 0xFEu},\r
+                       {0xC4u, 0x2Fu},\r
+                       {0xCAu, 0x20u},\r
+                       {0xCCu, 0x36u},\r
+                       {0xCEu, 0xB6u},\r
+                       {0xD6u, 0x0Eu},\r
+                       {0xD8u, 0x0Eu},\r
+                       {0xE0u, 0x10u},\r
+                       {0xE2u, 0x20u},\r
+                       {0xEAu, 0x10u},\r
+                       {0xECu, 0x20u},\r
+                       {0xEEu, 0x55u},\r
+                       {0x03u, 0xFFu},\r
+                       {0x04u, 0x09u},\r
+                       {0x06u, 0x06u},\r
+                       {0x07u, 0xFFu},\r
+                       {0x08u, 0x30u},\r
+                       {0x09u, 0x55u},\r
+                       {0x0Au, 0xC0u},\r
+                       {0x0Bu, 0xAAu},\r
+                       {0x0Cu, 0x90u},\r
+                       {0x0Eu, 0x60u},\r
+                       {0x10u, 0xFFu},\r
+                       {0x13u, 0xFFu},\r
+                       {0x15u, 0xFFu},\r
+                       {0x19u, 0x0Fu},\r
+                       {0x1Au, 0xFFu},\r
+                       {0x1Bu, 0xF0u},\r
+                       {0x1Cu, 0x03u},\r
+                       {0x1Eu, 0x0Cu},\r
+                       {0x20u, 0x05u},\r
+                       {0x22u, 0x0Au},\r
+                       {0x24u, 0x50u},\r
+                       {0x25u, 0x33u},\r
+                       {0x26u, 0xA0u},\r
+                       {0x27u, 0xCCu},\r
+                       {0x28u, 0xFFu},\r
+                       {0x29u, 0xFFu},\r
+                       {0x2Cu, 0x0Fu},\r
+                       {0x2Du, 0x69u},\r
+                       {0x2Eu, 0xF0u},\r
+                       {0x2Fu, 0x96u},\r
+                       {0x30u, 0xFFu},\r
+                       {0x35u, 0xFFu},\r
+                       {0x39u, 0x02u},\r
+                       {0x3Bu, 0x20u},\r
+                       {0x3Eu, 0x01u},\r
+                       {0x3Fu, 0x01u},\r
                        {0x58u, 0x04u},\r
                        {0x59u, 0x04u},\r
-                       {0x5Au, 0x04u},\r
-                       {0x5Bu, 0x04u},\r
                        {0x5Cu, 0x10u},\r
-                       {0x5Du, 0x01u},\r
                        {0x5Fu, 0x01u},\r
-                       {0x62u, 0xC0u},\r
-                       {0x66u, 0x80u},\r
-                       {0x68u, 0x40u},\r
-                       {0x69u, 0x40u},\r
-                       {0x6Eu, 0x08u},\r
-                       {0xADu, 0x01u},\r
-                       {0xB1u, 0x01u},\r
-                       {0xBFu, 0x01u},\r
+                       {0x82u, 0x10u},\r
+                       {0x84u, 0x02u},\r
+                       {0x86u, 0x01u},\r
+                       {0x87u, 0x04u},\r
+                       {0x88u, 0x01u},\r
+                       {0x89u, 0x02u},\r
+                       {0x8Au, 0x02u},\r
+                       {0x8Bu, 0x01u},\r
+                       {0x8Cu, 0x02u},\r
+                       {0x8Eu, 0x01u},\r
+                       {0x90u, 0x02u},\r
+                       {0x91u, 0x02u},\r
+                       {0x92u, 0x01u},\r
+                       {0x93u, 0x01u},\r
+                       {0x94u, 0x04u},\r
+                       {0x95u, 0x01u},\r
+                       {0x97u, 0x02u},\r
+                       {0x98u, 0x02u},\r
+                       {0x99u, 0x02u},\r
+                       {0x9Au, 0x01u},\r
+                       {0x9Bu, 0x01u},\r
+                       {0xA1u, 0x02u},\r
+                       {0xA3u, 0x01u},\r
+                       {0xA6u, 0x08u},\r
+                       {0xAFu, 0x08u},\r
+                       {0xB0u, 0x08u},\r
+                       {0xB1u, 0x04u},\r
+                       {0xB2u, 0x03u},\r
+                       {0xB3u, 0x03u},\r
+                       {0xB4u, 0x04u},\r
+                       {0xB5u, 0x08u},\r
+                       {0xB6u, 0x10u},\r
+                       {0xBAu, 0x08u},\r
+                       {0xBBu, 0x08u},\r
                        {0xD6u, 0x08u},\r
+                       {0xD8u, 0x04u},\r
                        {0xD9u, 0x04u},\r
                        {0xDBu, 0x04u},\r
+                       {0xDCu, 0x99u},\r
                        {0xDDu, 0x90u},\r
                        {0xDFu, 0x01u},\r
-                       {0x06u, 0x80u},\r
-                       {0x0Du, 0x20u},\r
-                       {0x14u, 0x08u},\r
-                       {0x16u, 0x40u},\r
-                       {0x1Cu, 0x01u},\r
-                       {0x1Du, 0x01u},\r
-                       {0x1Eu, 0x04u},\r
-                       {0x1Fu, 0x04u},\r
-                       {0x23u, 0x40u},\r
-                       {0x24u, 0x08u},\r
-                       {0x25u, 0x88u},\r
-                       {0x26u, 0x12u},\r
-                       {0x27u, 0x04u},\r
-                       {0x2Bu, 0x01u},\r
-                       {0x2Du, 0x04u},\r
-                       {0x2Eu, 0x20u},\r
-                       {0x31u, 0xCCu},\r
-                       {0x35u, 0x10u},\r
-                       {0x36u, 0x02u},\r
-                       {0x37u, 0x04u},\r
-                       {0x3Cu, 0x04u},\r
-                       {0x3Du, 0x22u},\r
-                       {0x3Fu, 0x20u},\r
-                       {0x45u, 0x06u},\r
-                       {0x46u, 0x30u},\r
-                       {0x47u, 0x08u},\r
-                       {0x4Cu, 0x84u},\r
-                       {0x4Du, 0x04u},\r
-                       {0x4Eu, 0x82u},\r
-                       {0x54u, 0x08u},\r
-                       {0x56u, 0x01u},\r
-                       {0x57u, 0x42u},\r
-                       {0x58u, 0x20u},\r
-                       {0x59u, 0x80u},\r
-                       {0x5Cu, 0x01u},\r
-                       {0x5Du, 0x20u},\r
-                       {0x5Eu, 0x04u},\r
-                       {0x5Fu, 0x40u},\r
+                       {0x00u, 0x94u},\r
+                       {0x01u, 0x02u},\r
+                       {0x03u, 0x04u},\r
+                       {0x05u, 0x20u},\r
+                       {0x06u, 0x20u},\r
+                       {0x07u, 0x02u},\r
+                       {0x09u, 0x24u},\r
+                       {0x0Au, 0x40u},\r
+                       {0x0Eu, 0x81u},\r
+                       {0x0Fu, 0x04u},\r
+                       {0x12u, 0x10u},\r
+                       {0x14u, 0x44u},\r
+                       {0x15u, 0x44u},\r
+                       {0x18u, 0x10u},\r
+                       {0x19u, 0x02u},\r
+                       {0x1Au, 0x02u},\r
+                       {0x1Bu, 0x20u},\r
+                       {0x1Fu, 0x01u},\r
+                       {0x20u, 0x88u},\r
+                       {0x21u, 0x04u},\r
+                       {0x22u, 0x08u},\r
+                       {0x24u, 0x80u},\r
+                       {0x26u, 0x20u},\r
+                       {0x27u, 0x08u},\r
+                       {0x28u, 0x02u},\r
+                       {0x29u, 0x02u},\r
+                       {0x2Cu, 0x08u},\r
+                       {0x2Eu, 0x80u},\r
+                       {0x2Fu, 0x10u},\r
+                       {0x32u, 0x19u},\r
+                       {0x36u, 0x2Au},\r
+                       {0x38u, 0x04u},\r
+                       {0x3Au, 0x10u},\r
+                       {0x3Du, 0x08u},\r
+                       {0x3Fu, 0x21u},\r
+                       {0x5Au, 0x80u},\r
+                       {0x5Bu, 0x10u},\r
                        {0x60u, 0x02u},\r
-                       {0x63u, 0x09u},\r
-                       {0x65u, 0x45u},\r
-                       {0x67u, 0x08u},\r
-                       {0x6Cu, 0x10u},\r
-                       {0x6Du, 0x41u},\r
-                       {0x6Eu, 0x10u},\r
-                       {0x75u, 0x08u},\r
-                       {0x76u, 0x0Au},\r
-                       {0x77u, 0x40u},\r
-                       {0x80u, 0x04u},\r
-                       {0x86u, 0x40u},\r
-                       {0x89u, 0x04u},\r
-                       {0x8Eu, 0x08u},\r
-                       {0x8Fu, 0x0Cu},\r
-                       {0x92u, 0x88u},\r
-                       {0x93u, 0x80u},\r
-                       {0x94u, 0x2Cu},\r
-                       {0x95u, 0x44u},\r
-                       {0x96u, 0x40u},\r
-                       {0x98u, 0x28u},\r
+                       {0x62u, 0x10u},\r
+                       {0x83u, 0x11u},\r
+                       {0x87u, 0x20u},\r
+                       {0x8Bu, 0x10u},\r
+                       {0x8Cu, 0x28u},\r
+                       {0x8Du, 0x02u},\r
+                       {0x8Eu, 0x01u},\r
+                       {0x8Fu, 0x10u},\r
+                       {0x90u, 0x04u},\r
+                       {0x91u, 0x40u},\r
+                       {0x92u, 0x21u},\r
+                       {0x93u, 0x05u},\r
+                       {0x94u, 0x20u},\r
+                       {0x95u, 0x0Cu},\r
+                       {0x96u, 0x42u},\r
+                       {0x98u, 0x44u},\r
                        {0x99u, 0x20u},\r
-                       {0x9Au, 0x40u},\r
-                       {0x9Bu, 0x08u},\r
-                       {0x9Cu, 0x02u},\r
-                       {0x9Du, 0x08u},\r
-                       {0xA1u, 0x23u},\r
-                       {0xA2u, 0x04u},\r
-                       {0xA3u, 0x91u},\r
-                       {0xA4u, 0x02u},\r
-                       {0xA6u, 0x92u},\r
-                       {0xA7u, 0x42u},\r
-                       {0xA9u, 0x01u},\r
-                       {0xAAu, 0x10u},\r
-                       {0xB0u, 0xA0u},\r
-                       {0xB2u, 0x04u},\r
-                       {0xB3u, 0x40u},\r
-                       {0xB7u, 0x40u},\r
-                       {0xC0u, 0x10u},\r
-                       {0xC2u, 0x40u},\r
-                       {0xC4u, 0x50u},\r
-                       {0xCAu, 0x68u},\r
-                       {0xCCu, 0xE0u},\r
-                       {0xCEu, 0xE0u},\r
-                       {0xD0u, 0xC0u},\r
-                       {0xD2u, 0x30u},\r
-                       {0xD6u, 0xFCu},\r
-                       {0xD8u, 0xFCu},\r
-                       {0xE2u, 0x50u},\r
-                       {0xE4u, 0x80u},\r
-                       {0xE6u, 0x48u},\r
-                       {0xE8u, 0x0Cu},\r
-                       {0xEAu, 0x01u},\r
-                       {0xEEu, 0xC2u},\r
-                       {0x01u, 0x01u},\r
-                       {0x02u, 0x04u},\r
-                       {0x03u, 0x06u},\r
-                       {0x05u, 0x4Au},\r
-                       {0x07u, 0x15u},\r
-                       {0x0Fu, 0x40u},\r
-                       {0x10u, 0x01u},\r
-                       {0x11u, 0x22u},\r
-                       {0x13u, 0x45u},\r
-                       {0x17u, 0x38u},\r
-                       {0x19u, 0x53u},\r
-                       {0x1Au, 0x02u},\r
-                       {0x1Bu, 0x2Cu},\r
-                       {0x21u, 0x01u},\r
-                       {0x27u, 0x01u},\r
-                       {0x2Cu, 0x02u},\r
-                       {0x2Eu, 0x04u},\r
-                       {0x30u, 0x06u},\r
-                       {0x31u, 0x07u},\r
-                       {0x33u, 0x78u},\r
-                       {0x34u, 0x01u},\r
-                       {0x3Bu, 0x02u},\r
-                       {0x3Eu, 0x11u},\r
-                       {0x56u, 0x08u},\r
+                       {0x9Au, 0x20u},\r
+                       {0x9Bu, 0x02u},\r
+                       {0x9Cu, 0x20u},\r
+                       {0x9Du, 0x91u},\r
+                       {0x9Eu, 0x03u},\r
+                       {0x9Fu, 0x04u},\r
+                       {0xA0u, 0x02u},\r
+                       {0xA4u, 0x20u},\r
+                       {0xA5u, 0x13u},\r
+                       {0xA6u, 0x45u},\r
+                       {0xA8u, 0x40u},\r
+                       {0xA9u, 0x40u},\r
+                       {0xABu, 0x40u},\r
+                       {0xADu, 0x80u},\r
+                       {0xAFu, 0x04u},\r
+                       {0xC0u, 0xEFu},\r
+                       {0xC2u, 0xDEu},\r
+                       {0xC4u, 0xF4u},\r
+                       {0xCAu, 0x79u},\r
+                       {0xCCu, 0xE7u},\r
+                       {0xCEu, 0xE6u},\r
+                       {0xD6u, 0x0Cu},\r
+                       {0xD8u, 0x0Cu},\r
+                       {0xE0u, 0x70u},\r
+                       {0xE2u, 0x8Cu},\r
+                       {0xE4u, 0x50u},\r
+                       {0xE6u, 0x23u},\r
+                       {0xEAu, 0x80u},\r
+                       {0xEEu, 0x04u},\r
+                       {0x01u, 0x33u},\r
+                       {0x03u, 0xCCu},\r
+                       {0x05u, 0xFFu},\r
+                       {0x0Bu, 0xFFu},\r
+                       {0x0Du, 0x0Fu},\r
+                       {0x0Fu, 0xF0u},\r
+                       {0x11u, 0xFFu},\r
+                       {0x12u, 0x04u},\r
+                       {0x17u, 0xFFu},\r
+                       {0x1Bu, 0xFFu},\r
+                       {0x1Eu, 0x08u},\r
+                       {0x21u, 0x55u},\r
+                       {0x22u, 0x01u},\r
+                       {0x23u, 0xAAu},\r
+                       {0x25u, 0x96u},\r
+                       {0x26u, 0x02u},\r
+                       {0x27u, 0x69u},\r
+                       {0x2Cu, 0x01u},\r
+                       {0x2Eu, 0x02u},\r
+                       {0x30u, 0x03u},\r
+                       {0x32u, 0x08u},\r
+                       {0x34u, 0x04u},\r
+                       {0x37u, 0xFFu},\r
+                       {0x3Bu, 0x80u},\r
+                       {0x3Eu, 0x01u},\r
                        {0x58u, 0x04u},\r
                        {0x59u, 0x04u},\r
                        {0x5Bu, 0x04u},\r
-                       {0x5Cu, 0x10u},\r
-                       {0x5Du, 0x90u},\r
+                       {0x5Cu, 0x19u},\r
                        {0x5Fu, 0x01u},\r
-                       {0x82u, 0x07u},\r
-                       {0x83u, 0x3Fu},\r
-                       {0x85u, 0x10u},\r
-                       {0x86u, 0x80u},\r
-                       {0x87u, 0x01u},\r
-                       {0x8Au, 0x08u},\r
-                       {0x8Du, 0x30u},\r
-                       {0x8Fu, 0xC0u},\r
-                       {0x91u, 0x70u},\r
-                       {0x93u, 0x8Cu},\r
-                       {0x94u, 0x99u},\r
-                       {0x95u, 0x6Fu},\r
-                       {0x96u, 0x22u},\r
-                       {0x97u, 0x90u},\r
-                       {0x99u, 0x57u},\r
-                       {0x9Au, 0x70u},\r
-                       {0x9Bu, 0xA0u},\r
-                       {0x9Cu, 0x44u},\r
-                       {0x9Du, 0x03u},\r
-                       {0x9Eu, 0x88u},\r
-                       {0xA1u, 0x08u},\r
-                       {0xA3u, 0x03u},\r
-                       {0xA4u, 0xAAu},\r
-                       {0xA6u, 0x55u},\r
-                       {0xA7u, 0x20u},\r
-                       {0xADu, 0x02u},\r
-                       {0xB4u, 0xF0u},\r
-                       {0xB5u, 0x0Fu},\r
-                       {0xB6u, 0x0Fu},\r
-                       {0xB7u, 0xF0u},\r
-                       {0xBBu, 0x80u},\r
+                       {0x81u, 0x03u},\r
+                       {0x83u, 0x0Cu},\r
+                       {0x84u, 0x06u},\r
+                       {0x86u, 0x09u},\r
+                       {0x87u, 0xFFu},\r
+                       {0x88u, 0x30u},\r
+                       {0x89u, 0x06u},\r
+                       {0x8Au, 0xC0u},\r
+                       {0x8Bu, 0x09u},\r
+                       {0x8Cu, 0x60u},\r
+                       {0x8Du, 0x0Fu},\r
+                       {0x8Eu, 0x90u},\r
+                       {0x8Fu, 0xF0u},\r
+                       {0x91u, 0x60u},\r
+                       {0x92u, 0xFFu},\r
+                       {0x93u, 0x90u},\r
+                       {0x97u, 0xFFu},\r
+                       {0x9Au, 0xFFu},\r
+                       {0x9Cu, 0x03u},\r
+                       {0x9Du, 0xFFu},\r
+                       {0x9Eu, 0x0Cu},\r
+                       {0xA0u, 0x05u},\r
+                       {0xA1u, 0x05u},\r
+                       {0xA2u, 0x0Au},\r
+                       {0xA3u, 0x0Au},\r
+                       {0xA4u, 0x50u},\r
+                       {0xA5u, 0x50u},\r
+                       {0xA6u, 0xA0u},\r
+                       {0xA7u, 0xA0u},\r
+                       {0xA8u, 0xFFu},\r
+                       {0xA9u, 0x30u},\r
+                       {0xABu, 0xC0u},\r
+                       {0xACu, 0x0Fu},\r
+                       {0xAEu, 0xF0u},\r
+                       {0xB1u, 0xFFu},\r
+                       {0xB6u, 0xFFu},\r
+                       {0xBEu, 0x40u},\r
+                       {0xBFu, 0x01u},\r
                        {0xD6u, 0x08u},\r
                        {0xD8u, 0x04u},\r
                        {0xD9u, 0x04u},\r
                        {0xDBu, 0x04u},\r
-                       {0xDCu, 0x11u},\r
                        {0xDDu, 0x90u},\r
                        {0xDFu, 0x01u},\r
-                       {0x01u, 0x02u},\r
-                       {0x04u, 0x21u},\r
-                       {0x05u, 0x08u},\r
-                       {0x08u, 0x02u},\r
-                       {0x0Au, 0x08u},\r
-                       {0x0Eu, 0x2Au},\r
-                       {0x10u, 0x02u},\r
-                       {0x17u, 0x08u},\r
-                       {0x19u, 0x21u},\r
-                       {0x1Cu, 0x01u},\r
-                       {0x1Eu, 0x08u},\r
-                       {0x1Fu, 0x40u},\r
-                       {0x21u, 0x0Bu},\r
-                       {0x22u, 0x04u},\r
-                       {0x25u, 0x40u},\r
-                       {0x26u, 0x20u},\r
-                       {0x27u, 0x08u},\r
-                       {0x2Au, 0x08u},\r
-                       {0x2Bu, 0x80u},\r
-                       {0x2Du, 0x04u},\r
-                       {0x2Fu, 0x82u},\r
-                       {0x31u, 0x08u},\r
-                       {0x32u, 0x22u},\r
-                       {0x36u, 0x93u},\r
-                       {0x37u, 0x08u},\r
-                       {0x38u, 0x08u},\r
-                       {0x39u, 0x42u},\r
-                       {0x3Cu, 0x04u},\r
-                       {0x3Du, 0x82u},\r
-                       {0x58u, 0x80u},\r
-                       {0x5Au, 0x10u},\r
+                       {0x05u, 0x20u},\r
+                       {0x06u, 0x20u},\r
+                       {0x07u, 0x02u},\r
+                       {0x0Au, 0x42u},\r
+                       {0x0Eu, 0x81u},\r
+                       {0x0Fu, 0x04u},\r
+                       {0x10u, 0x40u},\r
+                       {0x11u, 0x44u},\r
+                       {0x14u, 0x44u},\r
+                       {0x15u, 0x44u},\r
+                       {0x18u, 0x04u},\r
+                       {0x19u, 0x02u},\r
+                       {0x1Au, 0x20u},\r
+                       {0x1Du, 0x80u},\r
+                       {0x21u, 0x40u},\r
+                       {0x27u, 0x40u},\r
+                       {0x28u, 0x20u},\r
+                       {0x2Au, 0x01u},\r
+                       {0x2Cu, 0x40u},\r
+                       {0x2Du, 0x24u},\r
+                       {0x2Eu, 0x02u},\r
+                       {0x30u, 0x28u},\r
+                       {0x31u, 0x02u},\r
+                       {0x34u, 0x04u},\r
+                       {0x36u, 0x45u},\r
+                       {0x37u, 0x02u},\r
+                       {0x38u, 0x20u},\r
+                       {0x39u, 0x88u},\r
+                       {0x3Bu, 0x0Au},\r
+                       {0x3Du, 0x62u},\r
+                       {0x3Eu, 0x21u},\r
+                       {0x3Fu, 0x04u},\r
+                       {0x59u, 0x91u},\r
                        {0x5Bu, 0x04u},\r
-                       {0x5Eu, 0x44u},\r
-                       {0x5Fu, 0x10u},\r
-                       {0x61u, 0x20u},\r
-                       {0x63u, 0x22u},\r
-                       {0x64u, 0x08u},\r
-                       {0x66u, 0x40u},\r
-                       {0x67u, 0x20u},\r
-                       {0x81u, 0x01u},\r
-                       {0x82u, 0x48u},\r
+                       {0x5Cu, 0x40u},\r
+                       {0x61u, 0x40u},\r
+                       {0x67u, 0x02u},\r
+                       {0x68u, 0x02u},\r
+                       {0x69u, 0x40u},\r
+                       {0x80u, 0x08u},\r
+                       {0x83u, 0x01u},\r
+                       {0x85u, 0x60u},\r
+                       {0x87u, 0x04u},\r
+                       {0x89u, 0x02u},\r
+                       {0xC0u, 0xE0u},\r
+                       {0xC2u, 0xD9u},\r
+                       {0xC4u, 0xFDu},\r
+                       {0xCAu, 0xE3u},\r
+                       {0xCCu, 0xD7u},\r
+                       {0xCEu, 0xFFu},\r
+                       {0xD6u, 0x1Fu},\r
+                       {0xD8u, 0x18u},\r
+                       {0x80u, 0x02u},\r
+                       {0x81u, 0x44u},\r
+                       {0x82u, 0x41u},\r
                        {0x83u, 0x88u},\r
-                       {0x87u, 0x10u},\r
-                       {0x88u, 0x08u},\r
-                       {0x89u, 0x40u},\r
-                       {0x8Bu, 0x10u},\r
-                       {0x8Du, 0x02u},\r
-                       {0x8Fu, 0x04u},\r
-                       {0xC0u, 0x78u},\r
-                       {0xC2u, 0xEAu},\r
-                       {0xC4u, 0x21u},\r
-                       {0xCAu, 0xD3u},\r
-                       {0xCCu, 0xF7u},\r
-                       {0xCEu, 0xDBu},\r
-                       {0xD6u, 0x7Eu},\r
-                       {0xD8u, 0x7Eu},\r
-                       {0xE0u, 0x40u},\r
-                       {0xE2u, 0xA0u},\r
-                       {0xE6u, 0x20u},\r
-                       {0x00u, 0x09u},\r
-                       {0x02u, 0x06u},\r
-                       {0x04u, 0x30u},\r
-                       {0x05u, 0x30u},\r
-                       {0x06u, 0xC0u},\r
-                       {0x07u, 0xC0u},\r
-                       {0x09u, 0x50u},\r
-                       {0x0Au, 0xFFu},\r
-                       {0x0Bu, 0xA0u},\r
-                       {0x0Cu, 0x05u},\r
-                       {0x0Du, 0x06u},\r
-                       {0x0Eu, 0x0Au},\r
-                       {0x0Fu, 0x09u},\r
-                       {0x11u, 0x0Fu},\r
-                       {0x13u, 0xF0u},\r
-                       {0x16u, 0xFFu},\r
-                       {0x1Au, 0xFFu},\r
-                       {0x1Bu, 0xFFu},\r
-                       {0x1Cu, 0x0Fu},\r
-                       {0x1Du, 0x03u},\r
-                       {0x1Eu, 0xF0u},\r
-                       {0x1Fu, 0x0Cu},\r
-                       {0x20u, 0x03u},\r
-                       {0x21u, 0x05u},\r
-                       {0x22u, 0x0Cu},\r
-                       {0x23u, 0x0Au},\r
-                       {0x25u, 0xFFu},\r
-                       {0x28u, 0x50u},\r
-                       {0x2Au, 0xA0u},\r
-                       {0x2Bu, 0xFFu},\r
-                       {0x2Cu, 0x90u},\r
-                       {0x2Du, 0x60u},\r
-                       {0x2Eu, 0x60u},\r
-                       {0x2Fu, 0x90u},\r
-                       {0x30u, 0xFFu},\r
-                       {0x31u, 0xFFu},\r
-                       {0x3Eu, 0x01u},\r
-                       {0x3Fu, 0x01u},\r
-                       {0x58u, 0x04u},\r
-                       {0x59u, 0x04u},\r
-                       {0x5Fu, 0x01u},\r
-                       {0x80u, 0x01u},\r
-                       {0x81u, 0x68u},\r
-                       {0x85u, 0x12u},\r
-                       {0x87u, 0xE1u},\r
-                       {0x89u, 0x08u},\r
-                       {0x8Bu, 0x60u},\r
-                       {0x8Fu, 0x08u},\r
-                       {0x91u, 0x60u},\r
-                       {0x93u, 0x08u},\r
-                       {0x95u, 0x28u},\r
-                       {0x97u, 0x40u},\r
-                       {0x99u, 0x91u},\r
-                       {0x9Bu, 0x64u},\r
-                       {0x9Du, 0x06u},\r
-                       {0xA1u, 0x68u},\r
-                       {0xA5u, 0x40u},\r
-                       {0xA9u, 0x71u},\r
-                       {0xABu, 0x82u},\r
-                       {0xADu, 0x20u},\r
-                       {0xB1u, 0x07u},\r
-                       {0xB3u, 0xF0u},\r
-                       {0xB5u, 0x08u},\r
-                       {0xB6u, 0x01u},\r
-                       {0xB9u, 0x0Au},\r
-                       {0xBFu, 0x10u},\r
-                       {0xC0u, 0x62u},\r
-                       {0xC1u, 0x03u},\r
-                       {0xC2u, 0x10u},\r
-                       {0xC4u, 0x04u},\r
-                       {0xC5u, 0xBEu},\r
-                       {0xC6u, 0xFDu},\r
-                       {0xC7u, 0xBCu},\r
-                       {0xC8u, 0x3Fu},\r
-                       {0xC9u, 0xFFu},\r
-                       {0xCAu, 0xFFu},\r
-                       {0xCBu, 0xFFu},\r
-                       {0xCCu, 0x22u},\r
-                       {0xCEu, 0xF0u},\r
-                       {0xCFu, 0x08u},\r
-                       {0xD0u, 0x04u},\r
-                       {0xD4u, 0x40u},\r
-                       {0xD6u, 0x04u},\r
+                       {0x8Bu, 0x80u},\r
+                       {0x8Du, 0x99u},\r
+                       {0x8Fu, 0x22u},\r
+                       {0x94u, 0x53u},\r
+                       {0x96u, 0xACu},\r
+                       {0x97u, 0x07u},\r
+                       {0x98u, 0x01u},\r
+                       {0x99u, 0xAAu},\r
+                       {0x9Au, 0x12u},\r
+                       {0x9Bu, 0x55u},\r
+                       {0x9Cu, 0x08u},\r
+                       {0x9Eu, 0x84u},\r
+                       {0x9Fu, 0x70u},\r
+                       {0xA8u, 0x04u},\r
+                       {0xAAu, 0x28u},\r
+                       {0xAFu, 0x08u},\r
+                       {0xB2u, 0xC0u},\r
+                       {0xB3u, 0x0Fu},\r
+                       {0xB4u, 0x30u},\r
+                       {0xB6u, 0x0Fu},\r
+                       {0xB7u, 0xF0u},\r
+                       {0xBEu, 0x54u},\r
                        {0xD8u, 0x04u},\r
                        {0xD9u, 0x04u},\r
-                       {0xDAu, 0x04u},\r
-                       {0xDBu, 0x04u},\r
-                       {0xDCu, 0x09u},\r
+                       {0xDCu, 0x10u},\r
                        {0xDFu, 0x01u},\r
-                       {0xE2u, 0xC0u},\r
-                       {0xE4u, 0x40u},\r
-                       {0xE5u, 0x01u},\r
-                       {0xE6u, 0x10u},\r
-                       {0xE7u, 0x11u},\r
-                       {0xE8u, 0xC0u},\r
-                       {0xE9u, 0x01u},\r
-                       {0xEBu, 0x11u},\r
-                       {0xECu, 0x40u},\r
-                       {0xEDu, 0x01u},\r
-                       {0xEEu, 0x40u},\r
-                       {0xEFu, 0x01u},\r
-                       {0x00u, 0x92u},\r
-                       {0x01u, 0x04u},\r
-                       {0x02u, 0x41u},\r
-                       {0x03u, 0x08u},\r
+                       {0x00u, 0x08u},\r
+                       {0x02u, 0x01u},\r
+                       {0x03u, 0x84u},\r
                        {0x04u, 0x02u},\r
-                       {0x08u, 0x10u},\r
-                       {0x0Au, 0x26u},\r
-                       {0x0Bu, 0x22u},\r
-                       {0x10u, 0x81u},\r
-                       {0x11u, 0x50u},\r
-                       {0x1Bu, 0x01u},\r
-                       {0x1Fu, 0x40u},\r
-                       {0x21u, 0x02u},\r
-                       {0x24u, 0x20u},\r
-                       {0x26u, 0x18u},\r
-                       {0x27u, 0x60u},\r
-                       {0x28u, 0x11u},\r
+                       {0x08u, 0x02u},\r
+                       {0x0Au, 0x02u},\r
+                       {0x0Bu, 0x14u},\r
+                       {0x0Eu, 0x09u},\r
+                       {0x0Fu, 0x10u},\r
+                       {0x10u, 0x10u},\r
+                       {0x11u, 0x04u},\r
+                       {0x12u, 0x80u},\r
+                       {0x17u, 0x20u},\r
+                       {0x1Bu, 0x10u},\r
+                       {0x1Eu, 0x04u},\r
+                       {0x1Fu, 0x84u},\r
+                       {0x21u, 0x08u},\r
+                       {0x22u, 0x20u},\r
+                       {0x23u, 0x40u},\r
+                       {0x26u, 0x84u},\r
+                       {0x28u, 0x12u},\r
                        {0x2Au, 0x01u},\r
                        {0x2Bu, 0x08u},\r
-                       {0x2Eu, 0x4Au},\r
-                       {0x2Fu, 0x04u},\r
-                       {0x30u, 0x80u},\r
-                       {0x32u, 0x11u},\r
-                       {0x35u, 0x80u},\r
-                       {0x36u, 0x04u},\r
-                       {0x37u, 0x61u},\r
-                       {0x39u, 0x14u},\r
-                       {0x3Au, 0x40u},\r
-                       {0x3Cu, 0x04u},\r
-                       {0x3Eu, 0x91u},\r
-                       {0x44u, 0x80u},\r
-                       {0x45u, 0xA8u},\r
-                       {0x4Cu, 0x40u},\r
-                       {0x4Eu, 0x08u},\r
-                       {0x4Fu, 0x04u},\r
-                       {0x54u, 0x02u},\r
-                       {0x56u, 0x98u},\r
-                       {0x5Eu, 0x20u},\r
-                       {0x5Fu, 0x10u},\r
-                       {0x66u, 0x90u},\r
-                       {0x67u, 0x50u},\r
-                       {0x80u, 0x80u},\r
-                       {0x84u, 0x40u},\r
-                       {0x87u, 0x40u},\r
-                       {0x88u, 0xC0u},\r
+                       {0x2Du, 0x80u},\r
+                       {0x32u, 0x20u},\r
+                       {0x33u, 0x04u},\r
+                       {0x36u, 0x84u},\r
+                       {0x37u, 0x10u},\r
+                       {0x38u, 0x44u},\r
+                       {0x3Bu, 0x10u},\r
+                       {0x3Du, 0x92u},\r
+                       {0x40u, 0x04u},\r
+                       {0x43u, 0x0Au},\r
+                       {0x49u, 0x1Au},\r
+                       {0x4Au, 0x01u},\r
+                       {0x51u, 0x20u},\r
+                       {0x52u, 0x44u},\r
+                       {0x62u, 0x20u},\r
+                       {0x69u, 0x48u},\r
+                       {0x6Au, 0x28u},\r
+                       {0x6Bu, 0x40u},\r
+                       {0x72u, 0x02u},\r
+                       {0x73u, 0x01u},\r
+                       {0x83u, 0x80u},\r
+                       {0x86u, 0x04u},\r
+                       {0x88u, 0x08u},\r
+                       {0x89u, 0x0Au},\r
                        {0x8Bu, 0x40u},\r
-                       {0x8Fu, 0x01u},\r
-                       {0x90u, 0x16u},\r
-                       {0x91u, 0x54u},\r
-                       {0x92u, 0x55u},\r
-                       {0x93u, 0x28u},\r
-                       {0x94u, 0xA0u},\r
-                       {0x96u, 0x02u},\r
-                       {0x97u, 0x04u},\r
-                       {0x9Au, 0x02u},\r
-                       {0x9Bu, 0x01u},\r
-                       {0x9Cu, 0x40u},\r
-                       {0x9Du, 0x80u},\r
-                       {0x9Eu, 0x08u},\r
-                       {0x9Fu, 0x20u},\r
-                       {0xA0u, 0x01u},\r
-                       {0xA1u, 0xA8u},\r
-                       {0xA2u, 0x04u},\r
-                       {0xA4u, 0xC2u},\r
-                       {0xA5u, 0x02u},\r
-                       {0xA7u, 0x01u},\r
-                       {0xAAu, 0x10u},\r
-                       {0xACu, 0x01u},\r
+                       {0x8Cu, 0x40u},\r
+                       {0x8Du, 0x10u},\r
+                       {0x8Eu, 0x01u},\r
+                       {0x90u, 0x06u},\r
+                       {0x91u, 0x14u},\r
+                       {0x92u, 0x03u},\r
+                       {0x93u, 0x14u},\r
+                       {0x95u, 0x48u},\r
+                       {0x96u, 0x28u},\r
+                       {0x97u, 0x09u},\r
+                       {0x98u, 0x02u},\r
+                       {0x99u, 0x90u},\r
+                       {0x9Au, 0x01u},\r
+                       {0x9Bu, 0x34u},\r
+                       {0x9Cu, 0x08u},\r
+                       {0x9Du, 0x08u},\r
+                       {0x9Eu, 0x46u},\r
+                       {0x9Fu, 0x40u},\r
+                       {0xA0u, 0x04u},\r
+                       {0xA1u, 0x41u},\r
+                       {0xA3u, 0x0Au},\r
+                       {0xA5u, 0x20u},\r
+                       {0xA6u, 0x80u},\r
+                       {0xA7u, 0x10u},\r
+                       {0xB2u, 0x80u},\r
+                       {0xB6u, 0x01u},\r
                        {0xC0u, 0x1Fu},\r
-                       {0xC2u, 0x07u},\r
-                       {0xC4u, 0x0Bu},\r
-                       {0xCAu, 0xFFu},\r
-                       {0xCCu, 0xFDu},\r
-                       {0xCEu, 0xFEu},\r
-                       {0xD0u, 0xF0u},\r
-                       {0xD2u, 0x20u},\r
-                       {0xD8u, 0xF0u},\r
-                       {0xE2u, 0x22u},\r
-                       {0xEEu, 0x08u},\r
-                       {0x01u, 0x41u},\r
-                       {0x04u, 0x91u},\r
-                       {0x05u, 0x41u},\r
-                       {0x06u, 0x0Eu},\r
-                       {0x08u, 0x08u},\r
-                       {0x09u, 0x40u},\r
-                       {0x0Au, 0x10u},\r
-                       {0x0Cu, 0x6Cu},\r
-                       {0x10u, 0x24u},\r
-                       {0x11u, 0x01u},\r
-                       {0x13u, 0x40u},\r
-                       {0x14u, 0x40u},\r
-                       {0x15u, 0x04u},\r
-                       {0x16u, 0x2Cu},\r
-                       {0x18u, 0x80u},\r
-                       {0x19u, 0x88u},\r
-                       {0x1Au, 0x2Fu},\r
-                       {0x1Bu, 0x61u},\r
-                       {0x1Cu, 0x6Cu},\r
-                       {0x1Du, 0x81u},\r
-                       {0x1Fu, 0x40u},\r
-                       {0x20u, 0x2Cu},\r
-                       {0x21u, 0x41u},\r
-                       {0x22u, 0x40u},\r
-                       {0x24u, 0xB1u},\r
-                       {0x25u, 0xE2u},\r
-                       {0x26u, 0x02u},\r
-                       {0x27u, 0x08u},\r
-                       {0x28u, 0x64u},\r
-                       {0x29u, 0x47u},\r
-                       {0x2Au, 0x08u},\r
-                       {0x2Bu, 0x98u},\r
-                       {0x2Du, 0x10u},\r
-                       {0x30u, 0x80u},\r
-                       {0x31u, 0x08u},\r
-                       {0x32u, 0x0Fu},\r
-                       {0x34u, 0x31u},\r
-                       {0x35u, 0x3Fu},\r
-                       {0x36u, 0x40u},\r
-                       {0x37u, 0xC0u},\r
-                       {0x39u, 0x20u},\r
-                       {0x3Au, 0x30u},\r
-                       {0x3Bu, 0x80u},\r
-                       {0x3Eu, 0x41u},\r
-                       {0x3Fu, 0x11u},\r
-                       {0x56u, 0x02u},\r
-                       {0x57u, 0x2Cu},\r
+                       {0xC2u, 0xEFu},\r
+                       {0xC4u, 0x4Cu},\r
+                       {0xCAu, 0x1Fu},\r
+                       {0xCCu, 0x76u},\r
+                       {0xCEu, 0xBEu},\r
+                       {0xD0u, 0x07u},\r
+                       {0xD2u, 0x0Cu},\r
+                       {0xD8u, 0x04u},\r
+                       {0xE0u, 0x10u},\r
+                       {0xE4u, 0x04u},\r
+                       {0x00u, 0x01u},\r
+                       {0x01u, 0x44u},\r
+                       {0x03u, 0x88u},\r
+                       {0x04u, 0x10u},\r
+                       {0x07u, 0x80u},\r
+                       {0x08u, 0xA2u},\r
+                       {0x0Au, 0x08u},\r
+                       {0x0Cu, 0x04u},\r
+                       {0x0Du, 0x99u},\r
+                       {0x0Fu, 0x22u},\r
+                       {0x12u, 0x40u},\r
+                       {0x13u, 0x70u},\r
+                       {0x14u, 0x01u},\r
+                       {0x17u, 0x07u},\r
+                       {0x18u, 0x07u},\r
+                       {0x19u, 0xAAu},\r
+                       {0x1Au, 0xD8u},\r
+                       {0x1Bu, 0x55u},\r
+                       {0x1Cu, 0x01u},\r
+                       {0x20u, 0x01u},\r
+                       {0x24u, 0x08u},\r
+                       {0x26u, 0x61u},\r
+                       {0x2Cu, 0x01u},\r
+                       {0x2Fu, 0x08u},\r
+                       {0x30u, 0xE0u},\r
+                       {0x31u, 0xF0u},\r
+                       {0x35u, 0x0Fu},\r
+                       {0x36u, 0x3Fu},\r
+                       {0x38u, 0x80u},\r
+                       {0x3Eu, 0x40u},\r
                        {0x58u, 0x04u},\r
                        {0x59u, 0x04u},\r
-                       {0x5Bu, 0x04u},\r
+                       {0x5Cu, 0x10u},\r
                        {0x5Fu, 0x01u},\r
-                       {0x80u, 0x06u},\r
-                       {0x82u, 0x09u},\r
-                       {0x84u, 0x30u},\r
-                       {0x86u, 0xC0u},\r
-                       {0x88u, 0xFFu},\r
-                       {0x8Cu, 0x05u},\r
-                       {0x8Eu, 0x0Au},\r
-                       {0x91u, 0x01u},\r
-                       {0x96u, 0xFFu},\r
-                       {0x9Au, 0xFFu},\r
-                       {0x9Cu, 0x0Fu},\r
-                       {0x9Eu, 0xF0u},\r
-                       {0xA0u, 0x03u},\r
-                       {0xA1u, 0x01u},\r
-                       {0xA2u, 0x0Cu},\r
-                       {0xA5u, 0x01u},\r
-                       {0xA8u, 0x50u},\r
-                       {0xAAu, 0xA0u},\r
-                       {0xACu, 0x60u},\r
-                       {0xADu, 0x01u},\r
-                       {0xAEu, 0x90u},\r
-                       {0xB4u, 0xFFu},\r
-                       {0xB5u, 0x01u},\r
-                       {0xB9u, 0x20u},\r
-                       {0xBEu, 0x10u},\r
-                       {0xBFu, 0x10u},\r
+                       {0x80u, 0xE4u},\r
+                       {0x81u, 0x80u},\r
+                       {0x86u, 0x75u},\r
+                       {0x87u, 0xFFu},\r
+                       {0x88u, 0x07u},\r
+                       {0x89u, 0x1Fu},\r
+                       {0x8Au, 0x10u},\r
+                       {0x8Bu, 0x20u},\r
+                       {0x8Cu, 0x64u},\r
+                       {0x8Du, 0x90u},\r
+                       {0x8Eu, 0x80u},\r
+                       {0x8Fu, 0x40u},\r
+                       {0x90u, 0x08u},\r
+                       {0x94u, 0x80u},\r
+                       {0x95u, 0xC0u},\r
+                       {0x96u, 0x64u},\r
+                       {0x97u, 0x04u},\r
+                       {0x98u, 0xA4u},\r
+                       {0x99u, 0xC0u},\r
+                       {0x9Au, 0x40u},\r
+                       {0x9Bu, 0x08u},\r
+                       {0x9Cu, 0x08u},\r
+                       {0x9Du, 0xC0u},\r
+                       {0x9Fu, 0x02u},\r
+                       {0xA0u, 0xE4u},\r
+                       {0xA1u, 0xC0u},\r
+                       {0xA3u, 0x01u},\r
+                       {0xA4u, 0x03u},\r
+                       {0xA6u, 0x70u},\r
+                       {0xA7u, 0x9Fu},\r
+                       {0xA8u, 0x40u},\r
+                       {0xA9u, 0x7Fu},\r
+                       {0xAAu, 0x02u},\r
+                       {0xABu, 0x80u},\r
+                       {0xACu, 0x24u},\r
+                       {0xAFu, 0x60u},\r
+                       {0xB0u, 0x80u},\r
+                       {0xB2u, 0x71u},\r
+                       {0xB4u, 0x07u},\r
+                       {0xB6u, 0x08u},\r
+                       {0xB7u, 0xFFu},\r
+                       {0xB8u, 0x80u},\r
+                       {0xBAu, 0x30u},\r
+                       {0xBEu, 0x01u},\r
+                       {0xBFu, 0x40u},\r
+                       {0xD4u, 0x40u},\r
+                       {0xD6u, 0x04u},\r
                        {0xD8u, 0x04u},\r
                        {0xD9u, 0x04u},\r
+                       {0xDBu, 0x04u},\r
                        {0xDFu, 0x01u},\r
-                       {0x00u, 0x92u},\r
-                       {0x01u, 0x04u},\r
-                       {0x02u, 0x40u},\r
-                       {0x05u, 0x20u},\r
-                       {0x06u, 0x0Au},\r
-                       {0x07u, 0x20u},\r
-                       {0x0Au, 0x06u},\r
-                       {0x0Bu, 0x20u},\r
-                       {0x0Du, 0x20u},\r
-                       {0x0Eu, 0x91u},\r
-                       {0x10u, 0x80u},\r
-                       {0x11u, 0x52u},\r
-                       {0x16u, 0x20u},\r
-                       {0x17u, 0x11u},\r
-                       {0x1Bu, 0x10u},\r
-                       {0x1Cu, 0x04u},\r
-                       {0x1Du, 0xA8u},\r
-                       {0x1Eu, 0x22u},\r
-                       {0x1Fu, 0x25u},\r
-                       {0x22u, 0x10u},\r
-                       {0x24u, 0x40u},\r
-                       {0x26u, 0x40u},\r
-                       {0x27u, 0x08u},\r
-                       {0x2Bu, 0x51u},\r
-                       {0x2Cu, 0x02u},\r
-                       {0x2Eu, 0x22u},\r
-                       {0x2Fu, 0x24u},\r
-                       {0x31u, 0x02u},\r
-                       {0x36u, 0x40u},\r
-                       {0x37u, 0x25u},\r
-                       {0x3Au, 0x04u},\r
-                       {0x3Bu, 0x08u},\r
-                       {0x3Du, 0x08u},\r
-                       {0x3Eu, 0x11u},\r
-                       {0x5Eu, 0xC0u},\r
-                       {0x67u, 0x80u},\r
-                       {0x6Du, 0x08u},\r
-                       {0x6Eu, 0x19u},\r
-                       {0x6Fu, 0x11u},\r
-                       {0x76u, 0x02u},\r
-                       {0x90u, 0x12u},\r
-                       {0x91u, 0x54u},\r
-                       {0x92u, 0x04u},\r
-                       {0x93u, 0xA0u},\r
-                       {0x94u, 0xE4u},\r
-                       {0x96u, 0x13u},\r
-                       {0x97u, 0x0Eu},\r
-                       {0x9Bu, 0x04u},\r
-                       {0x9Cu, 0x40u},\r
-                       {0x9Du, 0xA0u},\r
-                       {0x9Eu, 0x66u},\r
-                       {0x9Fu, 0x29u},\r
-                       {0xA3u, 0x40u},\r
-                       {0xA4u, 0x42u},\r
+                       {0x01u, 0x40u},\r
+                       {0x03u, 0x68u},\r
+                       {0x05u, 0x58u},\r
+                       {0x07u, 0x40u},\r
+                       {0x09u, 0x80u},\r
+                       {0x0Au, 0x28u},\r
+                       {0x0Bu, 0x80u},\r
+                       {0x0Du, 0x04u},\r
+                       {0x0Eu, 0x80u},\r
+                       {0x0Fu, 0x09u},\r
+                       {0x12u, 0x06u},\r
+                       {0x13u, 0x09u},\r
+                       {0x15u, 0x42u},\r
+                       {0x17u, 0x08u},\r
+                       {0x18u, 0x20u},\r
+                       {0x19u, 0x51u},\r
+                       {0x1Bu, 0x2Eu},\r
+                       {0x1Eu, 0x80u},\r
+                       {0x1Fu, 0x40u},\r
+                       {0x21u, 0x80u},\r
+                       {0x26u, 0x01u},\r
+                       {0x27u, 0x04u},\r
+                       {0x29u, 0x58u},\r
+                       {0x2Au, 0x02u},\r
+                       {0x2Eu, 0x40u},\r
+                       {0x32u, 0x14u},\r
+                       {0x33u, 0x40u},\r
+                       {0x34u, 0x02u},\r
+                       {0x36u, 0x01u},\r
+                       {0x37u, 0x14u},\r
+                       {0x38u, 0x24u},\r
+                       {0x39u, 0x42u},\r
+                       {0x3Du, 0x8Au},\r
+                       {0x61u, 0x28u},\r
+                       {0x62u, 0x40u},\r
+                       {0x63u, 0x40u},\r
+                       {0x87u, 0x40u},\r
+                       {0x8Au, 0x40u},\r
+                       {0x8Bu, 0x04u},\r
+                       {0x90u, 0x06u},\r
+                       {0x91u, 0x16u},\r
+                       {0x92u, 0x43u},\r
+                       {0x93u, 0x14u},\r
+                       {0x94u, 0x20u},\r
+                       {0x95u, 0x48u},\r
+                       {0x96u, 0x28u},\r
+                       {0x99u, 0x80u},\r
+                       {0x9Au, 0x01u},\r
+                       {0x9Bu, 0x38u},\r
+                       {0x9Cu, 0x08u},\r
+                       {0x9Du, 0x19u},\r
+                       {0x9Eu, 0x46u},\r
+                       {0x9Fu, 0x44u},\r
+                       {0xA0u, 0x04u},\r
+                       {0xA1u, 0x4Du},\r
+                       {0xA2u, 0x02u},\r
+                       {0xA7u, 0x14u},\r
+                       {0xABu, 0x04u},\r
+                       {0xAFu, 0x10u},\r
+                       {0xB7u, 0x21u},\r
+                       {0xC0u, 0xFFu},\r
+                       {0xC2u, 0xFFu},\r
+                       {0xC4u, 0xBFu},\r
+                       {0xCAu, 0x1Fu},\r
+                       {0xCCu, 0xEEu},\r
+                       {0xCEu, 0xDFu},\r
+                       {0xD8u, 0x0Fu},\r
+                       {0xE2u, 0x20u},\r
+                       {0xE8u, 0x01u},\r
+                       {0xEAu, 0x08u},\r
+                       {0x9Cu, 0x20u},\r
+                       {0x9Eu, 0x02u},\r
                        {0xA5u, 0x01u},\r
-                       {0xA6u, 0x55u},\r
-                       {0xAFu, 0x02u},\r
-                       {0xB5u, 0x08u},\r
-                       {0xC0u, 0xEFu},\r
-                       {0xC2u, 0xF7u},\r
-                       {0xC4u, 0x7Bu},\r
-                       {0xCAu, 0xFBu},\r
-                       {0xCCu, 0xF1u},\r
-                       {0xCEu, 0xE0u},\r
-                       {0xD8u, 0x80u},\r
-                       {0xE2u, 0x08u},\r
-                       {0xE8u, 0x08u},\r
-                       {0xEAu, 0x40u},\r
-                       {0x39u, 0x20u},\r
-                       {0x3Fu, 0x10u},\r
-                       {0x59u, 0x04u},\r
-                       {0x5Fu, 0x01u},\r
-                       {0x27u, 0x08u},\r
-                       {0x87u, 0x08u},\r
-                       {0x91u, 0x40u},\r
-                       {0x92u, 0x08u},\r
-                       {0x93u, 0x80u},\r
-                       {0xA1u, 0x40u},\r
-                       {0xE8u, 0x08u},\r
-                       {0x85u, 0x40u},\r
-                       {0x8Bu, 0x40u},\r
-                       {0x8Du, 0x40u},\r
-                       {0x91u, 0x40u},\r
-                       {0x93u, 0x80u},\r
-                       {0xA1u, 0x40u},\r
-                       {0xAEu, 0x04u},\r
-                       {0xE2u, 0xC0u},\r
-                       {0xE6u, 0x80u},\r
-                       {0x13u, 0x10u},\r
+                       {0xA6u, 0x04u},\r
+                       {0xA9u, 0x10u},\r
+                       {0xACu, 0x02u},\r
+                       {0xE0u, 0x80u},\r
+                       {0x82u, 0x04u},\r
+                       {0x8Cu, 0x20u},\r
+                       {0x9Cu, 0x20u},\r
+                       {0xA6u, 0x04u},\r
+                       {0xB2u, 0x02u},\r
+                       {0xB5u, 0x01u},\r
+                       {0xE0u, 0x20u},\r
+                       {0xE4u, 0x20u},\r
+                       {0xE8u, 0x90u},\r
+                       {0x13u, 0x40u},\r
                        {0x17u, 0x48u},\r
-                       {0x33u, 0x02u},\r
+                       {0x32u, 0x04u},\r
                        {0x36u, 0x80u},\r
                        {0x37u, 0x08u},\r
-                       {0x3Au, 0x01u},\r
-                       {0x3Bu, 0x10u},\r
-                       {0x3Cu, 0x80u},\r
-                       {0x3Eu, 0x08u},\r
+                       {0x38u, 0x01u},\r
+                       {0x3Bu, 0x40u},\r
+                       {0x3Eu, 0x28u},\r
                        {0x43u, 0x10u},\r
-                       {0x53u, 0x20u},\r
-                       {0x59u, 0x04u},\r
-                       {0x61u, 0x10u},\r
-                       {0x66u, 0x40u},\r
-                       {0x67u, 0x08u},\r
-                       {0x89u, 0x08u},\r
-                       {0x8Au, 0x40u},\r
+                       {0x58u, 0x01u},\r
+                       {0x5Fu, 0x20u},\r
+                       {0x63u, 0x04u},\r
+                       {0x65u, 0x40u},\r
+                       {0x67u, 0x20u},\r
+                       {0x85u, 0x40u},\r
+                       {0x89u, 0x01u},\r
+                       {0x8Cu, 0x01u},\r
                        {0xC4u, 0xE0u},\r
                        {0xCCu, 0xE0u},\r
                        {0xCEu, 0xF0u},\r
                        {0xD0u, 0x10u},\r
-                       {0xD4u, 0x20u},\r
-                       {0xD6u, 0xC0u},\r
+                       {0xD6u, 0xE0u},\r
                        {0xD8u, 0xC0u},\r
-                       {0x32u, 0x04u},\r
+                       {0xE6u, 0x10u},\r
+                       {0x30u, 0x04u},\r
                        {0x33u, 0x40u},\r
-                       {0x34u, 0x08u},\r
-                       {0x35u, 0x80u},\r
+                       {0x36u, 0x20u},\r
+                       {0x37u, 0x04u},\r
                        {0x3Au, 0x40u},\r
-                       {0x50u, 0x80u},\r
-                       {0x52u, 0x02u},\r
+                       {0x53u, 0x20u},\r
                        {0x55u, 0x08u},\r
-                       {0x66u, 0x80u},\r
-                       {0x80u, 0x80u},\r
-                       {0x82u, 0x02u},\r
-                       {0x84u, 0x08u},\r
-                       {0x8Au, 0x80u},\r
-                       {0x97u, 0x08u},\r
+                       {0x58u, 0x80u},\r
+                       {0x5Du, 0x01u},\r
+                       {0x84u, 0x01u},\r
+                       {0x86u, 0x64u},\r
+                       {0x91u, 0x01u},\r
+                       {0x96u, 0x08u},\r
+                       {0x97u, 0x04u},\r
                        {0x9Bu, 0x40u},\r
-                       {0x9Du, 0x14u},\r
+                       {0x9Cu, 0x01u},\r
                        {0x9Eu, 0x08u},\r
                        {0x9Fu, 0x10u},\r
                        {0xA1u, 0x08u},\r
-                       {0xA4u, 0x40u},\r
+                       {0xA3u, 0x20u},\r
                        {0xA6u, 0x80u},\r
-                       {0xA7u, 0x22u},\r
-                       {0xB6u, 0x01u},\r
+                       {0xABu, 0x20u},\r
+                       {0xADu, 0x08u},\r
+                       {0xB3u, 0x10u},\r
+                       {0xB6u, 0x20u},\r
+                       {0xB7u, 0x20u},\r
                        {0xCCu, 0xF0u},\r
                        {0xCEu, 0x10u},\r
                        {0xD4u, 0xE0u},\r
                        {0xD6u, 0x80u},\r
-                       {0xE2u, 0xA0u},\r
-                       {0xE6u, 0x10u},\r
+                       {0xE2u, 0x50u},\r
+                       {0xE6u, 0x50u},\r
+                       {0xEAu, 0x40u},\r
+                       {0xEEu, 0x20u},\r
                        {0x12u, 0x80u},\r
-                       {0x85u, 0x80u},\r
-                       {0x8Cu, 0x80u},\r
-                       {0x8Du, 0x04u},\r
-                       {0x96u, 0x08u},\r
-                       {0x9Du, 0x94u},\r
-                       {0x9Eu, 0x48u},\r
-                       {0x9Fu, 0x10u},\r
+                       {0x63u, 0x01u},\r
+                       {0x97u, 0x04u},\r
+                       {0x9Cu, 0x84u},\r
+                       {0x9Eu, 0x08u},\r
+                       {0x9Fu, 0x14u},\r
                        {0xA6u, 0x80u},\r
-                       {0xA7u, 0x22u},\r
-                       {0xACu, 0x40u},\r
-                       {0xAFu, 0x04u},\r
                        {0xC4u, 0x10u},\r
-                       {0xE2u, 0x10u},\r
-                       {0xEAu, 0x40u},\r
-                       {0xEEu, 0x10u},\r
-                       {0x83u, 0x10u},\r
-                       {0x86u, 0x44u},\r
-                       {0x8Fu, 0x40u},\r
-                       {0x96u, 0x08u},\r
-                       {0x9Du, 0x10u},\r
-                       {0x9Eu, 0x48u},\r
-                       {0x9Fu, 0x10u},\r
-                       {0xA0u, 0x80u},\r
-                       {0xA7u, 0x22u},\r
-                       {0xE2u, 0x30u},\r
-                       {0xE6u, 0x10u},\r
-                       {0x08u, 0x80u},\r
-                       {0x0Bu, 0x20u},\r
-                       {0x0Cu, 0x01u},\r
-                       {0x10u, 0x10u},\r
-                       {0x14u, 0x40u},\r
-                       {0x50u, 0x10u},\r
-                       {0x53u, 0x02u},\r
-                       {0x54u, 0x02u},\r
-                       {0x56u, 0x20u},\r
-                       {0x8Bu, 0x18u},\r
-                       {0x8Eu, 0x04u},\r
+                       {0xD6u, 0x40u},\r
+                       {0x83u, 0x14u},\r
+                       {0x84u, 0x04u},\r
+                       {0x85u, 0x80u},\r
+                       {0x97u, 0x04u},\r
+                       {0x9Cu, 0x04u},\r
+                       {0x9Eu, 0x08u},\r
+                       {0x9Fu, 0x14u},\r
+                       {0xB4u, 0x80u},\r
+                       {0xB7u, 0x01u},\r
+                       {0xE2u, 0xB0u},\r
+                       {0xE6u, 0x40u},\r
+                       {0x08u, 0x02u},\r
+                       {0x0Bu, 0x08u},\r
+                       {0x0Fu, 0x80u},\r
+                       {0x12u, 0x80u},\r
+                       {0x17u, 0x02u},\r
+                       {0x52u, 0x10u},\r
+                       {0x57u, 0x80u},\r
+                       {0x58u, 0x10u},\r
+                       {0x5Eu, 0x20u},\r
+                       {0x8Au, 0x10u},\r
                        {0xC2u, 0x0Eu},\r
                        {0xC4u, 0x0Cu},\r
                        {0xD4u, 0x07u},\r
                        {0xD6u, 0x04u},\r
-                       {0xE2u, 0x04u},\r
-                       {0xE6u, 0x09u},\r
-                       {0x01u, 0x01u},\r
-                       {0x02u, 0x04u},\r
-                       {0x07u, 0x48u},\r
-                       {0x0Bu, 0x41u},\r
-                       {0x0Cu, 0x82u},\r
-                       {0x87u, 0x04u},\r
-                       {0x94u, 0x20u},\r
-                       {0x97u, 0x01u},\r
-                       {0x9Eu, 0x04u},\r
-                       {0x9Fu, 0x08u},\r
-                       {0xA7u, 0x02u},\r
-                       {0xA8u, 0x02u},\r
-                       {0xABu, 0x01u},\r
-                       {0xACu, 0x80u},\r
-                       {0xAEu, 0x20u},\r
-                       {0xB0u, 0x51u},\r
+                       {0xE0u, 0x01u},\r
+                       {0x00u, 0x40u},\r
+                       {0x01u, 0x08u},\r
+                       {0x04u, 0x08u},\r
+                       {0x05u, 0x20u},\r
+                       {0x08u, 0x08u},\r
+                       {0x09u, 0x40u},\r
+                       {0x0Fu, 0x21u},\r
+                       {0x80u, 0x04u},\r
+                       {0x83u, 0x40u},\r
+                       {0x86u, 0x01u},\r
+                       {0x87u, 0x10u},\r
+                       {0x88u, 0x08u},\r
+                       {0x89u, 0x40u},\r
+                       {0x93u, 0x08u},\r
+                       {0x98u, 0x02u},\r
+                       {0x9Bu, 0x02u},\r
+                       {0x9Cu, 0x10u},\r
+                       {0x9Du, 0x08u},\r
+                       {0x9Eu, 0x10u},\r
+                       {0xA3u, 0x40u},\r
+                       {0xA7u, 0x80u},\r
+                       {0xA9u, 0x08u},\r
+                       {0xB2u, 0x80u},\r
                        {0xC0u, 0x0Fu},\r
                        {0xC2u, 0x0Fu},\r
-                       {0xEAu, 0x05u},\r
-                       {0xEEu, 0x04u},\r
-                       {0x84u, 0x04u},\r
-                       {0x87u, 0x40u},\r
-                       {0x8Cu, 0x10u},\r
-                       {0x91u, 0x01u},\r
-                       {0x93u, 0x40u},\r
-                       {0x94u, 0x20u},\r
-                       {0x97u, 0x08u},\r
-                       {0x9Bu, 0x40u},\r
-                       {0xA7u, 0x02u},\r
-                       {0xACu, 0x80u},\r
-                       {0xB4u, 0x02u},\r
-                       {0xE4u, 0x02u},\r
-                       {0xEEu, 0x02u},\r
-                       {0x08u, 0x04u},\r
-                       {0x0Bu, 0x08u},\r
-                       {0x0Eu, 0x21u},\r
-                       {0x86u, 0x11u},\r
-                       {0x97u, 0x08u},\r
-                       {0x9Cu, 0x04u},\r
-                       {0xA7u, 0x02u},\r
-                       {0xB1u, 0x01u},\r
-                       {0xB7u, 0x40u},\r
+                       {0xE2u, 0x01u},\r
+                       {0xE6u, 0x04u},\r
+                       {0xEAu, 0x01u},\r
+                       {0x89u, 0x20u},\r
+                       {0x96u, 0x01u},\r
+                       {0x97u, 0x20u},\r
+                       {0x99u, 0x20u},\r
+                       {0x9Bu, 0x02u},\r
+                       {0x9Cu, 0x10u},\r
+                       {0x9Eu, 0x10u},\r
+                       {0xA7u, 0x80u},\r
+                       {0xA8u, 0x42u},\r
+                       {0xB3u, 0x04u},\r
+                       {0xB7u, 0x11u},\r
+                       {0xE2u, 0x04u},\r
+                       {0xEAu, 0x09u},\r
+                       {0xEEu, 0x08u},\r
+                       {0x0Bu, 0x21u},\r
+                       {0x0Cu, 0x02u},\r
+                       {0x0Eu, 0x01u},\r
+                       {0x83u, 0x01u},\r
+                       {0x84u, 0x02u},\r
+                       {0x96u, 0x01u},\r
+                       {0x97u, 0x20u},\r
+                       {0x9Cu, 0x10u},\r
+                       {0x9Eu, 0x10u},\r
+                       {0xA7u, 0x80u},\r
+                       {0xABu, 0x02u},\r
                        {0xC2u, 0x0Fu},\r
-                       {0xEAu, 0x08u},\r
-                       {0xEEu, 0x01u},\r
-                       {0x67u, 0x80u},\r
-                       {0x87u, 0x40u},\r
-                       {0x9Eu, 0x08u},\r
-                       {0xA0u, 0x80u},\r
-                       {0xA3u, 0x40u},\r
-                       {0xA7u, 0x22u},\r
-                       {0xB5u, 0x10u},\r
-                       {0xD8u, 0x80u},\r
-                       {0xE2u, 0x10u},\r
-                       {0x07u, 0x40u},\r
-                       {0x50u, 0x80u},\r
-                       {0x57u, 0x40u},\r
-                       {0x83u, 0x40u},\r
-                       {0x87u, 0x02u},\r
-                       {0x8Au, 0x08u},\r
+                       {0x86u, 0x08u},\r
+                       {0x8Bu, 0x08u},\r
+                       {0x97u, 0x04u},\r
                        {0x9Eu, 0x08u},\r
-                       {0xA0u, 0x80u},\r
-                       {0xA3u, 0x40u},\r
-                       {0xA7u, 0x02u},\r
-                       {0xABu, 0x20u},\r
+                       {0xA1u, 0x80u},\r
+                       {0xE6u, 0x40u},\r
+                       {0x04u, 0x08u},\r
+                       {0x51u, 0x80u},\r
+                       {0x57u, 0x08u},\r
+                       {0x87u, 0x04u},\r
+                       {0x8Cu, 0x04u},\r
+                       {0x97u, 0x04u},\r
+                       {0xA1u, 0x80u},\r
+                       {0xA3u, 0x08u},\r
                        {0xC0u, 0x20u},\r
                        {0xD4u, 0x60u},\r
-                       {0xE2u, 0x10u},\r
-                       {0xE4u, 0x80u},\r
-                       {0xEEu, 0x20u},\r
-                       {0xAFu, 0x02u},\r
+                       {0xE2u, 0x40u},\r
+                       {0x8Bu, 0x80u},\r
+                       {0x9Cu, 0x10u},\r
+                       {0x9Eu, 0x10u},\r
+                       {0xA7u, 0x80u},\r
+                       {0xE0u, 0x01u},\r
                        {0x01u, 0x02u},\r
-                       {0x89u, 0x02u},\r
+                       {0x88u, 0x10u},\r
+                       {0x8Au, 0x10u},\r
+                       {0x8Du, 0x02u},\r
+                       {0x9Cu, 0x10u},\r
+                       {0x9Eu, 0x10u},\r
                        {0xC0u, 0x08u},\r
-                       {0xE2u, 0x01u},\r
-                       {0x10u, 0x01u},\r
-                       {0x11u, 0x01u},\r
-                       {0x1Au, 0x01u},\r
-                       {0x1Bu, 0x01u},\r
+                       {0xE0u, 0x04u},\r
+                       {0xE2u, 0x02u},\r
+                       {0xE4u, 0x04u},\r
+                       {0x10u, 0x03u},\r
+                       {0x1Au, 0x03u},\r
                        {0x00u, 0xFDu},\r
                        {0x01u, 0xAFu},\r
                        {0x02u, 0x0Au},\r
@@ -2027,18 +1962,30 @@ void cyfitter_cfg(void)
                        {(void CYFAR *)(CYREG_TMR0_CFG0), 12u},\r
                        {(void CYFAR *)(CYREG_PRT1_DR), 16u},\r
                        {(void CYFAR *)(CYDEV_UCFG_B0_P0_U0_BASE), 4096u},\r
-                       {(void CYFAR *)(CYDEV_UCFG_B1_P2_U0_BASE), 2048u},\r
+                       {(void CYFAR *)(CYDEV_UCFG_B1_P2_U1_BASE), 1920u},\r
                        {(void CYFAR *)(CYDEV_UCFG_DSI0_BASE), 2560u},\r
                        {(void CYFAR *)(CYDEV_UCFG_DSI12_BASE), 512u},\r
                        {(void CYFAR *)(CYREG_BCTL1_MDCLK_EN), 16u},\r
                };\r
 \r
+               /* UDB_1_0_0_CONFIG Address: CYDEV_UCFG_B1_P2_U0_BASE Size (bytes): 128 */\r
+               static const uint8 CYCODE BS_UDB_1_0_0_CONFIG_VAL[] = {\r
+                       0x00u, 0x00u, 0xFFu, 0x00u, 0x50u, 0x03u, 0xA0u, 0x04u, 0x09u, 0x28u, 0x06u, 0x50u, 0x90u, 0x05u, 0x60u, 0x02u, \r
+                       0x03u, 0x00u, 0x0Cu, 0x00u, 0x0Fu, 0x00u, 0xF0u, 0x08u, 0x00u, 0x04u, 0xFFu, 0x03u, 0x00u, 0x00u, 0xFFu, 0x00u, \r
+                       0x05u, 0x00u, 0x0Au, 0x10u, 0x30u, 0x00u, 0xC0u, 0x40u, 0x00u, 0x01u, 0x00u, 0x06u, 0x00u, 0x00u, 0x00u, 0x20u, \r
+                       0x00u, 0x60u, 0x00u, 0x18u, 0xFFu, 0x07u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x20u, 0x00u, 0x00u, 0x10u, 0x05u, \r
+                       0x26u, 0x03u, 0x40u, 0x00u, 0x05u, 0xEBu, 0xFDu, 0x0Cu, 0x1Fu, 0xFFu, 0xFFu, 0xFFu, 0x22u, 0x00u, 0xF0u, 0x08u, \r
+                       0x04u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x02u, 0x24u, 0x04u, 0x04u, 0x04u, 0x04u, 0x00u, 0x00u, 0x00u, 0x01u, \r
+                       0x00u, 0x00u, 0xC0u, 0x00u, 0x40u, 0x01u, 0x10u, 0x11u, 0xC0u, 0x01u, 0x00u, 0x11u, 0x40u, 0x01u, 0x40u, 0x01u, \r
+                       0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
+\r
                /* UCFG_BCTL0 Address: CYREG_BCTL0_MDCLK_EN Size (bytes): 16 */\r
                static const uint8 CYCODE BS_UCFG_BCTL0_VAL[] = {\r
-                       0x03u, 0x01u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x03u, 0x01u, 0x03u, 0x01u, 0x02u, 0x01u, 0x02u, 0x01u};\r
+                       0x03u, 0x01u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x03u, 0x01u, 0x03u, 0x01u, 0x00u, 0x01u, 0x02u, 0x01u};\r
 \r
                static const cfg_memcpy_t CYCODE cfg_memcpy_list [] = {\r
                        /* dest, src, size */\r
+                       {(void CYFAR *)(CYDEV_UCFG_B1_P2_U0_BASE), BS_UDB_1_0_0_CONFIG_VAL, 128u},\r
                        {(void CYFAR *)(CYREG_BCTL0_MDCLK_EN), BS_UCFG_BCTL0_VAL, 16u},\r
                };\r
 \r
index c2cf04a..4d3ef9e 100644 (file)
 /* SCSI_Parity_Error */\r
 .set SCSI_Parity_Error_sts_sts_reg__0__MASK, 0x01\r
 .set SCSI_Parity_Error_sts_sts_reg__0__POS, 0\r
-.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB07_08_ACTL\r
-.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB07_08_ST\r
+.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB06_07_ACTL\r
+.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB06_07_ST\r
 .set SCSI_Parity_Error_sts_sts_reg__MASK, 0x01\r
-.set SCSI_Parity_Error_sts_sts_reg__MASK_REG, CYREG_B0_UDB07_MSK\r
-.set SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB07_ACTL\r
-.set SCSI_Parity_Error_sts_sts_reg__STATUS_REG, CYREG_B0_UDB07_ST\r
+.set SCSI_Parity_Error_sts_sts_reg__MASK_REG, CYREG_B0_UDB06_MSK\r
+.set SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB06_ACTL\r
+.set SCSI_Parity_Error_sts_sts_reg__STATUS_REG, CYREG_B0_UDB06_ST\r
 \r
 /* USBFS_bus_reset */\r
 .set USBFS_bus_reset__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
 /* SCSI_CTL_PHASE */\r
 .set SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK, 0x01\r
 .set SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS, 0\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_03_ACTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB02_03_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB02_03_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB02_03_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB02_03_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB02_03_MSK\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB02_03_MSK\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB02_03_MSK\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB02_03_MSK\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB00_01_ACTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB00_01_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB00_01_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB00_01_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB00_01_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB00_01_MSK\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB00_01_MSK\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB00_01_MSK\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB00_01_MSK\r
 .set SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK, 0x02\r
 .set SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS, 1\r
 .set SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK, 0x04\r
 .set SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS, 2\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_ACTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB02_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB02_ST_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB02_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB02_ST_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB00_ACTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB00_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB00_ST_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB00_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB00_ST_CTL\r
 .set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK, 0x07\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB02_MSK\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB00_MSK_ACTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB00_MSK\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB00_MSK_ACTL\r
 \r
 /* SCSI_Filtered */\r
 .set SCSI_Filtered_sts_sts_reg__0__MASK, 0x01\r
 .set SCSI_Filtered_sts_sts_reg__0__POS, 0\r
-.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB00_01_ACTL\r
-.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB00_01_ST\r
+.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB14_15_ACTL\r
+.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB14_15_ST\r
 .set SCSI_Filtered_sts_sts_reg__1__MASK, 0x02\r
 .set SCSI_Filtered_sts_sts_reg__1__POS, 1\r
 .set SCSI_Filtered_sts_sts_reg__2__MASK, 0x04\r
 .set SCSI_Filtered_sts_sts_reg__4__MASK, 0x10\r
 .set SCSI_Filtered_sts_sts_reg__4__POS, 4\r
 .set SCSI_Filtered_sts_sts_reg__MASK, 0x1F\r
-.set SCSI_Filtered_sts_sts_reg__MASK_REG, CYREG_B0_UDB00_MSK\r
-.set SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB00_ACTL\r
-.set SCSI_Filtered_sts_sts_reg__STATUS_REG, CYREG_B0_UDB00_ST\r
+.set SCSI_Filtered_sts_sts_reg__MASK_REG, CYREG_B0_UDB14_MSK\r
+.set SCSI_Filtered_sts_sts_reg__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB14_MSK_ACTL\r
+.set SCSI_Filtered_sts_sts_reg__PER_ST_AUX_CTL_REG, CYREG_B0_UDB14_MSK_ACTL\r
+.set SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB14_ACTL\r
+.set SCSI_Filtered_sts_sts_reg__STATUS_CNT_REG, CYREG_B0_UDB14_ST_CTL\r
+.set SCSI_Filtered_sts_sts_reg__STATUS_CONTROL_REG, CYREG_B0_UDB14_ST_CTL\r
+.set SCSI_Filtered_sts_sts_reg__STATUS_REG, CYREG_B0_UDB14_ST\r
 \r
 /* SCSI_Out_Bits */\r
 .set SCSI_Out_Bits_Sync_ctrl_reg__0__MASK, 0x01\r
 .set SCSI_Out_Bits_Sync_ctrl_reg__0__POS, 0\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB03_04_ACTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB03_04_CTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB03_04_CTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB03_04_CTL\r
-.set