1 /*******************************************************************************
6 * This file contains API to enable firmware control of a Pins component.
10 ********************************************************************************
11 * Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
12 * You may use this file only in accordance with the license, terms, conditions,
13 * disclaimers, and limitations in the end user license agreement accompanying
14 * the software package with which this file was provided.
15 *******************************************************************************/
20 /* APIs are not generated for P15[7:6] on PSoC 5 */
22 nNOR_CS__PORT == 15 && ((nNOR_CS__MASK & 0xC0) != 0))
25 /*******************************************************************************
26 * Function Name: nNOR_CS_Write
27 ****************************************************************************//**
29 * \brief Writes the value to the physical port (data output register), masking
30 * and shifting the bits appropriately.
32 * The data output register controls the signal applied to the physical pin in
33 * conjunction with the drive mode parameter. This function avoids changing
34 * other bits in the port by using the appropriate method (read-modify-write or
37 * <b>Note</b> This function should not be used on a hardware digital output pin
38 * as it is driven by the hardware signal attached to it.
41 * Value to write to the component instance.
47 * If you use read-modify-write operations that are not atomic; the Interrupt
48 * Service Routines (ISR) can cause corruption of this function. An ISR that
49 * interrupts this function and performs writes to the Pins component data
50 * register can cause corrupted port data. To avoid this issue, you should
51 * either use the Per-Pin APIs (primary method) or disable interrupts around
55 * \snippet nNOR_CS_SUT.c usage_nNOR_CS_Write
56 *******************************************************************************/
57 void nNOR_CS_Write(uint8 value)
59 uint8 staticBits = (nNOR_CS_DR & (uint8)(~nNOR_CS_MASK));
60 nNOR_CS_DR = staticBits | ((uint8)(value << nNOR_CS_SHIFT) & nNOR_CS_MASK);
64 /*******************************************************************************
65 * Function Name: nNOR_CS_SetDriveMode
66 ****************************************************************************//**
68 * \brief Sets the drive mode for each of the Pins component's pins.
70 * <b>Note</b> This affects all pins in the Pins component instance. Use the
71 * Per-Pin APIs if you wish to control individual pin's drive modes.
74 * Mode for the selected signals. Valid options are documented in
81 * If you use read-modify-write operations that are not atomic, the ISR can
82 * cause corruption of this function. An ISR that interrupts this function
83 * and performs writes to the Pins component Drive Mode registers can cause
84 * corrupted port data. To avoid this issue, you should either use the Per-Pin
85 * APIs (primary method) or disable interrupts around this function.
88 * \snippet nNOR_CS_SUT.c usage_nNOR_CS_SetDriveMode
89 *******************************************************************************/
90 void nNOR_CS_SetDriveMode(uint8 mode)
92 CyPins_SetPinDriveMode(nNOR_CS_0, mode);
96 /*******************************************************************************
97 * Function Name: nNOR_CS_Read
98 ****************************************************************************//**
100 * \brief Reads the associated physical port (pin status register) and masks
101 * the required bits according to the width and bit position of the component
104 * The pin's status register returns the current logic level present on the
108 * The current value for the pins in the component as a right justified number.
111 * \snippet nNOR_CS_SUT.c usage_nNOR_CS_Read
112 *******************************************************************************/
113 uint8 nNOR_CS_Read(void)
115 return (nNOR_CS_PS & nNOR_CS_MASK) >> nNOR_CS_SHIFT;
119 /*******************************************************************************
120 * Function Name: nNOR_CS_ReadDataReg
121 ****************************************************************************//**
123 * \brief Reads the associated physical port's data output register and masks
124 * the correct bits according to the width and bit position of the component
127 * The data output register controls the signal applied to the physical pin in
128 * conjunction with the drive mode parameter. This is not the same as the
129 * preferred nNOR_CS_Read() API because the
130 * nNOR_CS_ReadDataReg() reads the data register instead of the status
131 * register. For output pins this is a useful function to determine the value
132 * just written to the pin.
135 * The current value of the data register masked and shifted into a right
136 * justified number for the component instance.
139 * \snippet nNOR_CS_SUT.c usage_nNOR_CS_ReadDataReg
140 *******************************************************************************/
141 uint8 nNOR_CS_ReadDataReg(void)
143 return (nNOR_CS_DR & nNOR_CS_MASK) >> nNOR_CS_SHIFT;
147 /* If interrupt is connected for this Pins component */
148 #if defined(nNOR_CS_INTSTAT)
150 /*******************************************************************************
151 * Function Name: nNOR_CS_SetInterruptMode
152 ****************************************************************************//**
154 * \brief Configures the interrupt mode for each of the Pins component's
155 * pins. Alternatively you may set the interrupt mode for all the pins
156 * specified in the Pins component.
158 * <b>Note</b> The interrupt is port-wide and therefore any enabled pin
159 * interrupt may trigger it.
162 * The pin position as listed in the Pins component. You may OR these to be
163 * able to configure the interrupt mode of multiple pins within a Pins
164 * component. Or you may use nNOR_CS_INTR_ALL to configure the
165 * interrupt mode of all the pins in the Pins component.
166 * - nNOR_CS_0_INTR (First pin in the list)
167 * - nNOR_CS_1_INTR (Second pin in the list)
169 * - nNOR_CS_INTR_ALL (All pins in Pins component)
172 * Interrupt mode for the selected pins. Valid options are documented in
179 * It is recommended that the interrupt be disabled before calling this
180 * function to avoid unintended interrupt requests. Note that the interrupt
181 * type is port wide, and therefore will trigger for any enabled pin on the
185 * \snippet nNOR_CS_SUT.c usage_nNOR_CS_SetInterruptMode
186 *******************************************************************************/
187 void nNOR_CS_SetInterruptMode(uint16 position, uint16 mode)
189 if((position & nNOR_CS_0_INTR) != 0u)
191 nNOR_CS_0_INTTYPE_REG = (uint8)mode;
196 /*******************************************************************************
197 * Function Name: nNOR_CS_ClearInterrupt
198 ****************************************************************************//**
200 * \brief Clears any active interrupts attached with the component and returns
201 * the value of the interrupt status register allowing determination of which
202 * pins generated an interrupt event.
205 * The right-shifted current value of the interrupt status register. Each pin
206 * has one bit set if it generated an interrupt event. For example, bit 0 is
207 * for pin 0 and bit 1 is for pin 1 of the Pins component.
210 * Clears all bits of the physical port's interrupt status register, not just
211 * those associated with the Pins component.
214 * \snippet nNOR_CS_SUT.c usage_nNOR_CS_ClearInterrupt
215 *******************************************************************************/
216 uint8 nNOR_CS_ClearInterrupt(void)
218 return (nNOR_CS_INTSTAT & nNOR_CS_MASK) >> nNOR_CS_SHIFT;
221 #endif /* If Interrupts Are Enabled for this Pins component */
223 #endif /* CY_PSOC5A... */