20150x0x 4.5
- Fix bug in SCSI MODE SENSE that returned the wrong mode type
- Fixes CDROM emulation
+ - Added selection delay parameter. This should be set to 1ms for older
+ SCSI1 hardware, or 0ms for SCSI2 and Mac Plus.
+ - Upgraded to wxWidgets 3.0.2
+ - Fixed stability/performance issue for sector sizes above 512
+ - Fixed bug that prevented the dvice working after "ejecting" a drive
+ - Upgraded to Cypress PSoC Creator 3.3
+ - Added experimental caching option. This provides a 2x speed up for
+ sequential single-sector writes. It is disabled by default.
+ - Disabled SCSI Disconnect support by default. There's now an option
+ in scsi2sd-util to enable it. It should be left off unless you have
+ a very good reason to enable it.
20150813 4.4
- Added configuration option to allow SCSI2 mode. This option is OFF by
#include "scsi.h"\r
#include "scsiPhy.h"\r
#include "disk.h"\r
+#include "trace.h"\r
\r
#include "../../include/scsi2sd.h"\r
#include "../../include/hidpacket.h"\r
\r
#include <string.h>\r
\r
-static const uint16_t FIRMWARE_VERSION = 0x0442;\r
+static const uint16_t FIRMWARE_VERSION = 0x0450;\r
\r
// 1 flash row\r
static const uint8_t DEFAULT_CONFIG[256] =\r
static int usbDebugEpState;\r
static int usbReady;\r
\r
-void configInit()\r
+static void initBoardConfig(BoardConfig* config) {\r
+ memcpy(\r
+ config,\r
+ (\r
+ CY_FLASH_BASE +\r
+ (CY_FLASH_SIZEOF_ARRAY * (size_t) SCSI_CONFIG_ARRAY) +\r
+ (CY_FLASH_SIZEOF_ROW * SCSI_CONFIG_BOARD_ROW)\r
+ ),\r
+ sizeof(BoardConfig));\r
+\r
+ if (memcmp(config->magic, "BCFG", 4)) {\r
+ // Set a default from the deprecated flags, or 0 if\r
+ // there is no initial config.\r
+ config->flags = getConfigByIndex(0)->flagsDEPRECATED;\r
+\r
+ config->selectionDelay = 255; // auto\r
+ }\r
+}\r
+\r
+void configInit(BoardConfig* config)\r
{\r
// The USB block will be powered by an internal 3.3V regulator.\r
// The PSoC must be operating between 4.6V and 5V for the regulator\r
CySetTemp();\r
CyWriteRowData(SCSI_CONFIG_ARRAY, SCSI_CONFIG_0_ROW, DEFAULT_CONFIG);\r
}\r
+\r
+ initBoardConfig(config);\r
}\r
\r
static void\r
// Be very careful not to overwrite the bootloader or other\r
// code\r
if ((flashArray != SCSI_CONFIG_ARRAY) ||\r
- (flashRow < SCSI_CONFIG_0_ROW) ||\r
+ (flashRow < SCSI_CONFIG_BOARD_ROW) ||\r
(flashRow >= SCSI_CONFIG_3_ROW + SCSI_CONFIG_ROWS))\r
{\r
uint8_t response[] = { CONFIG_STATUS_ERR};\r
hidBuffer[27] = scsiDev.lastSenseASC >> 8;\r
hidBuffer[28] = scsiDev.lastSenseASC;\r
hidBuffer[29] = scsiReadDBxPins();\r
+ hidBuffer[30] = LastTrace;\r
\r
hidBuffer[58] = sdDev.capacity >> 24;\r
hidBuffer[59] = sdDev.capacity >> 16;\r
#include "device.h"\r
#include "scsi2sd.h"\r
\r
-void configInit(void);\r
+void configInit(BoardConfig* config);\r
void debugInit(void);\r
void configPoll(void);\r
void configSave(int scsiId, uint16_t byesPerSector);\r
CyDelay(10);\r
}\r
\r
+ uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;\r
+\r
if (unlikely(blockDev.state & DISK_WP) ||\r
unlikely(scsiDev.target->cfg->deviceType == CONFIG_OPTICAL))\r
\r
else if (unlikely(((uint64) lba) + blocks >\r
getScsiCapacity(\r
scsiDev.target->cfg->sdSectorStart,\r
- scsiDev.target->liveCfg.bytesPerSector,\r
+ bytesPerSector,\r
scsiDev.target->cfg->scsiSectors\r
)\r
))\r
}\r
else\r
{\r
- transfer.dir = TRANSFER_WRITE;\r
transfer.lba = lba;\r
transfer.blocks = blocks;\r
transfer.currentBlock = 0;\r
scsiDev.phase = DATA_OUT;\r
- scsiDev.dataLen = scsiDev.target->liveCfg.bytesPerSector;\r
- scsiDev.dataPtr = scsiDev.target->liveCfg.bytesPerSector;\r
+ scsiDev.dataLen = bytesPerSector;\r
+ scsiDev.dataPtr = bytesPerSector;\r
\r
// No need for single-block writes atm. Overhead of the\r
// multi-block write is minimal.\r
transfer.multiBlock = 1;\r
\r
- sdWriteMultiSectorPrep();\r
+\r
+ uint32_t sdLBA =\r
+ SCSISector2SD(\r
+ scsiDev.target->cfg->sdSectorStart,\r
+ bytesPerSector,\r
+ lba);\r
+ uint32_t sdBlocks = blocks * SDSectorsPerSCSISector(bytesPerSector);\r
+ sdWriteMultiSectorPrep(sdLBA, sdBlocks);\r
}\r
}\r
\r
}\r
else\r
{\r
- transfer.dir = TRANSFER_READ;\r
transfer.lba = lba;\r
transfer.blocks = blocks;\r
transfer.currentBlock = 0;\r
scsiDev.phase = DATA_IN;\r
scsiDev.dataLen = 0; // No data yet\r
\r
- if ((blocks * SDSectorsPerSCSISector(scsiDev.target->liveCfg.bytesPerSector) == 1) ||\r
+ uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;\r
+ uint32_t sdSectorPerSCSISector = SDSectorsPerSCSISector(bytesPerSector);\r
+ uint32_t sdSectors =\r
+ blocks * sdSectorPerSCSISector;\r
+\r
+ if ((\r
+ (sdSectors == 1) &&\r
+ !(scsiDev.boardCfg.flags & CONFIG_ENABLE_CACHE)\r
+ ) ||\r
unlikely(((uint64) lba) + blocks == capacity)\r
)\r
{\r
else\r
{\r
transfer.multiBlock = 1;\r
- sdReadMultiSectorPrep();\r
+\r
+ uint32_t sdLBA =\r
+ SCSISector2SD(\r
+ scsiDev.target->cfg->sdSectorStart,\r
+ bytesPerSector,\r
+ lba);\r
+\r
+ sdReadMultiSectorPrep(sdLBA, sdSectors);\r
}\r
}\r
}\r
\r
void scsiDiskPoll()\r
{\r
+ uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;\r
+\r
if (scsiDev.phase == DATA_IN &&\r
transfer.currentBlock != transfer.blocks)\r
{\r
scsiEnterPhase(DATA_IN);\r
\r
int totalSDSectors =\r
- transfer.blocks *\r
- SDSectorsPerSCSISector(scsiDev.target->liveCfg.bytesPerSector);\r
+ transfer.blocks * SDSectorsPerSCSISector(bytesPerSector);\r
uint32_t sdLBA =\r
SCSISector2SD(\r
scsiDev.target->cfg->sdSectorStart,\r
- scsiDev.target->liveCfg.bytesPerSector,\r
+ bytesPerSector,\r
transfer.lba);\r
\r
- const int sdPerScsi =\r
- SDSectorsPerSCSISector(scsiDev.target->liveCfg.bytesPerSector);\r
+ const int sdPerScsi = SDSectorsPerSCSISector(bytesPerSector);\r
int buffers = sizeof(scsiDev.data) / SD_SECTOR_SIZE;\r
int prep = 0;\r
int i = 0;\r
// Wait for the next DMA interrupt. It's beneficial to halt the\r
// processor to give the DMA controller more memory bandwidth to\r
// work with.\r
- // We're optimistically assuming a race condition won't occur\r
- // between these checks and the interrupt handers. The 1ms\r
- // systick timer interrupt saves us on the event of a race.\r
- int scsiBusy = scsiDMABusy();\r
- int sdBusy = sdDMABusy();\r
+ int scsiBusy = 1;\r
+ int sdBusy = 1;\r
while (scsiBusy && sdBusy)\r
{\r
- __WFI();\r
+ uint8_t intr = CyEnterCriticalSection();\r
scsiBusy = scsiDMABusy();\r
sdBusy = sdDMABusy();\r
+ if (scsiBusy && sdBusy)\r
+ {\r
+ __WFI();\r
+ }\r
+ CyExitCriticalSection(intr);\r
}\r
\r
if (sdActive && !sdBusy && sdReadSectorDMAPoll())\r
int dmaBytes = SD_SECTOR_SIZE;\r
if ((i % sdPerScsi) == (sdPerScsi - 1))\r
{\r
- dmaBytes = scsiDev.target->liveCfg.bytesPerSector % SD_SECTOR_SIZE;\r
+ dmaBytes = bytesPerSector % SD_SECTOR_SIZE;\r
if (dmaBytes == 0) dmaBytes = SD_SECTOR_SIZE;\r
}\r
scsiWriteDMA(&scsiDev.data[SD_SECTOR_SIZE * (i % buffers)], dmaBytes);\r
{\r
scsiEnterPhase(DATA_OUT);\r
\r
- const int sdPerScsi =\r
- SDSectorsPerSCSISector(scsiDev.target->liveCfg.bytesPerSector);\r
+ const int sdPerScsi = SDSectorsPerSCSISector(bytesPerSector);\r
int totalSDSectors = transfer.blocks * sdPerScsi;\r
int buffers = sizeof(scsiDev.data) / SD_SECTOR_SIZE;\r
int prep = 0;\r
// Wait for the next DMA interrupt. It's beneficial to halt the\r
// processor to give the DMA controller more memory bandwidth to\r
// work with.\r
- // We're optimistically assuming a race condition won't occur\r
- // between these checks and the interrupt handers. The 1ms\r
- // systick timer interrupt saves us on the event of a race.\r
- int scsiBusy = scsiDMABusy();\r
- int sdBusy = sdDMABusy();\r
+ int scsiBusy = 1;\r
+ int sdBusy = 1;\r
while (scsiBusy && sdBusy)\r
{\r
- __WFI();\r
+ uint8_t intr = CyEnterCriticalSection();\r
scsiBusy = scsiDMABusy();\r
sdBusy = sdDMABusy();\r
+ if (scsiBusy && sdBusy)\r
+ {\r
+ __WFI();\r
+ }\r
+ CyExitCriticalSection(intr);\r
}\r
\r
- if (sdActive && !sdBusy && sdWriteSectorDMAPoll(i == (totalSDSectors - 1)))\r
+ if (sdActive && !sdBusy && sdWriteSectorDMAPoll())\r
{\r
sdActive = 0;\r
i++;\r
int dmaBytes = SD_SECTOR_SIZE;\r
if ((prep % sdPerScsi) == (sdPerScsi - 1))\r
{\r
- dmaBytes = scsiDev.target->liveCfg.bytesPerSector % SD_SECTOR_SIZE;\r
+ dmaBytes = bytesPerSector % SD_SECTOR_SIZE;\r
if (dmaBytes == 0) dmaBytes = SD_SECTOR_SIZE;\r
}\r
scsiReadDMA(&scsiDev.data[SD_SECTOR_SIZE * (prep % buffers)], dmaBytes);\r
scsiActive = 1;\r
}\r
else if (\r
+ (scsiDev.boardCfg.flags & CONFIG_ENABLE_DISCONNECT) &&\r
(scsiActive == 0) &&\r
likely(!scsiDisconnected) &&\r
unlikely(scsiDev.discPriv) &&\r
if (scsiDev.phase == DATA_OUT)\r
{\r
if (scsiDev.parityError &&\r
- (scsiDev.target->cfg->flags & CONFIG_ENABLE_PARITY) &&\r
+ (scsiDev.boardCfg.flags & CONFIG_ENABLE_PARITY) &&\r
(scsiDev.compatMode >= COMPAT_SCSI2))\r
{\r
scsiDev.target->sense.code = ABORTED_COMMAND;\r
transfer.currentBlock = 0;\r
\r
// Cancel long running commands!\r
- if (unlikely(transfer.inProgress == 1))\r
+ if (\r
+ ((scsiDev.boardCfg.flags & CONFIG_ENABLE_CACHE) == 0) ||\r
+ (transfer.multiBlock == 0)\r
+ )\r
{\r
- if (transfer.dir == TRANSFER_WRITE)\r
- {\r
- sdCompleteWrite();\r
- }\r
- else\r
- {\r
- sdCompleteRead();\r
- }\r
+ sdCompleteTransfer();\r
}\r
- transfer.inProgress = 0;\r
+\r
transfer.multiBlock = 0;\r
}\r
\r
void scsiDiskInit()\r
{\r
- transfer.inProgress = 0;\r
scsiDiskReset();\r
\r
// Don't require the host to send us a START STOP UNIT command\r
typedef struct
{
- int dir;
int multiBlock; // True if we're using a multi-block SPI transfer.
- int inProgress; // True if we need to call sdComplete{Read|Write}
uint32 lba;
uint32 blocks;
#include "time.h"\r
#include "trace.h"\r
\r
-const char* Notice = "Copyright (C) 2014 Michael McMaster <michael@codesrc.com>";\r
-\r
-uint8_t testData[512];\r
+const char* Notice = "Copyright (C) 2015 Michael McMaster <michael@codesrc.com>";\r
\r
int main()\r
{\r
// Set interrupt handlers.\r
scsiPhyInit();\r
\r
- configInit();\r
+ configInit(&scsiDev.boardCfg);\r
debugInit();\r
\r
scsiInit();\r
scsiDiskInit();\r
\r
- uint32_t lastSDPoll = getTime_ms();\r
- sdPoll();\r
-\r
+ // Optional bootup delay\r
+ int delaySeconds = 0;\r
+ while (delaySeconds < scsiDev.boardCfg.startupDelay) {\r
+ CyDelay(1000);\r
+ ++delaySeconds;\r
+ }\r
\r
+ uint32_t lastSDPoll = getTime_ms();\r
+ sdCheckPresent();\r
\r
\r
while (1)\r
scsiPoll();\r
scsiDiskPoll();\r
configPoll();\r
+ sdPoll();\r
\r
if (unlikely(scsiDev.phase == BUS_FREE))\r
{\r
if (unlikely(elapsedTime_ms(lastSDPoll) > 200))\r
{\r
lastSDPoll = getTime_ms();\r
- sdPoll();\r
+ sdCheckPresent();\r
}\r
else\r
{\r
// Wait for our 1ms timer to save some power.\r
// There's an interrupt on the SEL signal to ensure we respond\r
- // quickly to any SCSI commands.\r
- __WFI();\r
+ // quickly to any SCSI commands. The selection abort time is\r
+ // only 250us, and new SCSI-3 controllers time-out very\r
+ // not long after that, so we need to ensure we wake up quickly.\r
+ uint8_t interruptState = CyEnterCriticalSection();\r
+ if (!SCSI_ReadFilt(SCSI_Filt_SEL))\r
+ {\r
+ __WFI(); // Will wake on interrupt, regardless of mask\r
+ }\r
+ CyExitCriticalSection(interruptState);\r
}\r
}\r
+ else if (scsiDev.phase >= 0)\r
+ {\r
+ // don't waste time scanning SD cards while we're doing disk IO\r
+ lastSDPoll = getTime_ms();\r
+ }\r
}\r
return 0;\r
}\r
scsiDev.dataPtr += len;\r
\r
if (scsiDev.parityError &&\r
- (scsiDev.target->cfg->flags & CONFIG_ENABLE_PARITY) &&\r
+ (scsiDev.boardCfg.flags & CONFIG_ENABLE_PARITY) &&\r
(scsiDev.compatMode >= COMPAT_SCSI2))\r
{\r
scsiDev.target->sense.code = ABORTED_COMMAND;\r
return;\r
}\r
else if (scsiDev.parityError &&\r
- (cfg->flags & CONFIG_ENABLE_PARITY) &&\r
+ (scsiDev.boardCfg.flags & CONFIG_ENABLE_PARITY) &&\r
(scsiDev.compatMode >= COMPAT_SCSI2))\r
{\r
scsiDev.target->sense.code = ABORTED_COMMAND;\r
// on receiving the unit attention response on boot, thus\r
// triggering another unit attention condition.\r
else if (scsiDev.target->unitAttention &&\r
- (cfg->flags & CONFIG_ENABLE_UNIT_ATTENTION))\r
+ (scsiDev.boardCfg.flags & CONFIG_ENABLE_UNIT_ATTENTION))\r
{\r
scsiDev.target->sense.code = UNIT_ATTENTION;\r
scsiDev.target->sense.asc = scsiDev.target->unitAttention;\r
\r
static void process_SelectionPhase()\r
{\r
- if (scsiDev.compatMode < COMPAT_SCSI2)\r
+ // Selection delays.\r
+ // Many SCSI1 samplers that use a 5380 chip need a delay of at least 1ms.\r
+ // The Mac Plus boot-time (ie. rom code) selection abort time\r
+ // is < 1ms and must have no delay (standard suggests 250ms abort time)\r
+ // Most newer SCSI2 hosts don't care either way.\r
+ if (scsiDev.boardCfg.selectionDelay == 255) // auto\r
+ {\r
+ if (scsiDev.compatMode < COMPAT_SCSI2)\r
+ {\r
+ CyDelay(1);\r
+ }\r
+ }\r
+ else if (scsiDev.boardCfg.selectionDelay != 0)\r
{\r
- // Required for some older SCSI1 devices using a 5380 chip.\r
- CyDelay(1);\r
+ CyDelay(scsiDev.boardCfg.selectionDelay);\r
}\r
\r
int sel = SCSI_ReadFilt(SCSI_Filt_SEL);\r
int bsy = SCSI_ReadFilt(SCSI_Filt_BSY);\r
+ int io = SCSI_ReadPin(SCSI_In_IO);\r
\r
// Only read these pins AFTER SEL and BSY - we don't want to catch them\r
// during a transition period.\r
break;\r
}\r
}\r
- if (!bsy && sel &&\r
+ sel &= SCSI_ReadFilt(SCSI_Filt_SEL);\r
+ bsy |= SCSI_ReadFilt(SCSI_Filt_BSY);\r
+ io |= SCSI_ReadPin(SCSI_In_IO);\r
+ if (!bsy && !io && sel &&\r
target &&\r
- (goodParity || !(target->cfg->flags & CONFIG_ENABLE_PARITY) || !atnFlag) &&\r
+ (goodParity || !(scsiDev.boardCfg.flags & CONFIG_ENABLE_PARITY) || !atnFlag) &&\r
likely(maskBitCount <= 2))\r
{\r
+ // We've been selected!\r
+ // Assert BSY - Selection success!\r
+ // must happen within 200us (Selection abort time) of seeing our\r
+ // ID + SEL.\r
+ // (Note: the initiator will be waiting the "Selection time-out delay"\r
+ // for our BSY response, which is actually a very generous 250ms)\r
+ SCSI_SetPin(SCSI_Out_BSY);\r
+ ledOn();\r
+\r
scsiDev.target = target;\r
\r
// Do we enter MESSAGE OUT immediately ? SCSI 1 and 2 standards says\r
// The initiator should assert ATN with SEL.\r
scsiDev.atnFlag = atnFlag;\r
\r
+\r
// Unit attention breaks many older SCSI hosts. Disable it completely\r
// for SCSI-1 (and older) hosts, regardless of our configured setting.\r
// Enable the compatability mode also as many SASI and SCSI1\r
target->unitAttention = 0;\r
scsiDev.compatMode = COMPAT_SCSI1;\r
}\r
- else if (!(target->cfg->flags & CONFIG_ENABLE_SCSI2))\r
+ else if (!(scsiDev.boardCfg.flags & CONFIG_ENABLE_SCSI2))\r
{\r
scsiDev.compatMode = COMPAT_SCSI1;\r
}\r
scsiDev.compatMode = COMPAT_SCSI2;\r
}\r
\r
- // We've been selected!\r
- // Assert BSY - Selection success!\r
- // must happen within 200us (Selection abort time) of seeing our\r
- // ID + SEL.\r
- // (Note: the initiator will be waiting the "Selection time-out delay"\r
- // for our BSY response, which is actually a very generous 250ms)\r
- SCSI_SetPin(SCSI_Out_BSY);\r
- ledOn();\r
-\r
scsiDev.selCount++;\r
\r
- // Wait until the end of the selection phase.\r
- while (likely(!scsiDev.resetFlag))\r
- {\r
- if (!SCSI_ReadFilt(SCSI_Filt_SEL))\r
- {\r
- break;\r
- }\r
- }\r
\r
// Save our initiator now that we're no longer in a time-critical\r
// section.\r
}\r
}\r
\r
+ // Wait until the end of the selection phase.\r
+ while (likely(!scsiDev.resetFlag))\r
+ {\r
+ if (!SCSI_ReadFilt(SCSI_Filt_SEL))\r
+ {\r
+ break;\r
+ }\r
+ }\r
+\r
scsiDev.phase = COMMAND;\r
}\r
else if (!sel)\r
scsiDev.msgCount++;\r
\r
if (scsiDev.parityError &&\r
- (scsiDev.target->cfg->flags & CONFIG_ENABLE_PARITY) &&\r
+ (scsiDev.boardCfg.flags & CONFIG_ENABLE_PARITY) &&\r
(scsiDev.compatMode >= COMPAT_SCSI2))\r
{\r
// Skip the remaining message bytes, and then start the MESSAGE_OUT\r
{\r
// Two byte message. We don't support these. read and discard.\r
scsiReadByte();\r
+\r
+ if (scsiDev.msgOut == 0x23) {\r
+ // Ignore Wide Residue. We're only 8 bit anyway.\r
+ } else {\r
+ messageReject();\r
+ }\r
}\r
else if (scsiDev.msgOut == 0x01)\r
{\r
{
TargetState targets[MAX_SCSI_TARGETS];
TargetState* target;
+ BoardConfig boardCfg;
+
// Set to true (1) if the ATN flag was set, and we need to
// enter the MESSAGE_OUT phase.
- volatile int atnFlag;
+ int atnFlag;
// Set to true (1) if the RST flag was set.
volatile int resetFlag;
{\r
// The SEL signal ISR ensures we wake up from a _WFI() (wait-for-interrupt)\r
// call in the main loop without waiting for our 1ms timer to\r
- // expire. This is done for performance reasons only.\r
+ // expire. This is done to meet the 250us selection abort time.\r
}\r
\r
uint8_t\r
uint8_t val = scsiPhyRx();\r
scsiDev.parityError = scsiDev.parityError || SCSI_Parity_Error_Read();\r
\r
- trace(trace_spinTxComplete);\r
- while (!(scsiPhyStatus() & SCSI_PHY_TX_COMPLETE) && likely(!scsiDev.resetFlag)) {}\r
-\r
return val;\r
}\r
\r
}\r
}\r
scsiDev.parityError = scsiDev.parityError || SCSI_Parity_Error_Read();\r
- while (!(scsiPhyStatus() & SCSI_PHY_TX_COMPLETE) && likely(!scsiDev.resetFlag)) {}\r
}\r
\r
static void\r
{\r
if (scsiTxDMAComplete && scsiRxDMAComplete)\r
{\r
- // Wait until our scsi signals are consistent. This should only be\r
- // a few cycles.\r
- trace(trace_spinTxComplete);\r
- while (!(scsiPhyStatus() & SCSI_PHY_TX_COMPLETE)) {}\r
-\r
if (likely(dmaSentCount == dmaTotalCount))\r
{\r
dmaInProgress = 0;\r
\r
trace(trace_spinTxComplete);\r
while (!(scsiPhyStatus() & SCSI_PHY_TX_COMPLETE) && likely(!scsiDev.resetFlag)) {}\r
- scsiPhyRxFifoClear();\r
+ scsiPhyRx();\r
}\r
\r
static void\r
{\r
__WFI();\r
};\r
- \r
+\r
if (count > alignedCount)\r
{\r
scsiWritePIO(data + alignedCount, count - alignedCount);\r
\r
void scsiEnterPhase(int phase)\r
{\r
+ // ANSI INCITS 362-2002 SPI-3 10.7.1:\r
+ // Phase changes are not allowed while REQ or ACK is asserted.\r
+ while (likely(!scsiDev.resetFlag) &&\r
+ (SCSI_ReadPin(SCSI_In_REQ) || SCSI_ReadFilt(SCSI_Filt_ACK))\r
+ ) {}\r
+\r
int newPhase = phase > 0 ? phase : 0;\r
if (newPhase != SCSI_CTL_PHASE_Read())\r
{\r
dmaTotalCount = 0;\r
CyDmaChSetRequest(scsiDmaTxChan, CY_DMA_CPU_TERM_CHAIN);\r
CyDmaChSetRequest(scsiDmaRxChan, CY_DMA_CPU_TERM_CHAIN);\r
- \r
+\r
// CyDmaChGetRequest returns 0 for the relevant bit once the\r
// request is completed.\r
trace(trace_spinDMAReset);\r
HI16(CYDEV_SRAM_BASE),\r
HI16(CYDEV_PERIPH_BASE)\r
);\r
- \r
+\r
CyDmaChDisable(scsiDmaRxChan);\r
CyDmaChDisable(scsiDmaTxChan);\r
\r
SCSI_SEL_ISR_StartEx(scsiSelectionISR);\r
\r
// Disable the glitch filter for ACK to improve performance.\r
- if (getConfigByIndex(0)->flags & CONFIG_DISABLE_GLITCH)\r
+ if (scsiDev.boardCfg.flags & CONFIG_DISABLE_GLITCH)\r
{\r
SCSI_Glitch_Ctl_Write(1);\r
CY_SET_REG8(scsiTarget_datapath__D0_REG, 0);\r
// Global\r
SdDevice sdDev;\r
\r
-enum SD_IO_STATE { SD_DMA, SD_ACCEPTED, SD_BUSY, SD_IDLE };\r
+enum SD_CMD_STATE { CMD_STATE_IDLE, CMD_STATE_READ, CMD_STATE_WRITE };\r
+static int sdCmdState = CMD_STATE_IDLE;\r
+static uint32_t sdCmdNextLBA; // Only valid in CMD_STATE_READ or CMD_STATE_WRITE\r
+static uint32_t sdCmdTime;\r
+static uint32_t sdLastCmdState = CMD_STATE_IDLE;\r
+\r
+enum SD_IO_STATE { SD_DMA, SD_ACCEPTED, SD_IDLE };\r
static int sdIOState = SD_IDLE;\r
\r
// Private DMA variables.\r
return crc & 0x7F;\r
}\r
\r
+\r
// Read and write 1 byte.\r
static uint8_t sdSpiByte(uint8_t value)\r
{\r
return SDCard_ReadRxData();\r
}\r
\r
+static void sdWaitWriteBusy()\r
+{\r
+ uint8 val;\r
+ do\r
+ {\r
+ val = sdSpiByte(0xFF);\r
+ } while (val != 0xFF);\r
+}\r
+\r
+static void sdPreCmdState(uint32_t newState)\r
+{\r
+ if (sdCmdState == CMD_STATE_READ)\r
+ {\r
+ sdCompleteRead();\r
+ }\r
+ else if (sdCmdState == CMD_STATE_WRITE)\r
+ {\r
+ sdCompleteWrite();\r
+ }\r
+ sdCmdState = CMD_STATE_IDLE;\r
+\r
+ if (sdLastCmdState != newState && newState != CMD_STATE_IDLE)\r
+ {\r
+ sdWaitWriteBusy();\r
+ sdLastCmdState = newState;\r
+ }\r
+}\r
+\r
static uint16_t sdDoCommand(\r
uint8_t cmd,\r
uint32_t param,\r
CyDmaChEnable(sdDMATxChan, 1);\r
\r
trace(trace_spinSDDMA);\r
- while (!(sdTxDMAComplete && sdRxDMAComplete)) { __WFI(); }\r
+ int allComplete = 0;\r
+ while (!allComplete)\r
+ {\r
+ uint8_t intr = CyEnterCriticalSection();\r
+ allComplete = sdTxDMAComplete && sdRxDMAComplete;\r
+ if (!allComplete)\r
+ {\r
+ __WFI();\r
+ }\r
+ CyExitCriticalSection(intr);\r
+ }\r
\r
uint16_t response = sdSpiByte(0xFF); // Result code or stuff byte\r
if (unlikely(cmd == SD_STOP_TRANSMISSION))\r
}\r
\r
void\r
-sdReadMultiSectorPrep()\r
+sdReadMultiSectorPrep(uint32_t sdLBA, uint32_t sdSectors)\r
{\r
- uint8 v;\r
- uint32 scsiLBA = (transfer.lba + transfer.currentBlock);\r
- uint32 sdLBA =\r
- SCSISector2SD(\r
- scsiDev.target->cfg->sdSectorStart,\r
- scsiDev.target->liveCfg.bytesPerSector,\r
- scsiLBA);\r
+ uint32_t tmpNextLBA = sdLBA + sdSectors;\r
\r
if (!sdDev.ccs)\r
{\r
sdLBA = sdLBA * SD_SECTOR_SIZE;\r
+ tmpNextLBA = tmpNextLBA * SD_SECTOR_SIZE;\r
}\r
- v = sdCommandAndResponse(SD_READ_MULTIPLE_BLOCK, sdLBA);\r
- if (unlikely(v))\r
- {\r
- scsiDiskReset();\r
- sdClearStatus();\r
\r
- scsiDev.status = CHECK_CONDITION;\r
- scsiDev.target->sense.code = HARDWARE_ERROR;\r
- scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;\r
- scsiDev.phase = STATUS;\r
+ if (sdCmdState == CMD_STATE_READ && sdCmdNextLBA == sdLBA)\r
+ {\r
+ // Well, that was lucky. We're already reading this data\r
+ sdCmdNextLBA = tmpNextLBA;\r
+ sdCmdTime = getTime_ms();\r
}\r
else\r
{\r
- transfer.inProgress = 1;\r
+ sdPreCmdState(CMD_STATE_READ);\r
+\r
+ uint8_t v = sdCommandAndResponse(SD_READ_MULTIPLE_BLOCK, sdLBA);\r
+ if (unlikely(v))\r
+ {\r
+ scsiDiskReset();\r
+ sdClearStatus();\r
+\r
+ scsiDev.status = CHECK_CONDITION;\r
+ scsiDev.target->sense.code = HARDWARE_ERROR;\r
+ scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;\r
+ scsiDev.phase = STATUS;\r
+ }\r
+ else\r
+ {\r
+ sdCmdNextLBA = tmpNextLBA;\r
+ sdCmdState = CMD_STATE_READ;\r
+ sdCmdTime = getTime_ms();\r
+ }\r
}\r
}\r
\r
dmaRxTd[0] = CyDmaTdAllocate();\r
dmaRxTd[1] = CyDmaTdAllocate();\r
dmaTxTd = CyDmaTdAllocate();\r
- \r
+\r
// Receive 512 bytes of data and then 2 bytes CRC.\r
CyDmaTdSetConfiguration(dmaRxTd[0], SD_SECTOR_SIZE, dmaRxTd[1], TD_INC_DST_ADR);\r
CyDmaTdSetConfiguration(dmaRxTd[1], 2, CY_DMA_DISABLE_TD, SD_RX_DMA__TD_TERMOUT_EN);\r
CyDmaTdSetAddress(dmaRxTd[1], LO16((uint32)SDCard_RXDATA_PTR), LO16((uint32)&discardBuffer));\r
- \r
+\r
CyDmaTdSetConfiguration(dmaTxTd, SD_SECTOR_SIZE + 2, CY_DMA_DISABLE_TD, SD_TX_DMA__TD_TERMOUT_EN);\r
CyDmaTdSetAddress(dmaTxTd, LO16((uint32)&dummyBuffer), LO16((uint32)SDCard_TXDATA_PTR));\r
\r
\r
void sdReadSingleSectorDMA(uint32_t lba, uint8_t* outputBuffer)\r
{\r
+ sdPreCmdState(CMD_STATE_READ);\r
+\r
uint8 v;\r
if (!sdDev.ccs)\r
{\r
dmaReadSector(outputBuffer);\r
}\r
\r
-\r
void sdCompleteRead()\r
{\r
if (unlikely(sdIOState != SD_IDLE))\r
trace(trace_spinSDCompleteRead);\r
while (!sdReadSectorDMAPoll()) { /* spin */ }\r
}\r
- \r
- if (transfer.inProgress)\r
+\r
+\r
+ if (sdCmdState == CMD_STATE_READ)\r
{\r
- transfer.inProgress = 0;\r
uint8 r1b = sdCommandAndResponse(SD_STOP_TRANSMISSION, 0);\r
\r
- if (unlikely(r1b))\r
+ if (unlikely(r1b) && (scsiDev.PHASE == DATA_IN))\r
{\r
scsiDev.status = CHECK_CONDITION;\r
scsiDev.target->sense.code = HARDWARE_ERROR;\r
// R1b has an optional trailing "busy" signal, but we defer waiting on this.\r
// The next call so sdCommandAndResponse will wait for the busy state to\r
// clear.\r
-}\r
\r
-static void sdWaitWriteBusy()\r
-{\r
- uint8 val;\r
- do\r
- {\r
- val = sdSpiByte(0xFF);\r
- } while (val != 0xFF);\r
+ sdCmdState = CMD_STATE_IDLE;\r
}\r
\r
void\r
dmaTxTd[0] = CyDmaTdAllocate();\r
dmaTxTd[1] = CyDmaTdAllocate();\r
dmaTxTd[2] = CyDmaTdAllocate();\r
- \r
+\r
// Transmit 512 bytes of data and then 2 bytes CRC, and then get the response byte\r
// We need to do this without stopping the clock\r
CyDmaTdSetConfiguration(dmaTxTd[0], 2, dmaTxTd[1], TD_INC_SRC_ADR);\r
}\r
\r
int\r
-sdWriteSectorDMAPoll(int sendStopToken)\r
+sdWriteSectorDMAPoll()\r
{\r
if (sdRxDMAComplete && sdTxDMAComplete)\r
{\r
sdSpiByte(0xFD); // STOP TOKEN\r
sdWaitWriteBusy();\r
\r
- transfer.inProgress = 0;\r
+ sdCmdState = CMD_STATE_IDLE;\r
scsiDiskReset();\r
sdClearStatus();\r
\r
}\r
\r
if (sdIOState == SD_ACCEPTED)\r
- {\r
- // Wait while the SD card is busy\r
- if (sdSpiByte(0xFF) == 0xFF)\r
- {\r
- if (sendStopToken)\r
- {\r
- sdIOState = SD_BUSY;\r
- transfer.inProgress = 0;\r
-\r
- sdSpiByte(0xFD); // STOP TOKEN\r
- }\r
- else\r
- {\r
- sdIOState = SD_IDLE;\r
- }\r
- }\r
- }\r
-\r
- if (sdIOState == SD_BUSY)\r
{\r
// Wait while the SD card is busy\r
if (sdSpiByte(0xFF) == 0xFF)\r
// Cancelling the transfer can't be done as we have no way to reset\r
// the SD card.\r
trace(trace_spinSDCompleteWrite);\r
- while (!sdWriteSectorDMAPoll(1)) { /* spin */ }\r
+ while (!sdWriteSectorDMAPoll()) { /* spin */ }\r
}\r
\r
- if (transfer.inProgress && likely(scsiDev.phase == DATA_OUT))\r
+ if (sdCmdState == CMD_STATE_WRITE)\r
+ {\r
+ sdWaitWriteBusy();\r
+\r
+ sdSpiByte(0xFD); // STOP TOKEN\r
+\r
+ sdWaitWriteBusy();\r
+ }\r
+\r
+\r
+ if (likely(scsiDev.phase == DATA_OUT))\r
{\r
uint16_t r2 = sdDoCommand(SD_SEND_STATUS, 0, 0, 1);\r
if (unlikely(r2))\r
scsiDev.phase = STATUS;\r
}\r
}\r
- transfer.inProgress = 0;\r
+ sdCmdState = CMD_STATE_IDLE;\r
+}\r
+\r
+void sdCompleteTransfer()\r
+{\r
+ sdPreCmdState(CMD_STATE_IDLE);\r
}\r
\r
\r
int i;\r
uint8 v;\r
\r
+ sdCmdState = CMD_STATE_IDLE;\r
sdDev.version = 0;\r
sdDev.ccs = 0;\r
sdDev.capacity = 0;\r
\r
}\r
\r
-void sdWriteMultiSectorPrep()\r
+void sdWriteMultiSectorPrep(uint32_t sdLBA, uint32_t sdSectors)\r
{\r
- uint8 v;\r
+ uint32_t tmpNextLBA = sdLBA + sdSectors;\r
\r
- // Set the number of blocks to pre-erase by the multiple block write command\r
- // We don't care about the response - if the command is not accepted, writes\r
- // will just be a bit slower.\r
- // Max 22bit parameter.\r
- uint32_t sdBlocks =\r
- transfer.blocks *\r
- SDSectorsPerSCSISector(scsiDev.target->liveCfg.bytesPerSector);\r
- uint32 blocks = sdBlocks > 0x7FFFFF ? 0x7FFFFF : sdBlocks;\r
- sdCommandAndResponse(SD_APP_CMD, 0);\r
- sdCommandAndResponse(SD_APP_SET_WR_BLK_ERASE_COUNT, blocks);\r
-\r
- uint32 scsiLBA = (transfer.lba + transfer.currentBlock);\r
- uint32 sdLBA =\r
- SCSISector2SD(\r
- scsiDev.target->cfg->sdSectorStart,\r
- scsiDev.target->liveCfg.bytesPerSector,\r
- scsiLBA);\r
if (!sdDev.ccs)\r
{\r
sdLBA = sdLBA * SD_SECTOR_SIZE;\r
+ tmpNextLBA = tmpNextLBA * SD_SECTOR_SIZE;\r
}\r
- v = sdCommandAndResponse(SD_WRITE_MULTIPLE_BLOCK, sdLBA);\r
- if (unlikely(v))\r
+\r
+ if (sdCmdState == CMD_STATE_WRITE && sdCmdNextLBA == sdLBA)\r
{\r
- scsiDiskReset();\r
- sdClearStatus();\r
- scsiDev.status = CHECK_CONDITION;\r
- scsiDev.target->sense.code = HARDWARE_ERROR;\r
- scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;\r
- scsiDev.phase = STATUS;\r
+ // Well, that was lucky. We're already writing this data\r
+ sdCmdNextLBA = tmpNextLBA;\r
+ sdCmdTime = getTime_ms();\r
}\r
else\r
{\r
- transfer.inProgress = 1;\r
+ sdPreCmdState(CMD_STATE_WRITE);\r
+\r
+ // Set the number of blocks to pre-erase by the multiple block write\r
+ // command. We don't care about the response - if the command is not\r
+ // accepted, writes will just be a bit slower. Max 22bit parameter.\r
+ uint32 blocks = sdSectors > 0x7FFFFF ? 0x7FFFFF : sdSectors;\r
+ sdCommandAndResponse(SD_APP_CMD, 0);\r
+ sdCommandAndResponse(SD_APP_SET_WR_BLK_ERASE_COUNT, blocks);\r
+\r
+ uint8_t v = sdCommandAndResponse(SD_WRITE_MULTIPLE_BLOCK, sdLBA);\r
+ if (unlikely(v))\r
+ {\r
+ scsiDiskReset();\r
+ sdClearStatus();\r
+ scsiDev.status = CHECK_CONDITION;\r
+ scsiDev.target->sense.code = HARDWARE_ERROR;\r
+ scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;\r
+ scsiDev.phase = STATUS;\r
+ }\r
+ else\r
+ {\r
+ sdCmdTime = getTime_ms();\r
+ sdCmdNextLBA = tmpNextLBA;\r
+ sdCmdState = CMD_STATE_WRITE;\r
+ }\r
}\r
}\r
\r
void sdPoll()\r
+{\r
+ if ((scsiDev.phase == BUS_FREE) &&\r
+ (sdCmdState != CMD_STATE_IDLE) &&\r
+ (elapsedTime_ms(sdCmdTime) >= 50))\r
+ {\r
+ sdPreCmdState(CMD_STATE_IDLE);\r
+ }\r
+}\r
+\r
+void sdCheckPresent()\r
{\r
// Check if there's an SD card present.\r
if ((scsiDev.phase == BUS_FREE) &&\r
- (sdIOState == SD_IDLE))\r
+ (sdIOState == SD_IDLE) &&\r
+ (sdCmdState == CMD_STATE_IDLE))\r
{\r
// The CS line is pulled high by the SD card.\r
// De-assert the line, and check if it's high.\r
{\r
blockDev.state |= DISK_PRESENT | DISK_INITIALISED;\r
\r
+ // Always "start" the device. Many systems (eg. Apple System 7)\r
+ // won't respond properly to\r
+ // LOGICAL_UNIT_NOT_READY_INITIALIZING_COMMAND_REQUIRED sense\r
+ // code, even if they stopped it first with\r
+ // START STOP UNIT command.\r
+ blockDev.state |= DISK_STARTED;\r
+\r
if (!firstInit)\r
{\r
int i;\r
#define sdDMABusy() (!(sdRxDMAComplete && sdTxDMAComplete))
-void sdWriteMultiSectorPrep(void);
+void sdWriteMultiSectorPrep(uint32_t sdLBA, uint32_t sdSectors);
void sdWriteMultiSectorDMA(uint8_t* outputBuffer);
-int sdWriteSectorDMAPoll(int sendStopToken);
-void sdCompleteWrite(void);
+int sdWriteSectorDMAPoll();
-void sdReadMultiSectorPrep(void);
+void sdReadMultiSectorPrep(uint32_t sdLBA, uint32_t sdSectors);
void sdReadMultiSectorDMA(uint8_t* outputBuffer);
void sdReadSingleSectorDMA(uint32_t lba, uint8_t* outputBuffer);
int sdReadSectorDMAPoll();
-void sdCompleteRead(void);
+void sdCompleteTransfer(void);
+void sdCheckPresent();
void sdPoll();
#endif
#define TPIU_FFCR_ENFCONT (1 << 1)
+uint8_t LastTrace;
+
void traceInit(void) {
// enable the trace module clocks
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
// You should have received a copy of the GNU General Public License
// along with SCSI2SD. If not, see <http://www.gnu.org/licenses/>.
+extern uint8_t LastTrace;
+
// Trace event IDs to be output. 1 and 9 are generated as headers on ports 0
// and 1 respectively, and should not be used.
enum trace_event {
ITM->PORT[1].u8 = ch;
}
#else
- #define trace(ev)
- #define traceIrq(ev)
+ #define trace(ev) LastTrace = ev
+ #define traceIrq(ev) LastTrace = ev
#endif
#include <CyLib.h>
#include <Debug_Timer_Interrupt.h>
+
#if !defined(Debug_Timer_Interrupt__REMOVED) /* Check for removal by optimization */
/*******************************************************************************
*******************************************************************************/
CY_ISR(Debug_Timer_Interrupt_Interrupt)
{
+ #ifdef Debug_Timer_Interrupt_INTERRUPT_INTERRUPT_CALLBACK
+ Debug_Timer_Interrupt_Interrupt_InterruptCallback();
+ #endif /* Debug_Timer_Interrupt_INTERRUPT_INTERRUPT_CALLBACK */
+
/* Place your Interrupt code here. */
/* `#START Debug_Timer_Interrupt_Interrupt` */
#include <CyLib.h>\r
#include <SCSI_RST_ISR.h>\r
\r
+\r
#if !defined(SCSI_RST_ISR__REMOVED) /* Check for removal by optimization */\r
\r
/*******************************************************************************\r
*******************************************************************************/\r
CY_ISR(SCSI_RST_ISR_Interrupt)\r
{\r
+ #ifdef SCSI_RST_ISR_INTERRUPT_INTERRUPT_CALLBACK\r
+ SCSI_RST_ISR_Interrupt_InterruptCallback();\r
+ #endif /* SCSI_RST_ISR_INTERRUPT_INTERRUPT_CALLBACK */ \r
+\r
/* Place your Interrupt code here. */\r
/* `#START SCSI_RST_ISR_Interrupt` */\r
\r
#include <CyLib.h>
#include <SCSI_RX_DMA_COMPLETE.h>
+
#if !defined(SCSI_RX_DMA_COMPLETE__REMOVED) /* Check for removal by optimization */
/*******************************************************************************
*******************************************************************************/
CY_ISR(SCSI_RX_DMA_COMPLETE_Interrupt)
{
+ #ifdef SCSI_RX_DMA_COMPLETE_INTERRUPT_INTERRUPT_CALLBACK
+ SCSI_RX_DMA_COMPLETE_Interrupt_InterruptCallback();
+ #endif /* SCSI_RX_DMA_COMPLETE_INTERRUPT_INTERRUPT_CALLBACK */
+
/* Place your Interrupt code here. */
/* `#START SCSI_RX_DMA_COMPLETE_Interrupt` */
#include <CyLib.h>
#include <SCSI_SEL_ISR.h>
+
#if !defined(SCSI_SEL_ISR__REMOVED) /* Check for removal by optimization */
/*******************************************************************************
*******************************************************************************/
CY_ISR(SCSI_SEL_ISR_Interrupt)
{
+ #ifdef SCSI_SEL_ISR_INTERRUPT_INTERRUPT_CALLBACK
+ SCSI_SEL_ISR_Interrupt_InterruptCallback();
+ #endif /* SCSI_SEL_ISR_INTERRUPT_INTERRUPT_CALLBACK */
+
/* Place your Interrupt code here. */
/* `#START SCSI_SEL_ISR_Interrupt` */
#include <CyLib.h>
#include <SCSI_TX_DMA_COMPLETE.h>
+
#if !defined(SCSI_TX_DMA_COMPLETE__REMOVED) /* Check for removal by optimization */
/*******************************************************************************
*******************************************************************************/
CY_ISR(SCSI_TX_DMA_COMPLETE_Interrupt)
{
+ #ifdef SCSI_TX_DMA_COMPLETE_INTERRUPT_INTERRUPT_CALLBACK
+ SCSI_TX_DMA_COMPLETE_Interrupt_InterruptCallback();
+ #endif /* SCSI_TX_DMA_COMPLETE_INTERRUPT_INTERRUPT_CALLBACK */
+
/* Place your Interrupt code here. */
/* `#START SCSI_TX_DMA_COMPLETE_Interrupt` */
#include <CyLib.h>
#include <SD_RX_DMA_COMPLETE.h>
+
#if !defined(SD_RX_DMA_COMPLETE__REMOVED) /* Check for removal by optimization */
/*******************************************************************************
*******************************************************************************/
CY_ISR(SD_RX_DMA_COMPLETE_Interrupt)
{
+ #ifdef SD_RX_DMA_COMPLETE_INTERRUPT_INTERRUPT_CALLBACK
+ SD_RX_DMA_COMPLETE_Interrupt_InterruptCallback();
+ #endif /* SD_RX_DMA_COMPLETE_INTERRUPT_INTERRUPT_CALLBACK */
+
/* Place your Interrupt code here. */
/* `#START SD_RX_DMA_COMPLETE_Interrupt` */
#include <CyLib.h>
#include <SD_TX_DMA_COMPLETE.h>
+
#if !defined(SD_TX_DMA_COMPLETE__REMOVED) /* Check for removal by optimization */
/*******************************************************************************
*******************************************************************************/
CY_ISR(SD_TX_DMA_COMPLETE_Interrupt)
{
+ #ifdef SD_TX_DMA_COMPLETE_INTERRUPT_INTERRUPT_CALLBACK
+ SD_TX_DMA_COMPLETE_Interrupt_InterruptCallback();
+ #endif /* SD_TX_DMA_COMPLETE_INTERRUPT_INTERRUPT_CALLBACK */
+
/* Place your Interrupt code here. */
/* `#START SD_TX_DMA_COMPLETE_Interrupt` */
\r
#include "USBFS.h"\r
\r
+\r
#if defined(USBFS_ENABLE_AUDIO_CLASS)\r
\r
#include "USBFS_audio.h"\r
/* `#START AUDIO_READ_REQUESTS` Place other request handler here */\r
\r
/* `#END` */\r
+ \r
+ #ifdef USBFS_DISPATCH_AUDIO_CLASS_AUDIO_READ_REQUESTS_CALLBACK\r
+ USBFS_DispatchAUDIOClass_AUDIO_READ_REQUESTS_Callback();\r
+ #endif /* USBFS_DISPATCH_AUDIO_CLASS_AUDIO_READ_REQUESTS_CALLBACK */\r
+\r
break;\r
default:\r
break;\r
\r
/* `#END` */\r
\r
- /* Entity ID Control Selector is MUTE */\r
+ #ifdef USBFS_DISPATCH_AUDIO_CLASS_MUTE_CONTROL_GET_REQUEST_CALLBACK\r
+ USBFS_DispatchAUDIOClass_MUTE_CONTROL_GET_REQUEST_Callback();\r
+ #endif /* USBFS_DISPATCH_AUDIO_CLASS_MUTE_CONTROL_GET_REQUEST_CALLBACK */\r
+\r
+ /* Entity ID Control Selector is MUTE */\r
USBFS_currentTD.wCount = 1u;\r
USBFS_currentTD.pData = &USBFS_currentMute;\r
requestHandled = USBFS_InitControlRead();\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_DISPATCH_AUDIO_CLASS_VOLUME_CONTROL_GET_REQUEST_CALLBACK\r
+ USBFS_DispatchAUDIOClass_VOLUME_CONTROL_GET_REQUEST_Callback();\r
+ #endif /* USBFS_DISPATCH_AUDIO_CLASS_VOLUME_CONTROL_GET_REQUEST_CALLBACK */\r
+\r
/* Entity ID Control Selector is VOLUME, */\r
USBFS_currentTD.wCount = USBFS_VOLUME_LEN;\r
USBFS_currentTD.pData = USBFS_currentVolume;\r
/* `#START OTHER_GET_CUR_REQUESTS` Place other request handler here */\r
\r
/* `#END` */\r
+\r
+ #ifdef USBFS_DISPATCH_AUDIO_CLASS_OTHER_GET_CUR_REQUESTS_CALLBACK\r
+ USBFS_DispatchAUDIOClass_OTHER_GET_CUR_REQUESTS_Callback();\r
+ #endif /* USBFS_DISPATCH_AUDIO_CLASS_OTHER_GET_CUR_REQUESTS_CALLBACK */\r
}\r
break;\r
case USBFS_GET_MIN: /* GET_MIN */\r
/* `#START AUDIO_WRITE_REQUESTS` Place other request handler here */\r
\r
/* `#END` */\r
+\r
+ #ifdef USBFS_DISPATCH_AUDIO_CLASS_AUDIO_WRITE_REQUESTS_CALLBACK\r
+ USBFS_DispatchAUDIOClass_AUDIO_WRITE_REQUESTS_Callback();\r
+ #endif /* USBFS_DISPATCH_AUDIO_CLASS_AUDIO_WRITE_REQUESTS_CALLBACK */\r
+\r
break;\r
default:\r
break;\r
/* `#START AUDIO_SAMPLING_FREQ_REQUESTS` Place other request handler here */\r
\r
/* `#END` */\r
+\r
+ #ifdef USBFS_DISPATCH_AUDIO_CLASS_AUDIO_SAMPLING_FREQ_REQUESTS_CALLBACK\r
+ USBFS_DispatchAUDIOClass_AUDIO_SAMPLING_FREQ_REQUESTS_Callback();\r
+ #endif /* USBFS_DISPATCH_AUDIO_CLASS_AUDIO_SAMPLING_FREQ_REQUESTS_CALLBACK */\r
+\r
break;\r
default:\r
break;\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_DISPATCH_AUDIO_CLASS_MUTE_SET_REQUEST_CALLBACK\r
+ USBFS_DispatchAUDIOClass_MUTE_SET_REQUEST_Callback();\r
+ #endif /* USBFS_DISPATCH_AUDIO_CLASS_MUTE_SET_REQUEST_CALLBACK */\r
+\r
/* Entity ID Control Selector is MUTE */\r
USBFS_currentTD.wCount = 1u;\r
USBFS_currentTD.pData = &USBFS_currentMute;\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_DISPATCH_AUDIO_CLASS_VOLUME_CONTROL_SET_REQUEST_CALLBACK\r
+ USBFS_DispatchAUDIOClass_VOLUME_CONTROL_SET_REQUEST_Callback();\r
+ #endif /* USBFS_DISPATCH_AUDIO_CLASS_VOLUME_CONTROL_SET_REQUEST_CALLBACK */\r
+\r
/* Entity ID Control Selector is VOLUME */\r
USBFS_currentTD.wCount = USBFS_VOLUME_LEN;\r
USBFS_currentTD.pData = USBFS_currentVolume;\r
/* `#START OTHER_SET_CUR_REQUESTS` Place other request handler here */\r
\r
/* `#END` */\r
+\r
+ #ifdef USBFS_DISPATCH_AUDIO_CLASS_OTHER_SET_CUR_REQUESTS_CALLBACK\r
+ USBFS_DispatchAUDIOClass_OTHER_SET_CUR_REQUESTS_Callback();\r
+ #endif /* USBFS_DISPATCH_AUDIO_CLASS_OTHER_SET_CUR_REQUESTS_CALLBACK */\r
}\r
#endif /* USBFS_ENABLE_AUDIO_STREAMING */\r
\r
/* `#START AUDIO_CONTROL_SEL_REQUESTS` Place other request handler here */\r
\r
/* `#END` */\r
+\r
+ #ifdef USBFS_DISPATCH_AUDIO_CLASS_AUDIO_CONTROL_SEL_REQUESTS_CALLBACK\r
+ USBFS_DispatchAUDIOClass_AUDIO_CONTROL_SEL_REQUESTS_Callback();\r
+ #endif /* USBFS_DISPATCH_AUDIO_CLASS_AUDIO_CONTROL_SEL_REQUESTS_CALLBACK */\r
+\r
break;\r
default:\r
break;\r
#include "USBFS_pvt.h"\r
\r
\r
+\r
/***************************************\r
* CDC Variables\r
***************************************/\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_DISPATCH_CDC_CLASS_CDC_READ_REQUESTS_CALLBACK\r
+ USBFS_DispatchCDCClass_CDC_READ_REQUESTS_Callback();\r
+ #endif /* USBFS_DISPATCH_CDC_CLASS_CDC_READ_REQUESTS_CALLBACK */\r
+\r
default: /* requestHandled is initialized as FALSE by default */\r
break;\r
}\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_DISPATCH_CDC_CLASS_CDC_WRITE_REQUESTS_CALLBACK\r
+ USBFS_DispatchCDCClass_CDC_WRITE_REQUESTS_Callback();\r
+ #endif /* USBFS_DISPATCH_CDC_CLASS_CDC_WRITE_REQUESTS_CALLBACK */\r
+\r
default: /* requestHandled is initialized as FALSE by default */\r
break;\r
}\r
#include "USBFS_pvt.h"\r
\r
\r
+\r
/***************************************\r
* User Implemented Class Driver Declarations.\r
***************************************/\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_DISPATCH_CLASS_RQST_CALLBACK\r
+ USBFS_DispatchClassRqst_Callback();\r
+ #endif /* USBFS_DISPATCH_CLASS_RQST_CALLBACK */\r
+\r
return(requestHandled);\r
}\r
\r
#include "USBFS_pvt.h"\r
\r
\r
+\r
/***************************************\r
* Global data allocation\r
***************************************/\r
uint8 bRegTemp;\r
uint8 modifyReg;\r
\r
-\r
+ #ifdef USBFS_EP_0_ISR_ENTRY_CALLBACK\r
+ USBFS_EP_0_ISR_EntryCallback();\r
+ #endif /* USBFS_EP_0_ISR_ENTRY_CALLBACK */\r
+ \r
bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR);\r
if ((bRegTemp & USBFS_MODE_ACKD) != 0u)\r
{\r
}\r
}\r
}\r
+ #ifdef USBFS_EP_0_ISR_EXIT_CALLBACK\r
+ USBFS_EP_0_ISR_ExitCallback();\r
+ #endif /* USBFS_EP_0_ISR_EXIT_CALLBACK */\r
}\r
\r
\r
\r
#include "USBFS.h"\r
#include "USBFS_pvt.h"\r
+\r
#if (defined(USBFS_ENABLE_MIDI_STREAMING) && (USBFS_ENABLE_MIDI_API != 0u))\r
#include "USBFS_midi.h"\r
#endif /* (defined(USBFS_ENABLE_MIDI_STREAMING) && (USBFS_ENABLE_MIDI_API != 0u)) */\r
uint8 int_en;\r
#endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
\r
+ #ifdef USBFS_EP_1_ISR_ENTRY_CALLBACK\r
+ USBFS_EP_1_ISR_EntryCallback();\r
+ #endif /* USBFS_EP_1_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START EP1_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_EP_1_ISR_EXIT_CALLBACK\r
+ USBFS_EP_1_ISR_ExitCallback();\r
+ #endif /* USBFS_EP_1_ISR_EXIT_CALLBACK */\r
+\r
#if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \\r
USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
EA = int_en;\r
uint8 int_en;\r
#endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
\r
+ #ifdef USBFS_EP_2_ISR_ENTRY_CALLBACK\r
+ USBFS_EP_2_ISR_EntryCallback();\r
+ #endif /* USBFS_EP_2_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START EP2_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_EP_2_ISR_EXIT_CALLBACK\r
+ USBFS_EP_2_ISR_ExitCallback();\r
+ #endif /* USBFS_EP_2_ISR_EXIT_CALLBACK */\r
+ \r
#if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \\r
USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
EA = int_en;\r
uint8 int_en;\r
#endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
\r
+ #ifdef USBFS_EP_3_ISR_ENTRY_CALLBACK\r
+ USBFS_EP_3_ISR_EntryCallback();\r
+ #endif /* USBFS_EP_3_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START EP3_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_EP_3_ISR_EXIT_CALLBACK\r
+ USBFS_EP_3_ISR_ExitCallback();\r
+ #endif /* USBFS_EP_3_ISR_EXIT_CALLBACK */\r
+\r
#if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \\r
USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
EA = int_en;\r
uint8 int_en;\r
#endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT */\r
\r
+ #ifdef USBFS_EP_4_ISR_ENTRY_CALLBACK\r
+ USBFS_EP_4_ISR_EntryCallback();\r
+ #endif /* USBFS_EP_4_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START EP4_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_EP_4_ISR_EXIT_CALLBACK\r
+ USBFS_EP_4_ISR_ExitCallback();\r
+ #endif /* USBFS_EP_4_ISR_EXIT_CALLBACK */\r
+\r
#if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \\r
USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
EA = int_en;\r
uint8 int_en;\r
#endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT */\r
\r
+ #ifdef USBFS_EP_5_ISR_ENTRY_CALLBACK\r
+ USBFS_EP_5_ISR_EntryCallback();\r
+ #endif /* USBFS_EP_5_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START EP5_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_EP_5_ISR_EXIT_CALLBACK\r
+ USBFS_EP_5_ISR_ExitCallback();\r
+ #endif /* USBFS_EP_5_ISR_EXIT_CALLBACK */\r
+\r
#if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \\r
USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
EA = int_en;\r
uint8 int_en;\r
#endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT */\r
\r
+ #ifdef USBFS_EP_6_ISR_ENTRY_CALLBACK\r
+ USBFS_EP_6_ISR_EntryCallback();\r
+ #endif /* USBFS_EP_6_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START EP6_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_EP_6_ISR_EXIT_CALLBACK\r
+ USBFS_EP_6_ISR_ExitCallback();\r
+ #endif /* USBFS_EP_6_ISR_EXIT_CALLBACK */\r
+\r
#if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \\r
USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
EA = int_en;\r
uint8 int_en;\r
#endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT */\r
\r
+ #ifdef USBFS_EP_7_ISR_ENTRY_CALLBACK\r
+ USBFS_EP_7_ISR_EntryCallback();\r
+ #endif /* USBFS_EP_7_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START EP7_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_EP_7_ISR_EXIT_CALLBACK\r
+ USBFS_EP_7_ISR_ExitCallback();\r
+ #endif /* USBFS_EP_7_ISR_EXIT_CALLBACK */\r
+\r
#if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \\r
USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
EA = int_en;\r
uint8 int_en;\r
#endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT */\r
\r
+ #ifdef USBFS_EP_8_ISR_ENTRY_CALLBACK\r
+ USBFS_EP_8_ISR_EntryCallback();\r
+ #endif /* USBFS_EP_8_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START EP8_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_EP_8_ISR_EXIT_CALLBACK\r
+ USBFS_EP_8_ISR_ExitCallback();\r
+ #endif /* USBFS_EP_8_ISR_EXIT_CALLBACK */\r
+\r
#if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \\r
USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
EA = int_en;\r
*******************************************************************************/\r
CY_ISR(USBFS_SOF_ISR)\r
{\r
+ #ifdef USBFS_SOF_ISR_INTERRUPT_CALLBACK\r
+ USBFS_SOF_ISR_InterruptCallback();\r
+ #endif /* USBFS_SOF_ISR_INTERRUPT_CALLBACK */\r
+\r
/* `#START SOF_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
*******************************************************************************/\r
CY_ISR(USBFS_BUS_RESET_ISR)\r
{\r
+ #ifdef USBFS_BUS_RESET_ISR_ENTRY_CALLBACK\r
+ USBFS_BUS_RESET_ISR_EntryCallback();\r
+ #endif /* USBFS_BUS_RESET_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START BUS_RESET_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
USBFS_ReInitComponent();\r
+\r
+ #ifdef USBFS_BUS_RESET_ISR_EXIT_CALLBACK\r
+ USBFS_BUS_RESET_ISR_ExitCallback();\r
+ #endif /* USBFS_BUS_RESET_ISR_EXIT_CALLBACK */ \r
}\r
\r
\r
uint8 ep = USBFS_EP1;\r
uint8 ptr = 0u;\r
\r
+ #ifdef USBFS_ARB_ISR_ENTRY_CALLBACK\r
+ USBFS_ARB_ISR_EntryCallback();\r
+ #endif /* USBFS_ARB_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START ARB_BEGIN_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_ARB_ISR_CALLBACK\r
+ USBFS_ARB_ISR_Callback();\r
+ #endif /* USBFS_ARB_ISR_CALLBACK */\r
+\r
CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_SR_IND + ptr), ep_status); /* Clear Serviced events */\r
}\r
ptr += USBFS_EPX_CNTX_ADDR_OFFSET; /* prepare pointer for next EP */\r
/* `#START ARB_END_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
+\r
+ #ifdef USBFS_ARB_ISR_EXIT_CALLBACK\r
+ USBFS_ARB_ISR_ExitCallback();\r
+ #endif /* USBFS_ARB_ISR_EXIT_CALLBACK */\r
}\r
\r
#endif /* USBFS_EP_MM */\r
uint8 ep = USBFS_EP1;\r
uint8 ptr = 0u;\r
\r
+ #ifdef USBFS_EP_DMA_DONE_ISR_ENTRY_CALLBACK\r
+ USBFS_EP_DMA_DONE_ISR_EntryCallback();\r
+ #endif /* USBFS_EP_DMA_DONE_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START EP_DMA_DONE_BEGIN_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_EP_DMA_DONE_ISR_CALLBACK\r
+ USBFS_EP_DMA_DONE_ISR_Callback();\r
+ #endif /* USBFS_EP_DMA_DONE_ISR_CALLBACK */\r
+\r
CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + ptr), 0x00u);\r
/* repeat 2 last bytes to prefetch endpoint area */\r
CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_IND + ptr),\r
/* `#START EP_DMA_DONE_END_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
+\r
+ #ifdef USBFS_EP_DMA_DONE_ISR_EXIT_CALLBACK\r
+ USBFS_EP_DMA_DONE_ISR_ExitCallback();\r
+ #endif /* USBFS_EP_DMA_DONE_ISR_EXIT_CALLBACK */\r
}\r
#endif /* ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u)) */\r
\r
#include "USBFS_hid.h"\r
\r
\r
+\r
/***************************************\r
* HID Variables\r
***************************************/\r
/* `#START HID_FINDREPORT` Place custom handling here */\r
\r
/* `#END` */\r
+ \r
+ #ifdef USBFS_FIND_REPORT_CALLBACK\r
+ USBFS_FindReport_Callback();\r
+ #endif /* USBFS_FIND_REPORT_CALLBACK */\r
+ \r
USBFS_currentTD.count = 0u; /* Init not supported condition */\r
pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
reportType = CY_GET_REG8(USBFS_wValueHi);\r
#include "USBFS_pvt.h"\r
\r
\r
+\r
/***************************************\r
* MIDI Constants\r
***************************************/\r
/* `#START CUSTOM_MIDI_OUT_EP_SERV` Place your code here */\r
\r
/* `#END` */\r
+\r
+ #ifdef USBFS_MIDI_OUT_EP_SERVICE_CALLBACK\r
+ USBFS_MIDI_OUT_EP_Service_Callback();\r
+ #endif /* USBFS_MIDI_OUT_EP_SERVICE_CALLBACK */\r
}\r
#endif /* (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF) */\r
\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_MIDI_INIT_CALLBACK\r
+ USBFS_MIDI_Init_Callback();\r
+ #endif /* USBFS_MIDI_INIT_CALLBACK */\r
}\r
\r
\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_MIDI1_PROCESS_USB_OUT_ENTRY_CALLBACK\r
+ USBFS_MIDI1_ProcessUsbOut_EntryCallback();\r
+ #endif /* USBFS_MIDI1_PROCESS_USB_OUT_ENTRY_CALLBACK */\r
+\r
cmd = epBuf[USBFS_EVENT_BYTE0] & USBFS_CIN_MASK;\r
if((cmd != USBFS_RESERVED0) && (cmd != USBFS_RESERVED1))\r
{\r
/* `#START MIDI1_PROCESS_OUT_END` */\r
\r
/* `#END` */\r
+\r
+ #ifdef USBFS_MIDI1_PROCESS_USB_OUT_EXIT_CALLBACK\r
+ USBFS_MIDI1_ProcessUsbOut_ExitCallback();\r
+ #endif /* USBFS_MIDI1_PROCESS_USB_OUT_EXIT_CALLBACK */\r
}\r
\r
\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_MIDI2_PROCESS_USB_OUT_ENTRY_CALLBACK\r
+ USBFS_MIDI2_ProcessUsbOut_EntryCallback();\r
+ #endif /* USBFS_MIDI2_PROCESS_USB_OUT_ENTRY_CALLBACK */\r
+\r
cmd = epBuf[USBFS_EVENT_BYTE0] & USBFS_CIN_MASK;\r
if((cmd != USBFS_RESERVED0) && (cmd != USBFS_RESERVED1))\r
{\r
/* `#START MIDI2_PROCESS_OUT_END` */\r
\r
/* `#END` */\r
+\r
+ #ifdef USBFS_MIDI2_PROCESS_USB_OUT_EXIT_CALLBACK\r
+ USBFS_MIDI2_ProcessUsbOut_ExitCallback();\r
+ #endif /* USBFS_MIDI2_PROCESS_USB_OUT_EXIT_CALLBACK */\r
}\r
#endif /* (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF) */\r
#endif /* (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF) */\r
#include "USBFS_pvt.h"\r
\r
\r
+\r
/***************************************\r
* Custom Declarations\r
***************************************/\r
*******************************************************************************/\r
CY_ISR(USBFS_DP_ISR)\r
{\r
+ #ifdef USBFS_DP_ISR_ENTRY_CALLBACK\r
+ USBFS_DP_ISR_EntryCallback();\r
+ #endif /* USBFS_DP_ISR_ENTRY_CALLBACK */\r
+\r
/* `#START DP_USER_CODE` Place your code here */\r
\r
/* `#END` */\r
\r
/* Clears active interrupt */\r
CY_GET_REG8(USBFS_DP_INTSTAT_PTR);\r
+\r
+ #ifdef USBFS_DP_ISR_EXIT_CALLBACK\r
+ USBFS_DP_ISR_ExitCallback();\r
+ #endif /* USBFS_DP_ISR_EXIT_CALLBACK */\r
}\r
\r
#endif /* (USBFS_DP_ISR_REMOVE == 0u) */\r
#include "USBFS.h"\r
#include "USBFS_pvt.h"\r
\r
+\r
#if(USBFS_EXTERN_VND == USBFS_FALSE)\r
\r
\r
\r
/* `#END` */\r
\r
+ #ifdef USBFS_HANDLE_VENDOR_RQST_CALLBACK\r
+ USBFS_HandleVendorRqst_Callback();\r
+ #endif /* USBFS_HANDLE_VENDOR_RQST_CALLBACK */\r
+\r
return(requestHandled);\r
}\r
\r
\r
/* `#END` */\r
\r
-\r
#endif /* USBFS_EXTERN_VND */\r
\r
\r
\r
#include "cytypes.h"\r
\r
+#if (!CYDEV_BOOTLOADER_ENABLE)\r
\r
#if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
__attribute__ ((__section__(".cyloadermeta"), used))\r
0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
+#endif /* (!CYDEV_BOOTLOADER_ENABLE) */\r
+\r
\r
#if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
__attribute__ ((__section__(".cybootloader"), used))\r
/*******************************************************************************\r
-* FILENAME: cydevice.h\r
+* File Name: cydevice.h\r
* OBSOLETE: Do not use this file. Use the _trm version instead.\r
-* PSoC Creator 3.2\r
+* PSoC Creator 3.3\r
*\r
-* DESCRIPTION:\r
+* Description:\r
* This file provides all of the address values for the entire PSoC device.\r
* This file is automatically generated by PSoC Creator.\r
*\r
projects / SCSI2SD.git / commitdiff