Added support for standard ARM JTAG programmers, as well
authorMichael McMaster <michael@codesrc.com>
Wed, 9 Oct 2013 13:02:19 +0000 (23:02 +1000)
committerMichael McMaster <michael@codesrc.com>
Wed, 9 Oct 2013 13:02:19 +0000 (23:02 +1000)
as continuing miniprog3 SWD support.

14 files changed:
hardware/gerber/scsi2sd.GBL
hardware/gerber/scsi2sd.GBO
hardware/gerber/scsi2sd.GBS
hardware/gerber/scsi2sd.GML
hardware/gerber/scsi2sd.GTL
hardware/gerber/scsi2sd.GTO
hardware/gerber/scsi2sd.GTP
hardware/gerber/scsi2sd.GTS
hardware/scsi2sd.cmd
hardware/scsi2sd.net
hardware/scsi2sd.pcb
hardware/scsi2sd.sch
hardware/symbols/CY8C53.sym
hardware/symbols/CY8C53.tragesym

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+X111200Y124500D02*X113200D01*\r
+X112200D02*Y120500D01*\r
+X114400Y123500D02*Y120500D01*\r
+Y123500D02*X115100Y124500D01*\r
+X116200D01*\r
+X116900Y123500D01*\r
+Y120500D01*\r
+X114400Y122500D02*X116900D01*\r
+X120100Y124500D02*X120600Y124000D01*\r
+X118600Y124500D02*X120100D01*\r
+X118100Y124000D02*X118600Y124500D01*\r
+X118100Y124000D02*Y121000D01*\r
+X118600Y120500D01*\r
+X120100D01*\r
+X120600Y121000D01*\r
+Y122000D02*Y121000D01*\r
+X120100Y122500D02*X120600Y122000D01*\r
+X119100Y122500D02*X120100D01*\r
+X121800Y121000D02*X124800Y124000D01*\r
+X128000Y124500D02*X128500Y124000D01*\r
+X126500Y124500D02*X128000D01*\r
+X126000Y124000D02*X126500Y124500D01*\r
+X126000Y124000D02*Y123000D01*\r
+X126500Y122500D01*\r
+X128000D01*\r
+X128500Y122000D01*\r
+Y121000D01*\r
+X128000Y120500D02*X128500Y121000D01*\r
+X126500Y120500D02*X128000D01*\r
+X126000Y121000D02*X126500Y120500D01*\r
+X129700Y124500D02*Y122500D01*\r
+X130200Y120500D01*\r
+X131200Y122500D01*\r
+X132200Y120500D01*\r
+X132700Y122500D01*\r
+Y124500D02*Y122500D01*\r
+X134400Y124500D02*Y120500D01*\r
+X135700Y124500D02*X136400Y123800D01*\r
+Y121200D01*\r
+X135700Y120500D02*X136400Y121200D01*\r
+X133900Y120500D02*X135700D01*\r
+X133900Y124500D02*X135700D01*\r
+X94500Y108500D02*X96500D01*\r
+X94500D02*Y106500D01*\r
+X95000Y107000D01*\r
+X96000D01*\r
+X96500Y106500D01*\r
+Y105000D01*\r
+X96000Y104500D02*X96500Y105000D01*\r
+X95000Y104500D02*X96000D01*\r
+X94500Y105000D02*X95000Y104500D01*\r
+X97700Y108500D02*X98700Y104500D01*\r
+X99700Y108500D01*\r
 G54D152*X359800Y330900D02*Y322100D01*\r
 X375200D01*\r
 Y330900D02*Y322100D01*\r
@@ -1406,15 +1457,15 @@ X139700D01*
 X140900Y162600D02*X142900Y165100D01*\r
 X140900Y162600D02*X143400D01*\r
 X142900Y165100D02*Y161100D01*\r
-X120200Y125800D02*X121000D01*\r
-Y122300D01*\r
-X120500Y121800D02*X121000Y122300D01*\r
-X120000Y121800D02*X120500D01*\r
-X119500Y122300D02*X120000Y121800D01*\r
-X119500Y122800D02*Y122300D01*\r
-X122200Y123300D02*X124200Y125800D01*\r
-X122200Y123300D02*X124700D01*\r
-X124200Y125800D02*Y121800D01*\r
+X132700Y117300D02*X133500D01*\r
+Y113800D01*\r
+X133000Y113300D02*X133500Y113800D01*\r
+X132500Y113300D02*X133000D01*\r
+X132000Y113800D02*X132500Y113300D01*\r
+X132000Y114300D02*Y113800D01*\r
+X134700Y114800D02*X136700Y117300D01*\r
+X134700Y114800D02*X137200D01*\r
+X136700Y117300D02*Y113300D01*\r
 X229202Y87035D02*X230502D01*\r
 X228502Y87735D02*X229202Y87035D01*\r
 X228502Y90335D02*Y87735D01*\r
index 46d454c..23912aa 100644 (file)
@@ -1,7 +1,7 @@
 G04 start of page 15 for group -4015 idx -4015 *\r
 G04 Title: (unknown), toppaste *\r
 G04 Creator: pcb 20110918 *\r
-G04 CreationDate: Thu 03 Oct 2013 10:13:16 GMT UTC *\r
+G04 CreationDate: Wed 09 Oct 2013 12:59:36 GMT UTC *\r
 G04 For: michael *\r
 G04 Format: Gerber/RS-274X *\r
 G04 PCB-Dimensions: 386000 393500 *\r
index 4e04a67..85c6961 100644 (file)
@@ -1,7 +1,7 @@
 G04 start of page 11 for group -4063 idx -4063 *\r
 G04 Title: (unknown), componentmask *\r
 G04 Creator: pcb 20110918 *\r
-G04 CreationDate: Thu 03 Oct 2013 10:13:16 GMT UTC *\r
+G04 CreationDate: Wed 09 Oct 2013 12:59:36 GMT UTC *\r
 G04 For: michael *\r
 G04 Format: Gerber/RS-274X *\r
 G04 PCB-Dimensions: 386000 393500 *\r
index 61165e2..b311869 100644 (file)
@@ -189,12 +189,12 @@ ChangePinName(U1, 29, P12[6])
 ChangePinName(U1, 28, P1[7])
 ChangePinName(U1, 27, P1[6])
 ChangePinName(U1, 26, VDDIO1)
-ChangePinName(U1, 25, P1[5])
-ChangePinName(U1, 24, P1[4])
-ChangePinName(U1, 23, "SWV,P1[3]")
+ChangePinName(U1, 25, "NTRST,P1[5]")
+ChangePinName(U1, 24, "TDI,P1[4]")
+ChangePinName(U1, 23, "SWV,TDO,P1[3]")
 ChangePinName(U1, 22, P1[2])
-ChangePinName(U1, 21, "SWDCK,P1[1]")
-ChangePinName(U1, 20, "SWDIO,P1[0]")
+ChangePinName(U1, 21, "SWDCK,TCK,P1[1]")
+ChangePinName(U1, 20, "SWDIO,TMS,P1[0]")
 ChangePinName(U1, 19, P5[3])
 ChangePinName(U1, 18, P5[2])
 ChangePinName(U1, 17, P5[1])
index a77931a..6bcf532 100644 (file)
@@ -1,17 +1,16 @@
-unnamed_net28  R5-1 J5-2 
-unnamed_net27  R4-1 J5-3 
-unnamed_net26  J5-4 
-unnamed_net25  D3-2 F2-2 
-unnamed_net24  J5-1 F2-1 
-unnamed_net23  D1-2 J3-1 
+unnamed_net27  R5-1 J5-2 
+unnamed_net26  R4-1 J5-3 
+unnamed_net25  J5-4 
+unnamed_net24  D3-2 F2-2 
+unnamed_net23  J5-1 F2-1 
+unnamed_net22  D1-2 J3-1 
 drive_5V       F1-2 D2-2 J3-2 
-unnamed_net22  R1-1 R2-1 C14-2 C7-2 U2-2 
-unnamed_net21  U1-55 
-unnamed_net20  U1-42 
-unnamed_net19  R5-2 U1-36 
-unnamed_net18  R4-2 U1-35 
-unnamed_net17  U1-25 
-unnamed_net16  U1-24 
+unnamed_net21  R1-1 R2-1 C14-2 C7-2 U2-2 
+unnamed_net20  U1-55 
+unnamed_net19  U1-42 
+unnamed_net18  R5-2 U1-36 
+unnamed_net17  R4-2 U1-35 
+unnamed_net16  U1-25 
 unnamed_net15  U1-22 
 unnamed_net14  U1-11 
 SD_DAT2        J6-1 U1-49 R12-1 
@@ -26,7 +25,7 @@ unnamed_net12 U1-63 C27-2
 unnamed_net11  U1-68 LED1-2 
 unnamed_net10  R3-1 LED1-1 
 unnamed_net9   U1-23 J4-6 
-unnamed_net8   J4-8 
+unnamed_net8   U1-24 J4-8 
 unnamed_net7   U1-15 J4-10 
 unnamed_net6   U1-21 J4-4 
 unnamed_net5   U1-20 J4-2 
index d40ed13..1763744 100644 (file)
@@ -6,7 +6,7 @@ FileVersion[20070407]
 PCB["" 386000 393500]
 
 Grid[500.0 0 0 1]
-Cursor[4000 234000 0.000000]
+Cursor[85500 251000 0.000000]
 PolyArea[200000000.000000]
 Thermal[0.500000]
 DRC[600 100 600 600 1200 600]
@@ -1668,7 +1668,7 @@ Element["" "wurth-microsd" "J6" "unknown" 245000 355000 22500 -33000 0 100 ""]
 
        )
 
-Element["" "FTSH-105-01-L-DV-K" "J4" "unknown" 134300 287000 -14800 -20300 0 100 ""]
+Element["" "FTSH-105-01-L-DV-K" "J4" "unknown" 134300 287000 -2300 -11800 0 100 ""]
 (
        Pad[-8456 20550 -356 20550 2900 2400 4100 "10" "10" "edge2"]
        Pad[-8456 15550 -356 15550 2900 2400 4100 "8" "8" "edge2"]
@@ -2605,6 +2605,10 @@ Layer(1 "component")
        Line[358000 60500 358000 49000 1000 1600 "clearline"]
        Line[358000 49000 358500 48500 1000 1600 "clearline"]
        Line[311500 107000 299500 107000 1000 1600 "clearline"]
+       Line[159941 293153 149347 293153 1000 1600 "clearline"]
+       Line[149347 293153 140000 302500 1000 1600 "clearline"]
+       Line[140000 302500 129944 302500 1000 1600 "clearline"]
+       Line[129944 302500 129894 302550 1000 1600 "clearline"]
        Polygon("clearpoly")
        (
                [227000 233000] [216500 233000] [216500 188000] [227000 188000] 
@@ -3294,7 +3298,7 @@ Layer(10 "silk")
        Line[17500 95000 500 95000 1000 1600 "clearline"]
        Line[500 95000 500 500 1000 1600 "clearline"]
        Line[500 500 385500 500 1000 1600 "clearline"]
-       Text[103500 278000 0 100 "5V" "clearline"]
+       Text[94500 284000 0 100 "5V" "clearline"]
        Text[137000 286000 0 50 "SWDIO" "clearline"]
        Text[137000 291000 0 50 "SWDCK" "clearline"]
        Text[138000 306500 0 50 "XRES" "clearline"]
@@ -3307,6 +3311,8 @@ Layer(10 "silk")
        Text[29000 312500 0 100 "Michael McMaster" "clearline"]
        Text[340500 123500 0 100 "2.85V" "clearline"]
        Text[172500 357500 0 100 "~ 500mA" "clearline"]
+       Text[108500 275500 0 100 "1" "clearline"]
+       Text[108500 268000 0 100 "JTAG/SWD" "clearline"]
        Polygon("clearpoly")
        (
                [307500 152500] [310000 152500] [310000 161000] [307500 161000] 
@@ -3772,6 +3778,7 @@ NetList()
        Net("unnamed_net8" "(unknown)")
        (
                Connect("J4-8")
+               Connect("U1-24")
        )
        Net("unnamed_net9" "(unknown)")
        (
@@ -3808,32 +3815,28 @@ NetList()
                Connect("U1-22")
        )
        Net("unnamed_net16" "(unknown)")
-       (
-               Connect("U1-24")
-       )
-       Net("unnamed_net17" "(unknown)")
        (
                Connect("U1-25")
        )
-       Net("unnamed_net18" "(unknown)")
+       Net("unnamed_net17" "(unknown)")
        (
                Connect("R4-2")
                Connect("U1-35")
        )
-       Net("unnamed_net19" "(unknown)")
+       Net("unnamed_net18" "(unknown)")
        (
                Connect("R5-2")
                Connect("U1-36")
        )
-       Net("unnamed_net20" "(unknown)")
+       Net("unnamed_net19" "(unknown)")
        (
                Connect("U1-42")
        )
-       Net("unnamed_net21" "(unknown)")
+       Net("unnamed_net20" "(unknown)")
        (
                Connect("U1-55")
        )
-       Net("unnamed_net22" "(unknown)")
+       Net("unnamed_net21" "(unknown)")
        (
                Connect("C7-2")
                Connect("C14-2")
@@ -3841,31 +3844,31 @@ NetList()
                Connect("R2-1")
                Connect("U2-2")
        )
-       Net("unnamed_net23" "(unknown)")
+       Net("unnamed_net22" "(unknown)")
        (
                Connect("D1-2")
                Connect("J3-1")
        )
-       Net("unnamed_net24" "(unknown)")
+       Net("unnamed_net23" "(unknown)")
        (
                Connect("F2-1")
                Connect("J5-1")
        )
-       Net("unnamed_net25" "(unknown)")
+       Net("unnamed_net24" "(unknown)")
        (
                Connect("D3-2")
                Connect("F2-2")
        )
-       Net("unnamed_net26" "(unknown)")
+       Net("unnamed_net25" "(unknown)")
        (
                Connect("J5-4")
        )
-       Net("unnamed_net27" "(unknown)")
+       Net("unnamed_net26" "(unknown)")
        (
                Connect("J5-3")
                Connect("R4-1")
        )
-       Net("unnamed_net28" "(unknown)")
+       Net("unnamed_net27" "(unknown)")
        (
                Connect("J5-2")
                Connect("R5-1")
index 1457b8f..edb46d8 100644 (file)
@@ -756,13 +756,6 @@ footprint=FTSH-105-01-L-DV-K
 N 44100 39300 45600 39300 2
 N 45600 39300 45600 44200 2
 N 45600 44200 46200 44200 2
-C 44100 39600 1 0 0 nc-right-1.sym
-{
-T 44200 40100 5 10 0 0 0 0 1
-value=NoConnection
-T 44200 40300 5 10 0 0 0 0 1
-device=DRC_Directive
-}
 N 44100 40100 44700 40100 4
 N 44700 40100 44700 38600 4
 N 44700 38600 46200 38600 4
@@ -2066,13 +2059,6 @@ refdes=J3
 T 35300 45300 5 10 0 0 0 0 1
 footprint=HEADER2_2
 }
-C 46200 38000 1 180 0 nc-right-1.sym
-{
-T 46100 37500 5 10 0 0 180 0 1
-value=NoConnection
-T 46100 37300 5 10 0 0 180 0 1
-device=DRC_Directive
-}
 C 46200 37300 1 180 0 nc-right-1.sym
 {
 T 46100 36800 5 10 0 0 180 0 1
@@ -2456,3 +2442,6 @@ T 68800 35700 5 10 0 0 0 0 1
 footprint=wurth-microsd
 }
 C 65100 37800 1 90 0 gnd-1.sym
+N 44100 39700 44400 39700 4
+N 44400 39700 44400 37900 4
+N 44400 37900 46200 37900 4
index e3e8510..4bfd79c 100644 (file)
@@ -215,7 +215,7 @@ pinnumber=20
 T 300 4550 5 8 0 1 0 8 1
 pinseq=20
 T 450 4600 9 8 1 1 0 0 1
-pinlabel=SWDIO,P1[0]
+pinlabel=SWDIO,TMS,P1[0]
 T 450 4600 5 8 0 1 0 2 1
 pintype=io
 }
@@ -226,7 +226,7 @@ pinnumber=21
 T 300 3850 5 8 0 1 0 8 1
 pinseq=21
 T 450 3900 9 8 1 1 0 0 1
-pinlabel=SWDCK,P1[1]
+pinlabel=SWDCK,TCK,P1[1]
 T 450 3900 5 8 0 1 0 2 1
 pintype=io
 }
@@ -248,7 +248,7 @@ pinnumber=23
 T 300 2450 5 8 0 1 0 8 1
 pinseq=23
 T 450 2500 9 8 1 1 0 0 1
-pinlabel=SWV,P1[3]
+pinlabel=SWV,TDO,P1[3]
 T 450 2500 5 8 0 1 0 2 1
 pintype=io
 }
@@ -259,7 +259,7 @@ pinnumber=24
 T 300 1750 5 8 0 1 0 8 1
 pinseq=24
 T 450 1800 9 8 1 1 0 0 1
-pinlabel=P1[4]
+pinlabel=TDI,P1[4]
 T 450 1800 5 8 0 1 0 2 1
 pintype=io
 }
@@ -270,7 +270,7 @@ pinnumber=25
 T 300 1050 5 8 0 1 0 8 1
 pinseq=25
 T 450 1100 9 8 1 1 0 0 1
-pinlabel=P1[5]
+pinlabel=NTRST,P1[5]
 T 450 1100 5 8 0 1 0 2 1
 pintype=io
 }
index f8d4915..c97edc0 100644 (file)
@@ -76,12 +76,12 @@ numslots=0
 17             io      line    l               P5[1]
 18             io      line    l               P5[2]
 19             io      line    l               P5[3]
-20             io      line    l               SWDIO,P1[0]
-21             io      line    l               SWDCK,P1[1]
+20             io      line    l               SWDIO,TMS,P1[0]
+21             io      line    l               SWDCK,TCK,P1[1]
 22             io      line    l               P1[2]
-23             io      line    l               SWV,P1[3]
-24             io      line    l               P1[4]
-25             io      line    l               P1[5]
+23             io      line    l               SWV,TDO,P1[3]
+24             io      line    l               TDI,P1[4]
+25             io      line    l               NTRST,P1[5]
 
 
 26             pwr     line    b               VDDIO1