-201404?? 3.4
+20140418 3.4
+ - Critical fix for writes when using non-standard block sizes.
- Fix to ensure SCSI phase bits are set atomically.
- Always return the requested number of bytes for a REQUEST SENSE command
This is required to support the Ensoniq ASR-10.
- Decreased (unused) heap and stack sizes to prepare for a memory
write cache
+ - Increased the maximum sector size to 8192 bytes.
20140416 3.3
- Fix to SCSI Reset handling to avoid lockups
EMU Emulator E4X with EOS 3.00b and E6400 (classic) with Eos 4.01
Ensoniq ASR-X, ASR-10 (from v3.4, 2GB size limit)
HP 16601A logic analyzer
+ Apple IIgs using Apple II High Speed SCSI controller card (from v3.3)
+ Symbolics List Machine XL1200, using 1280 byte sectors (from v3.4)
define symbol __ICFEDIT_region_RAM_end__ = 0x20000000 + (32768 / 2) - 1;\r
/*-Sizes-*/\r
define symbol __ICFEDIT_size_cstack__ = 0x2000;\r
-define symbol __ICFEDIT_size_heap__ = 0x0256;\r
+define symbol __ICFEDIT_size_heap__ = 0x0400;\r
/**** End of ICF editor section. ###ICF###*/\r
\r
\r
.ANY (+RW, +ZI)\r
}\r
\r
- ARM_LIB_HEAP (0x20000000 + (32768 / 2) - 0x0256 - 0x2000) EMPTY 0x0256\r
+ ARM_LIB_HEAP (0x20000000 + (32768 / 2) - 0x0400 - 0x2000) EMPTY 0x0400\r
{\r
}\r
\r
--- /dev/null
+/*******************************************************************************
+* File Name: Debug_Timer.c
+* Version 2.50
+*
+* Description:
+* The Timer component consists of a 8, 16, 24 or 32-bit timer with
+* a selectable period between 2 and 2^Width - 1. The timer may free run
+* or be used as a capture timer as well. The capture can be initiated
+* by a positive or negative edge signal as well as via software.
+* A trigger input can be programmed to enable the timer on rising edge
+* falling edge, either edge or continous run.
+* Interrupts may be generated due to a terminal count condition
+* or a capture event.
+*
+* Note:
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+********************************************************************************/
+
+#include "Debug_Timer.h"
+
+uint8 Debug_Timer_initVar = 0u;
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Init
+********************************************************************************
+*
+* Summary:
+* Initialize to the schematic state
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_Init(void)
+{
+ #if(!Debug_Timer_UsingFixedFunction)
+ /* Interrupt State Backup for Critical Region*/
+ uint8 Debug_Timer_interruptState;
+ #endif /* Interrupt state back up for Fixed Function only */
+
+ #if (Debug_Timer_UsingFixedFunction)
+ /* Clear all bits but the enable bit (if it's already set) for Timer operation */
+ Debug_Timer_CONTROL &= Debug_Timer_CTRL_ENABLE;
+
+ /* Clear the mode bits for continuous run mode */
+ #if (CY_PSOC5A)
+ Debug_Timer_CONTROL2 &= ((uint8)(~Debug_Timer_CTRL_MODE_MASK));
+ #endif /* Clear bits in CONTROL2 only in PSOC5A */
+
+ #if (CY_PSOC3 || CY_PSOC5LP)
+ Debug_Timer_CONTROL3 &= ((uint8)(~Debug_Timer_CTRL_MODE_MASK));
+ #endif /* CONTROL3 register exists only in PSoC3 OR PSoC5LP */
+
+ /* Check if One Shot mode is enabled i.e. RunMode !=0*/
+ #if (Debug_Timer_RunModeUsed != 0x0u)
+ /* Set 3rd bit of Control register to enable one shot mode */
+ Debug_Timer_CONTROL |= 0x04u;
+ #endif /* One Shot enabled only when RunModeUsed is not Continuous*/
+
+ #if (Debug_Timer_RunModeUsed == 2)
+ #if (CY_PSOC5A)
+ /* Set last 2 bits of control2 register if one shot(halt on
+ interrupt) is enabled*/
+ Debug_Timer_CONTROL2 |= 0x03u;
+ #endif /* Set One-Shot Halt on Interrupt bit in CONTROL2 for PSoC5A */
+
+ #if (CY_PSOC3 || CY_PSOC5LP)
+ /* Set last 2 bits of control3 register if one shot(halt on
+ interrupt) is enabled*/
+ Debug_Timer_CONTROL3 |= 0x03u;
+ #endif /* Set One-Shot Halt on Interrupt bit in CONTROL3 for PSoC3 or PSoC5LP */
+
+ #endif /* Remove section if One Shot Halt on Interrupt is not enabled */
+
+ #if (Debug_Timer_UsingHWEnable != 0)
+ #if (CY_PSOC5A)
+ /* Set the default Run Mode of the Timer to Continuous */
+ Debug_Timer_CONTROL2 |= Debug_Timer_CTRL_MODE_PULSEWIDTH;
+ #endif /* Set Continuous Run Mode in CONTROL2 for PSoC5A */
+
+ #if (CY_PSOC3 || CY_PSOC5LP)
+ /* Clear and Set ROD and COD bits of CFG2 register */
+ Debug_Timer_CONTROL3 &= ((uint8)(~Debug_Timer_CTRL_RCOD_MASK));
+ Debug_Timer_CONTROL3 |= Debug_Timer_CTRL_RCOD;
+
+ /* Clear and Enable the HW enable bit in CFG2 register */
+ Debug_Timer_CONTROL3 &= ((uint8)(~Debug_Timer_CTRL_ENBL_MASK));
+ Debug_Timer_CONTROL3 |= Debug_Timer_CTRL_ENBL;
+
+ /* Set the default Run Mode of the Timer to Continuous */
+ Debug_Timer_CONTROL3 |= Debug_Timer_CTRL_MODE_CONTINUOUS;
+ #endif /* Set Continuous Run Mode in CONTROL3 for PSoC3ES3 or PSoC5A */
+
+ #endif /* Configure Run Mode with hardware enable */
+
+ /* Clear and Set SYNCTC and SYNCCMP bits of RT1 register */
+ Debug_Timer_RT1 &= ((uint8)(~Debug_Timer_RT1_MASK));
+ Debug_Timer_RT1 |= Debug_Timer_SYNC;
+
+ /*Enable DSI Sync all all inputs of the Timer*/
+ Debug_Timer_RT1 &= ((uint8)(~Debug_Timer_SYNCDSI_MASK));
+ Debug_Timer_RT1 |= Debug_Timer_SYNCDSI_EN;
+
+ /* Set the IRQ to use the status register interrupts */
+ Debug_Timer_CONTROL2 |= Debug_Timer_CTRL2_IRQ_SEL;
+ #endif /* Configuring registers of fixed function implementation */
+
+ /* Set Initial values from Configuration */
+ Debug_Timer_WritePeriod(Debug_Timer_INIT_PERIOD);
+ Debug_Timer_WriteCounter(Debug_Timer_INIT_PERIOD);
+
+ #if (Debug_Timer_UsingHWCaptureCounter)/* Capture counter is enabled */
+ Debug_Timer_CAPTURE_COUNT_CTRL |= Debug_Timer_CNTR_ENABLE;
+ Debug_Timer_SetCaptureCount(Debug_Timer_INIT_CAPTURE_COUNT);
+ #endif /* Configure capture counter value */
+
+ #if (!Debug_Timer_UsingFixedFunction)
+ #if (Debug_Timer_SoftwareCaptureMode)
+ Debug_Timer_SetCaptureMode(Debug_Timer_INIT_CAPTURE_MODE);
+ #endif /* Set Capture Mode for UDB implementation if capture mode is software controlled */
+
+ #if (Debug_Timer_SoftwareTriggerMode)
+ if (0u == (Debug_Timer_CONTROL & Debug_Timer__B_TIMER__TM_SOFTWARE))
+ {
+ Debug_Timer_SetTriggerMode(Debug_Timer_INIT_TRIGGER_MODE);
+ }
+ #endif /* Set trigger mode for UDB Implementation if trigger mode is software controlled */
+
+ /* CyEnterCriticalRegion and CyExitCriticalRegion are used to mark following region critical*/
+ /* Enter Critical Region*/
+ Debug_Timer_interruptState = CyEnterCriticalSection();
+
+ /* Use the interrupt output of the status register for IRQ output */
+ Debug_Timer_STATUS_AUX_CTRL |= Debug_Timer_STATUS_ACTL_INT_EN_MASK;
+
+ /* Exit Critical Region*/
+ CyExitCriticalSection(Debug_Timer_interruptState);
+
+ #if (Debug_Timer_EnableTriggerMode)
+ Debug_Timer_EnableTrigger();
+ #endif /* Set Trigger enable bit for UDB implementation in the control register*/
+
+ #if (Debug_Timer_InterruptOnCaptureCount)
+ #if (!Debug_Timer_ControlRegRemoved)
+ Debug_Timer_SetInterruptCount(Debug_Timer_INIT_INT_CAPTURE_COUNT);
+ #endif /* Set interrupt count in control register if control register is not removed */
+ #endif /*Set interrupt count in UDB implementation if interrupt count feature is checked.*/
+
+ Debug_Timer_ClearFIFO();
+ #endif /* Configure additional features of UDB implementation */
+
+ Debug_Timer_SetInterruptMode(Debug_Timer_INIT_INTERRUPT_MODE);
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Enable
+********************************************************************************
+*
+* Summary:
+* Enable the Timer
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_Enable(void)
+{
+ /* Globally Enable the Fixed Function Block chosen */
+ #if (Debug_Timer_UsingFixedFunction)
+ Debug_Timer_GLOBAL_ENABLE |= Debug_Timer_BLOCK_EN_MASK;
+ Debug_Timer_GLOBAL_STBY_ENABLE |= Debug_Timer_BLOCK_STBY_EN_MASK;
+ #endif /* Set Enable bit for enabling Fixed function timer*/
+
+ /* Remove assignment if control register is removed */
+ #if (!Debug_Timer_ControlRegRemoved || Debug_Timer_UsingFixedFunction)
+ Debug_Timer_CONTROL |= Debug_Timer_CTRL_ENABLE;
+ #endif /* Remove assignment if control register is removed */
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Start
+********************************************************************************
+*
+* Summary:
+* The start function initializes the timer with the default values, the
+* enables the timerto begin counting. It does not enable interrupts,
+* the EnableInt command should be called if interrupt generation is required.
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+* Global variables:
+* Debug_Timer_initVar: Is modified when this function is called for the
+* first time. Is used to ensure that initialization happens only once.
+*
+*******************************************************************************/
+void Debug_Timer_Start(void)
+{
+ if(Debug_Timer_initVar == 0u)
+ {
+ Debug_Timer_Init();
+
+ Debug_Timer_initVar = 1u; /* Clear this bit for Initialization */
+ }
+
+ /* Enable the Timer */
+ Debug_Timer_Enable();
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Stop
+********************************************************************************
+*
+* Summary:
+* The stop function halts the timer, but does not change any modes or disable
+* interrupts.
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+* Side Effects: If the Enable mode is set to Hardware only then this function
+* has no effect on the operation of the timer.
+*
+*******************************************************************************/
+void Debug_Timer_Stop(void)
+{
+ /* Disable Timer */
+ #if(!Debug_Timer_ControlRegRemoved || Debug_Timer_UsingFixedFunction)
+ Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_ENABLE));
+ #endif /* Remove assignment if control register is removed */
+
+ /* Globally disable the Fixed Function Block chosen */
+ #if (Debug_Timer_UsingFixedFunction)
+ Debug_Timer_GLOBAL_ENABLE &= ((uint8)(~Debug_Timer_BLOCK_EN_MASK));
+ Debug_Timer_GLOBAL_STBY_ENABLE &= ((uint8)(~Debug_Timer_BLOCK_STBY_EN_MASK));
+ #endif /* Disable global enable for the Timer Fixed function block to stop the Timer*/
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_SetInterruptMode
+********************************************************************************
+*
+* Summary:
+* This function selects which of the interrupt inputs may cause an interrupt.
+* The twosources are caputure and terminal. One, both or neither may
+* be selected.
+*
+* Parameters:
+* interruptMode: This parameter is used to enable interrups on either/or
+* terminal count or capture.
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_SetInterruptMode(uint8 interruptMode)
+{
+ Debug_Timer_STATUS_MASK = interruptMode;
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_SoftwareCapture
+********************************************************************************
+*
+* Summary:
+* This function forces a capture independent of the capture signal.
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+* Side Effects:
+* An existing hardware capture could be overwritten.
+*
+*******************************************************************************/
+void Debug_Timer_SoftwareCapture(void)
+{
+ /* Generate a software capture by reading the counter register */
+ (void)Debug_Timer_COUNTER_LSB;
+ /* Capture Data is now in the FIFO */
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_ReadStatusRegister
+********************************************************************************
+*
+* Summary:
+* Reads the status register and returns it's state. This function should use
+* defined types for the bit-field information as the bits in this register may
+* be permuteable.
+*
+* Parameters:
+* void
+*
+* Return:
+* The contents of the status register
+*
+* Side Effects:
+* Status register bits may be clear on read.
+*
+*******************************************************************************/
+uint8 Debug_Timer_ReadStatusRegister(void)
+{
+ return (Debug_Timer_STATUS);
+}
+
+
+#if (!Debug_Timer_ControlRegRemoved) /* Remove API if control register is removed */
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_ReadControlRegister
+********************************************************************************
+*
+* Summary:
+* Reads the control register and returns it's value.
+*
+* Parameters:
+* void
+*
+* Return:
+* The contents of the control register
+*
+*******************************************************************************/
+uint8 Debug_Timer_ReadControlRegister(void)
+{
+ return ((uint8)Debug_Timer_CONTROL);
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_WriteControlRegister
+********************************************************************************
+*
+* Summary:
+* Sets the bit-field of the control register.
+*
+* Parameters:
+* control: The contents of the control register
+*
+* Return:
+*
+*******************************************************************************/
+void Debug_Timer_WriteControlRegister(uint8 control)
+{
+ Debug_Timer_CONTROL = control;
+}
+#endif /* Remove API if control register is removed */
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_ReadPeriod
+********************************************************************************
+*
+* Summary:
+* This function returns the current value of the Period.
+*
+* Parameters:
+* void
+*
+* Return:
+* The present value of the counter.
+*
+*******************************************************************************/
+uint16 Debug_Timer_ReadPeriod(void)
+{
+ #if(Debug_Timer_UsingFixedFunction)
+ return ((uint16)CY_GET_REG16(Debug_Timer_PERIOD_LSB_PTR));
+ #else
+ return (CY_GET_REG16(Debug_Timer_PERIOD_LSB_PTR));
+ #endif /* (Debug_Timer_UsingFixedFunction) */
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_WritePeriod
+********************************************************************************
+*
+* Summary:
+* This function is used to change the period of the counter. The new period
+* will be loaded the next time terminal count is detected.
+*
+* Parameters:
+* period: This value may be between 1 and (2^Resolution)-1. A value of 0 will
+* result in the counter remaining at zero.
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_WritePeriod(uint16 period)
+{
+ #if(Debug_Timer_UsingFixedFunction)
+ uint16 period_temp = (uint16)period;
+ CY_SET_REG16(Debug_Timer_PERIOD_LSB_PTR, period_temp);
+ #else
+ CY_SET_REG16(Debug_Timer_PERIOD_LSB_PTR, period);
+ #endif /*Write Period value with appropriate resolution suffix depending on UDB or fixed function implementation */
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_ReadCapture
+********************************************************************************
+*
+* Summary:
+* This function returns the last value captured.
+*
+* Parameters:
+* void
+*
+* Return:
+* Present Capture value.
+*
+*******************************************************************************/
+uint16 Debug_Timer_ReadCapture(void)
+{
+ #if(Debug_Timer_UsingFixedFunction)
+ return ((uint16)CY_GET_REG16(Debug_Timer_CAPTURE_LSB_PTR));
+ #else
+ return (CY_GET_REG16(Debug_Timer_CAPTURE_LSB_PTR));
+ #endif /* (Debug_Timer_UsingFixedFunction) */
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_WriteCounter
+********************************************************************************
+*
+* Summary:
+* This funtion is used to set the counter to a specific value
+*
+* Parameters:
+* counter: New counter value.
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_WriteCounter(uint16 counter) \
+
+{
+ #if(Debug_Timer_UsingFixedFunction)
+ /* This functionality is removed until a FixedFunction HW update to
+ * allow this register to be written
+ */
+ CY_SET_REG16(Debug_Timer_COUNTER_LSB_PTR, (uint16)counter);
+
+ #else
+ CY_SET_REG16(Debug_Timer_COUNTER_LSB_PTR, counter);
+ #endif /* Set Write Counter only for the UDB implementation (Write Counter not available in fixed function Timer */
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_ReadCounter
+********************************************************************************
+*
+* Summary:
+* This function returns the current counter value.
+*
+* Parameters:
+* void
+*
+* Return:
+* Present compare value.
+*
+*******************************************************************************/
+uint16 Debug_Timer_ReadCounter(void)
+{
+
+ /* Force capture by reading Accumulator */
+ /* Must first do a software capture to be able to read the counter */
+ /* It is up to the user code to make sure there isn't already captured data in the FIFO */
+ (void)Debug_Timer_COUNTER_LSB;
+
+ /* Read the data from the FIFO (or capture register for Fixed Function)*/
+ #if(Debug_Timer_UsingFixedFunction)
+ return ((uint16)CY_GET_REG16(Debug_Timer_CAPTURE_LSB_PTR));
+ #else
+ return (CY_GET_REG16(Debug_Timer_CAPTURE_LSB_PTR));
+ #endif /* (Debug_Timer_UsingFixedFunction) */
+}
+
+
+#if(!Debug_Timer_UsingFixedFunction) /* UDB Specific Functions */
+
+/*******************************************************************************
+ * The functions below this point are only available using the UDB
+ * implementation. If a feature is selected, then the API is enabled.
+ ******************************************************************************/
+
+
+#if (Debug_Timer_SoftwareCaptureMode)
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_SetCaptureMode
+********************************************************************************
+*
+* Summary:
+* This function sets the capture mode to either rising or falling edge.
+*
+* Parameters:
+* captureMode: This parameter sets the capture mode of the UDB capture feature
+* The parameter values are defined using the
+* #define Debug_Timer__B_TIMER__CM_NONE 0
+#define Debug_Timer__B_TIMER__CM_RISINGEDGE 1
+#define Debug_Timer__B_TIMER__CM_FALLINGEDGE 2
+#define Debug_Timer__B_TIMER__CM_EITHEREDGE 3
+#define Debug_Timer__B_TIMER__CM_SOFTWARE 4
+ identifiers
+* The following are the possible values of the parameter
+* Debug_Timer__B_TIMER__CM_NONE - Set Capture mode to None
+* Debug_Timer__B_TIMER__CM_RISINGEDGE - Rising edge of Capture input
+* Debug_Timer__B_TIMER__CM_FALLINGEDGE - Falling edge of Capture input
+* Debug_Timer__B_TIMER__CM_EITHEREDGE - Either edge of Capture input
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_SetCaptureMode(uint8 captureMode)
+{
+ /* This must only set to two bits of the control register associated */
+ captureMode = ((uint8)((uint8)captureMode << Debug_Timer_CTRL_CAP_MODE_SHIFT));
+ captureMode &= (Debug_Timer_CTRL_CAP_MODE_MASK);
+
+ /* Clear the Current Setting */
+ Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_CAP_MODE_MASK));
+
+ /* Write The New Setting */
+ Debug_Timer_CONTROL |= captureMode;
+}
+#endif /* Remove API if Capture Mode is not Software Controlled */
+
+
+#if (Debug_Timer_SoftwareTriggerMode)
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_SetTriggerMode
+********************************************************************************
+*
+* Summary:
+* This function sets the trigger input mode
+*
+* Parameters:
+* triggerMode: Pass one of the pre-defined Trigger Modes (except Software)
+ #define Debug_Timer__B_TIMER__TM_NONE 0x00u
+ #define Debug_Timer__B_TIMER__TM_RISINGEDGE 0x04u
+ #define Debug_Timer__B_TIMER__TM_FALLINGEDGE 0x08u
+ #define Debug_Timer__B_TIMER__TM_EITHEREDGE 0x0Cu
+ #define Debug_Timer__B_TIMER__TM_SOFTWARE 0x10u
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_SetTriggerMode(uint8 triggerMode)
+{
+ /* This must only set to two bits of the control register associated */
+ triggerMode &= Debug_Timer_CTRL_TRIG_MODE_MASK;
+
+ /* Clear the Current Setting */
+ Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_TRIG_MODE_MASK));
+
+ /* Write The New Setting */
+ Debug_Timer_CONTROL |= (triggerMode | Debug_Timer__B_TIMER__TM_SOFTWARE);
+
+}
+#endif /* Remove API if Trigger Mode is not Software Controlled */
+
+#if (Debug_Timer_EnableTriggerMode)
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_EnableTrigger
+********************************************************************************
+*
+* Summary:
+* Sets the control bit enabling Hardware Trigger mode
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_EnableTrigger(void)
+{
+ #if (!Debug_Timer_ControlRegRemoved) /* Remove assignment if control register is removed */
+ Debug_Timer_CONTROL |= Debug_Timer_CTRL_TRIG_EN;
+ #endif /* Remove code section if control register is not used */
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_DisableTrigger
+********************************************************************************
+*
+* Summary:
+* Clears the control bit enabling Hardware Trigger mode
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_DisableTrigger(void)
+{
+ #if (!Debug_Timer_ControlRegRemoved) /* Remove assignment if control register is removed */
+ Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_TRIG_EN));
+ #endif /* Remove code section if control register is not used */
+}
+#endif /* Remove API is Trigger Mode is set to None */
+
+
+#if(Debug_Timer_InterruptOnCaptureCount)
+#if (!Debug_Timer_ControlRegRemoved) /* Remove API if control register is removed */
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_SetInterruptCount
+********************************************************************************
+*
+* Summary:
+* This function sets the capture count before an interrupt is triggered.
+*
+* Parameters:
+* interruptCount: A value between 0 and 3 is valid. If the value is 0, then
+* an interrupt will occur each time a capture occurs.
+* A value of 1 to 3 will cause the interrupt
+* to delay by the same number of captures.
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_SetInterruptCount(uint8 interruptCount)
+{
+ /* This must only set to two bits of the control register associated */
+ interruptCount &= Debug_Timer_CTRL_INTCNT_MASK;
+
+ /* Clear the Current Setting */
+ Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_INTCNT_MASK));
+ /* Write The New Setting */
+ Debug_Timer_CONTROL |= interruptCount;
+}
+#endif /* Remove API if control register is removed */
+#endif /* Debug_Timer_InterruptOnCaptureCount */
+
+
+#if (Debug_Timer_UsingHWCaptureCounter)
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_SetCaptureCount
+********************************************************************************
+*
+* Summary:
+* This function sets the capture count
+*
+* Parameters:
+* captureCount: A value between 2 and 127 inclusive is valid. A value of 1
+* to 127 will cause the interrupt to delay by the same number of
+* captures.
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_SetCaptureCount(uint8 captureCount)
+{
+ Debug_Timer_CAP_COUNT = captureCount;
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_ReadCaptureCount
+********************************************************************************
+*
+* Summary:
+* This function reads the capture count setting
+*
+* Parameters:
+* void
+*
+* Return:
+* Returns the Capture Count Setting
+*
+*******************************************************************************/
+uint8 Debug_Timer_ReadCaptureCount(void)
+{
+ return ((uint8)Debug_Timer_CAP_COUNT);
+}
+#endif /* Debug_Timer_UsingHWCaptureCounter */
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_ClearFIFO
+********************************************************************************
+*
+* Summary:
+* This function clears all capture data from the capture FIFO
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+*******************************************************************************/
+void Debug_Timer_ClearFIFO(void)
+{
+ while(0u != (Debug_Timer_ReadStatusRegister() & Debug_Timer_STATUS_FIFONEMP))
+ {
+ (void)Debug_Timer_ReadCapture();
+ }
+}
+
+#endif /* UDB Specific Functions */
+
+
+/* [] END OF FILE */
--- /dev/null
+/*******************************************************************************
+* File Name: Debug_Timer.h
+* Version 2.50
+*
+* Description:
+* Contains the function prototypes and constants available to the timer
+* user module.
+*
+* Note:
+* None
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+********************************************************************************/
+
+#if !defined(CY_Timer_v2_30_Debug_Timer_H)
+#define CY_Timer_v2_30_Debug_Timer_H
+
+#include "cytypes.h"
+#include "cyfitter.h"
+#include "CyLib.h" /* For CyEnterCriticalSection() and CyExitCriticalSection() functions */
+
+extern uint8 Debug_Timer_initVar;
+
+/* Check to see if required defines such as CY_PSOC5LP are available */
+/* They are defined starting with cy_boot v3.0 */
+#if !defined (CY_PSOC5LP)
+ #error Component Timer_v2_50 requires cy_boot v3.0 or later
+#endif /* (CY_ PSOC5LP) */
+
+
+/**************************************
+* Parameter Defaults
+**************************************/
+
+#define Debug_Timer_Resolution 16u
+#define Debug_Timer_UsingFixedFunction 1u
+#define Debug_Timer_UsingHWCaptureCounter 0u
+#define Debug_Timer_SoftwareCaptureMode 0u
+#define Debug_Timer_SoftwareTriggerMode 0u
+#define Debug_Timer_UsingHWEnable 0u
+#define Debug_Timer_EnableTriggerMode 0u
+#define Debug_Timer_InterruptOnCaptureCount 0u
+#define Debug_Timer_RunModeUsed 0u
+#define Debug_Timer_ControlRegRemoved 0u
+
+
+/***************************************
+* Type defines
+***************************************/
+
+
+/**************************************************************************
+ * Sleep Wakeup Backup structure for Timer Component
+ *************************************************************************/
+typedef struct
+{
+ uint8 TimerEnableState;
+ #if(!Debug_Timer_UsingFixedFunction)
+ #if (CY_UDB_V0)
+ uint16 TimerUdb; /* Timer internal counter value */
+ uint16 TimerPeriod; /* Timer Period value */
+ uint8 InterruptMaskValue; /* Timer Compare Value */
+ #if (Debug_Timer_UsingHWCaptureCounter)
+ uint8 TimerCaptureCounter; /* Timer Capture Counter Value */
+ #endif /* variable declaration for backing up Capture Counter value*/
+ #endif /* variables for non retention registers in CY_UDB_V0 */
+
+ #if (CY_UDB_V1)
+ uint16 TimerUdb;
+ uint8 InterruptMaskValue;
+ #if (Debug_Timer_UsingHWCaptureCounter)
+ uint8 TimerCaptureCounter;
+ #endif /* variable declarations for backing up non retention registers in CY_UDB_V1 */
+ #endif /* (CY_UDB_V1) */
+
+ #if (!Debug_Timer_ControlRegRemoved)
+ uint8 TimerControlRegister;
+ #endif /* variable declaration for backing up enable state of the Timer */
+ #endif /* define backup variables only for UDB implementation. Fixed function registers are all retention */
+}Debug_Timer_backupStruct;
+
+
+/***************************************
+* Function Prototypes
+***************************************/
+
+void Debug_Timer_Start(void) ;
+void Debug_Timer_Stop(void) ;
+
+void Debug_Timer_SetInterruptMode(uint8 interruptMode) ;
+uint8 Debug_Timer_ReadStatusRegister(void) ;
+/* Deprecated function. Do not use this in future. Retained for backward compatibility */
+#define Debug_Timer_GetInterruptSource() Debug_Timer_ReadStatusRegister()
+
+#if(!Debug_Timer_ControlRegRemoved)
+ uint8 Debug_Timer_ReadControlRegister(void) ;
+ void Debug_Timer_WriteControlRegister(uint8 control) \
+ ;
+#endif /* (!Debug_Timer_ControlRegRemoved) */
+
+uint16 Debug_Timer_ReadPeriod(void) ;
+void Debug_Timer_WritePeriod(uint16 period) \
+ ;
+uint16 Debug_Timer_ReadCounter(void) ;
+void Debug_Timer_WriteCounter(uint16 counter) \
+ ;
+uint16 Debug_Timer_ReadCapture(void) ;
+void Debug_Timer_SoftwareCapture(void) ;
+
+
+#if(!Debug_Timer_UsingFixedFunction) /* UDB Prototypes */
+ #if (Debug_Timer_SoftwareCaptureMode)
+ void Debug_Timer_SetCaptureMode(uint8 captureMode) ;
+ #endif /* (!Debug_Timer_UsingFixedFunction) */
+
+ #if (Debug_Timer_SoftwareTriggerMode)
+ void Debug_Timer_SetTriggerMode(uint8 triggerMode) ;
+ #endif /* (Debug_Timer_SoftwareTriggerMode) */
+ #if (Debug_Timer_EnableTriggerMode)
+ void Debug_Timer_EnableTrigger(void) ;
+ void Debug_Timer_DisableTrigger(void) ;
+ #endif /* (Debug_Timer_EnableTriggerMode) */
+
+ #if(Debug_Timer_InterruptOnCaptureCount)
+ #if(!Debug_Timer_ControlRegRemoved)
+ void Debug_Timer_SetInterruptCount(uint8 interruptCount) \
+ ;
+ #endif /* (!Debug_Timer_ControlRegRemoved) */
+ #endif /* (Debug_Timer_InterruptOnCaptureCount) */
+
+ #if (Debug_Timer_UsingHWCaptureCounter)
+ void Debug_Timer_SetCaptureCount(uint8 captureCount) \
+ ;
+ uint8 Debug_Timer_ReadCaptureCount(void) ;
+ #endif /* (Debug_Timer_UsingHWCaptureCounter) */
+
+ void Debug_Timer_ClearFIFO(void) ;
+#endif /* UDB Prototypes */
+
+/* Sleep Retention APIs */
+void Debug_Timer_Init(void) ;
+void Debug_Timer_Enable(void) ;
+void Debug_Timer_SaveConfig(void) ;
+void Debug_Timer_RestoreConfig(void) ;
+void Debug_Timer_Sleep(void) ;
+void Debug_Timer_Wakeup(void) ;
+
+
+/***************************************
+* Enumerated Types and Parameters
+***************************************/
+
+/* Enumerated Type B_Timer__CaptureModes, Used in Capture Mode */
+#define Debug_Timer__B_TIMER__CM_NONE 0
+#define Debug_Timer__B_TIMER__CM_RISINGEDGE 1
+#define Debug_Timer__B_TIMER__CM_FALLINGEDGE 2
+#define Debug_Timer__B_TIMER__CM_EITHEREDGE 3
+#define Debug_Timer__B_TIMER__CM_SOFTWARE 4
+
+
+
+/* Enumerated Type B_Timer__TriggerModes, Used in Trigger Mode */
+#define Debug_Timer__B_TIMER__TM_NONE 0x00u
+#define Debug_Timer__B_TIMER__TM_RISINGEDGE 0x04u
+#define Debug_Timer__B_TIMER__TM_FALLINGEDGE 0x08u
+#define Debug_Timer__B_TIMER__TM_EITHEREDGE 0x0Cu
+#define Debug_Timer__B_TIMER__TM_SOFTWARE 0x10u
+
+
+/***************************************
+* Initialial Parameter Constants
+***************************************/
+
+#define Debug_Timer_INIT_PERIOD 31999u
+#define Debug_Timer_INIT_CAPTURE_MODE ((uint8)((uint8)0u << Debug_Timer_CTRL_CAP_MODE_SHIFT))
+#define Debug_Timer_INIT_TRIGGER_MODE ((uint8)((uint8)0u << Debug_Timer_CTRL_TRIG_MODE_SHIFT))
+#if (Debug_Timer_UsingFixedFunction)
+ #define Debug_Timer_INIT_INTERRUPT_MODE (((uint8)((uint8)0u << Debug_Timer_STATUS_TC_INT_MASK_SHIFT)) | \
+ ((uint8)((uint8)0 << Debug_Timer_STATUS_CAPTURE_INT_MASK_SHIFT)))
+#else
+ #define Debug_Timer_INIT_INTERRUPT_MODE (((uint8)((uint8)0u << Debug_Timer_STATUS_TC_INT_MASK_SHIFT)) | \
+ ((uint8)((uint8)0 << Debug_Timer_STATUS_CAPTURE_INT_MASK_SHIFT)) | \
+ ((uint8)((uint8)0 << Debug_Timer_STATUS_FIFOFULL_INT_MASK_SHIFT)))
+#endif /* (Debug_Timer_UsingFixedFunction) */
+#define Debug_Timer_INIT_CAPTURE_COUNT (2u)
+#define Debug_Timer_INIT_INT_CAPTURE_COUNT ((uint8)((uint8)(1u - 1u) << Debug_Timer_CTRL_INTCNT_SHIFT))
+
+
+/***************************************
+* Registers
+***************************************/
+
+#if (Debug_Timer_UsingFixedFunction) /* Implementation Specific Registers and Register Constants */
+
+
+ /***************************************
+ * Fixed Function Registers
+ ***************************************/
+
+ #define Debug_Timer_STATUS (*(reg8 *) Debug_Timer_TimerHW__SR0 )
+ /* In Fixed Function Block Status and Mask are the same register */
+ #define Debug_Timer_STATUS_MASK (*(reg8 *) Debug_Timer_TimerHW__SR0 )
+ #define Debug_Timer_CONTROL (*(reg8 *) Debug_Timer_TimerHW__CFG0)
+ #define Debug_Timer_CONTROL2 (*(reg8 *) Debug_Timer_TimerHW__CFG1)
+ #define Debug_Timer_CONTROL2_PTR ( (reg8 *) Debug_Timer_TimerHW__CFG1)
+ #define Debug_Timer_RT1 (*(reg8 *) Debug_Timer_TimerHW__RT1)
+ #define Debug_Timer_RT1_PTR ( (reg8 *) Debug_Timer_TimerHW__RT1)
+
+ #if (CY_PSOC3 || CY_PSOC5LP)
+ #define Debug_Timer_CONTROL3 (*(reg8 *) Debug_Timer_TimerHW__CFG2)
+ #define Debug_Timer_CONTROL3_PTR ( (reg8 *) Debug_Timer_TimerHW__CFG2)
+ #endif /* (CY_PSOC3 || CY_PSOC5LP) */
+ #define Debug_Timer_GLOBAL_ENABLE (*(reg8 *) Debug_Timer_TimerHW__PM_ACT_CFG)
+ #define Debug_Timer_GLOBAL_STBY_ENABLE (*(reg8 *) Debug_Timer_TimerHW__PM_STBY_CFG)
+
+ #define Debug_Timer_CAPTURE_LSB (* (reg16 *) Debug_Timer_TimerHW__CAP0 )
+ #define Debug_Timer_CAPTURE_LSB_PTR ((reg16 *) Debug_Timer_TimerHW__CAP0 )
+ #define Debug_Timer_PERIOD_LSB (* (reg16 *) Debug_Timer_TimerHW__PER0 )
+ #define Debug_Timer_PERIOD_LSB_PTR ((reg16 *) Debug_Timer_TimerHW__PER0 )
+ #define Debug_Timer_COUNTER_LSB (* (reg16 *) Debug_Timer_TimerHW__CNT_CMP0 )
+ #define Debug_Timer_COUNTER_LSB_PTR ((reg16 *) Debug_Timer_TimerHW__CNT_CMP0 )
+
+
+ /***************************************
+ * Register Constants
+ ***************************************/
+
+ /* Fixed Function Block Chosen */
+ #define Debug_Timer_BLOCK_EN_MASK Debug_Timer_TimerHW__PM_ACT_MSK
+ #define Debug_Timer_BLOCK_STBY_EN_MASK Debug_Timer_TimerHW__PM_STBY_MSK
+
+ /* Control Register Bit Locations */
+ /* Interrupt Count - Not valid for Fixed Function Block */
+ #define Debug_Timer_CTRL_INTCNT_SHIFT 0x00u
+ /* Trigger Polarity - Not valid for Fixed Function Block */
+ #define Debug_Timer_CTRL_TRIG_MODE_SHIFT 0x00u
+ /* Trigger Enable - Not valid for Fixed Function Block */
+ #define Debug_Timer_CTRL_TRIG_EN_SHIFT 0x00u
+ /* Capture Polarity - Not valid for Fixed Function Block */
+ #define Debug_Timer_CTRL_CAP_MODE_SHIFT 0x00u
+ /* Timer Enable - As defined in Register Map, part of TMRX_CFG0 register */
+ #define Debug_Timer_CTRL_ENABLE_SHIFT 0x00u
+
+ /* Control Register Bit Masks */
+ #define Debug_Timer_CTRL_ENABLE ((uint8)((uint8)0x01u << Debug_Timer_CTRL_ENABLE_SHIFT))
+
+ /* Control2 Register Bit Masks */
+ /* As defined in Register Map, Part of the TMRX_CFG1 register */
+ #define Debug_Timer_CTRL2_IRQ_SEL_SHIFT 0x00u
+ #define Debug_Timer_CTRL2_IRQ_SEL ((uint8)((uint8)0x01u << Debug_Timer_CTRL2_IRQ_SEL_SHIFT))
+
+ #if (CY_PSOC5A)
+ /* Use CFG1 Mode bits to set run mode */
+ /* As defined by Verilog Implementation */
+ #define Debug_Timer_CTRL_MODE_SHIFT 0x01u
+ #define Debug_Timer_CTRL_MODE_MASK ((uint8)((uint8)0x07u << Debug_Timer_CTRL_MODE_SHIFT))
+ #endif /* (CY_PSOC5A) */
+ #if (CY_PSOC3 || CY_PSOC5LP)
+ /* Control3 Register Bit Locations */
+ #define Debug_Timer_CTRL_RCOD_SHIFT 0x02u
+ #define Debug_Timer_CTRL_ENBL_SHIFT 0x00u
+ #define Debug_Timer_CTRL_MODE_SHIFT 0x00u
+
+ /* Control3 Register Bit Masks */
+ #define Debug_Timer_CTRL_RCOD_MASK ((uint8)((uint8)0x03u << Debug_Timer_CTRL_RCOD_SHIFT)) /* ROD and COD bit masks */
+ #define Debug_Timer_CTRL_ENBL_MASK ((uint8)((uint8)0x80u << Debug_Timer_CTRL_ENBL_SHIFT)) /* HW_EN bit mask */
+ #define Debug_Timer_CTRL_MODE_MASK ((uint8)((uint8)0x03u << Debug_Timer_CTRL_MODE_SHIFT)) /* Run mode bit mask */
+
+ #define Debug_Timer_CTRL_RCOD ((uint8)((uint8)0x03u << Debug_Timer_CTRL_RCOD_SHIFT))
+ #define Debug_Timer_CTRL_ENBL ((uint8)((uint8)0x80u << Debug_Timer_CTRL_ENBL_SHIFT))
+ #endif /* (CY_PSOC3 || CY_PSOC5LP) */
+
+ /*RT1 Synch Constants: Applicable for PSoC3 and PSoC5LP */
+ #define Debug_Timer_RT1_SHIFT 0x04u
+ /* Sync TC and CMP bit masks */
+ #define Debug_Timer_RT1_MASK ((uint8)((uint8)0x03u << Debug_Timer_RT1_SHIFT))
+ #define Debug_Timer_SYNC ((uint8)((uint8)0x03u << Debug_Timer_RT1_SHIFT))
+ #define Debug_Timer_SYNCDSI_SHIFT 0x00u
+ /* Sync all DSI inputs with Mask */
+ #define Debug_Timer_SYNCDSI_MASK ((uint8)((uint8)0x0Fu << Debug_Timer_SYNCDSI_SHIFT))
+ /* Sync all DSI inputs */
+ #define Debug_Timer_SYNCDSI_EN ((uint8)((uint8)0x0Fu << Debug_Timer_SYNCDSI_SHIFT))
+
+ #define Debug_Timer_CTRL_MODE_PULSEWIDTH ((uint8)((uint8)0x01u << Debug_Timer_CTRL_MODE_SHIFT))
+ #define Debug_Timer_CTRL_MODE_PERIOD ((uint8)((uint8)0x02u << Debug_Timer_CTRL_MODE_SHIFT))
+ #define Debug_Timer_CTRL_MODE_CONTINUOUS ((uint8)((uint8)0x00u << Debug_Timer_CTRL_MODE_SHIFT))
+
+ /* Status Register Bit Locations */
+ /* As defined in Register Map, part of TMRX_SR0 register */
+ #define Debug_Timer_STATUS_TC_SHIFT 0x07u
+ /* As defined in Register Map, part of TMRX_SR0 register, Shared with Compare Status */
+ #define Debug_Timer_STATUS_CAPTURE_SHIFT 0x06u
+ /* As defined in Register Map, part of TMRX_SR0 register */
+ #define Debug_Timer_STATUS_TC_INT_MASK_SHIFT (Debug_Timer_STATUS_TC_SHIFT - 0x04u)
+ /* As defined in Register Map, part of TMRX_SR0 register, Shared with Compare Status */
+ #define Debug_Timer_STATUS_CAPTURE_INT_MASK_SHIFT (Debug_Timer_STATUS_CAPTURE_SHIFT - 0x04u)
+
+ /* Status Register Bit Masks */
+ #define Debug_Timer_STATUS_TC ((uint8)((uint8)0x01u << Debug_Timer_STATUS_TC_SHIFT))
+ #define Debug_Timer_STATUS_CAPTURE ((uint8)((uint8)0x01u << Debug_Timer_STATUS_CAPTURE_SHIFT))
+ /* Interrupt Enable Bit-Mask for interrupt on TC */
+ #define Debug_Timer_STATUS_TC_INT_MASK ((uint8)((uint8)0x01u << Debug_Timer_STATUS_TC_INT_MASK_SHIFT))
+ /* Interrupt Enable Bit-Mask for interrupt on Capture */
+ #define Debug_Timer_STATUS_CAPTURE_INT_MASK ((uint8)((uint8)0x01u << Debug_Timer_STATUS_CAPTURE_INT_MASK_SHIFT))
+
+#else /* UDB Registers and Register Constants */
+
+
+ /***************************************
+ * UDB Registers
+ ***************************************/
+
+ #define Debug_Timer_STATUS (* (reg8 *) Debug_Timer_TimerUDB_rstSts_stsreg__STATUS_REG )
+ #define Debug_Timer_STATUS_MASK (* (reg8 *) Debug_Timer_TimerUDB_rstSts_stsreg__MASK_REG)
+ #define Debug_Timer_STATUS_AUX_CTRL (* (reg8 *) Debug_Timer_TimerUDB_rstSts_stsreg__STATUS_AUX_CTL_REG)
+ #define Debug_Timer_CONTROL (* (reg8 *) Debug_Timer_TimerUDB_sCTRLReg_SyncCtl_ctrlreg__CONTROL_REG )
+
+ #if(Debug_Timer_Resolution <= 8u) /* 8-bit Timer */
+ #define Debug_Timer_CAPTURE_LSB (* (reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG )
+ #define Debug_Timer_CAPTURE_LSB_PTR ((reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG )
+ #define Debug_Timer_PERIOD_LSB (* (reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG )
+ #define Debug_Timer_PERIOD_LSB_PTR ((reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG )
+ #define Debug_Timer_COUNTER_LSB (* (reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG )
+ #define Debug_Timer_COUNTER_LSB_PTR ((reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG )
+ #elif(Debug_Timer_Resolution <= 16u) /* 8-bit Timer */
+ #if(CY_PSOC3) /* 8-bit addres space */
+ #define Debug_Timer_CAPTURE_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG )
+ #define Debug_Timer_CAPTURE_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG )
+ #define Debug_Timer_PERIOD_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG )
+ #define Debug_Timer_PERIOD_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG )
+ #define Debug_Timer_COUNTER_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG )
+ #define Debug_Timer_COUNTER_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG )
+ #else /* 16-bit address space */
+ #define Debug_Timer_CAPTURE_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_F0_REG )
+ #define Debug_Timer_CAPTURE_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_F0_REG )
+ #define Debug_Timer_PERIOD_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_D0_REG )
+ #define Debug_Timer_PERIOD_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_D0_REG )
+ #define Debug_Timer_COUNTER_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_A0_REG )
+ #define Debug_Timer_COUNTER_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_A0_REG )
+ #endif /* CY_PSOC3 */
+ #elif(Debug_Timer_Resolution <= 24u)/* 24-bit Timer */
+ #define Debug_Timer_CAPTURE_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG )
+ #define Debug_Timer_CAPTURE_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG )
+ #define Debug_Timer_PERIOD_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG )
+ #define Debug_Timer_PERIOD_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG )
+ #define Debug_Timer_COUNTER_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG )
+ #define Debug_Timer_COUNTER_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG )
+ #else /* 32-bit Timer */
+ #if(CY_PSOC3 || CY_PSOC5) /* 8-bit address space */
+ #define Debug_Timer_CAPTURE_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG )
+ #define Debug_Timer_CAPTURE_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG )
+ #define Debug_Timer_PERIOD_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG )
+ #define Debug_Timer_PERIOD_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG )
+ #define Debug_Timer_COUNTER_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG )
+ #define Debug_Timer_COUNTER_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG )
+ #else /* 32-bit address space */
+ #define Debug_Timer_CAPTURE_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_F0_REG )
+ #define Debug_Timer_CAPTURE_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_F0_REG )
+ #define Debug_Timer_PERIOD_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_D0_REG )
+ #define Debug_Timer_PERIOD_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_D0_REG )
+ #define Debug_Timer_COUNTER_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_A0_REG )
+ #define Debug_Timer_COUNTER_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_A0_REG )
+ #endif /* CY_PSOC3 || CY_PSOC5 */
+ #endif
+
+ #if (Debug_Timer_UsingHWCaptureCounter)
+ #define Debug_Timer_CAP_COUNT (*(reg8 *) Debug_Timer_TimerUDB_sCapCount_counter__PERIOD_REG )
+ #define Debug_Timer_CAP_COUNT_PTR ( (reg8 *) Debug_Timer_TimerUDB_sCapCount_counter__PERIOD_REG )
+ #define Debug_Timer_CAPTURE_COUNT_CTRL (*(reg8 *) Debug_Timer_TimerUDB_sCapCount_counter__CONTROL_AUX_CTL_REG )
+ #define Debug_Timer_CAPTURE_COUNT_CTRL_PTR ( (reg8 *) Debug_Timer_TimerUDB_sCapCount_counter__CONTROL_AUX_CTL_REG )
+ #endif /* (Debug_Timer_UsingHWCaptureCounter) */
+
+
+ /***************************************
+ * Register Constants
+ ***************************************/
+
+ /* Control Register Bit Locations */
+ #define Debug_Timer_CTRL_INTCNT_SHIFT 0x00u /* As defined by Verilog Implementation */
+ #define Debug_Timer_CTRL_TRIG_MODE_SHIFT 0x02u /* As defined by Verilog Implementation */
+ #define Debug_Timer_CTRL_TRIG_EN_SHIFT 0x04u /* As defined by Verilog Implementation */
+ #define Debug_Timer_CTRL_CAP_MODE_SHIFT 0x05u /* As defined by Verilog Implementation */
+ #define Debug_Timer_CTRL_ENABLE_SHIFT 0x07u /* As defined by Verilog Implementation */
+
+ /* Control Register Bit Masks */
+ #define Debug_Timer_CTRL_INTCNT_MASK ((uint8)((uint8)0x03u << Debug_Timer_CTRL_INTCNT_SHIFT))
+ #define Debug_Timer_CTRL_TRIG_MODE_MASK ((uint8)((uint8)0x03u << Debug_Timer_CTRL_TRIG_MODE_SHIFT))
+ #define Debug_Timer_CTRL_TRIG_EN ((uint8)((uint8)0x01u << Debug_Timer_CTRL_TRIG_EN_SHIFT))
+ #define Debug_Timer_CTRL_CAP_MODE_MASK ((uint8)((uint8)0x03u << Debug_Timer_CTRL_CAP_MODE_SHIFT))
+ #define Debug_Timer_CTRL_ENABLE ((uint8)((uint8)0x01u << Debug_Timer_CTRL_ENABLE_SHIFT))
+
+ /* Bit Counter (7-bit) Control Register Bit Definitions */
+ /* As defined by the Register map for the AUX Control Register */
+ #define Debug_Timer_CNTR_ENABLE 0x20u
+
+ /* Status Register Bit Locations */
+ #define Debug_Timer_STATUS_TC_SHIFT 0x00u /* As defined by Verilog Implementation */
+ #define Debug_Timer_STATUS_CAPTURE_SHIFT 0x01u /* As defined by Verilog Implementation */
+ #define Debug_Timer_STATUS_TC_INT_MASK_SHIFT Debug_Timer_STATUS_TC_SHIFT
+ #define Debug_Timer_STATUS_CAPTURE_INT_MASK_SHIFT Debug_Timer_STATUS_CAPTURE_SHIFT
+ #define Debug_Timer_STATUS_FIFOFULL_SHIFT 0x02u /* As defined by Verilog Implementation */
+ #define Debug_Timer_STATUS_FIFONEMP_SHIFT 0x03u /* As defined by Verilog Implementation */
+ #define Debug_Timer_STATUS_FIFOFULL_INT_MASK_SHIFT Debug_Timer_STATUS_FIFOFULL_SHIFT
+
+ /* Status Register Bit Masks */
+ /* Sticky TC Event Bit-Mask */
+ #define Debug_Timer_STATUS_TC ((uint8)((uint8)0x01u << Debug_Timer_STATUS_TC_SHIFT))
+ /* Sticky Capture Event Bit-Mask */
+ #define Debug_Timer_STATUS_CAPTURE ((uint8)((uint8)0x01u << Debug_Timer_STATUS_CAPTURE_SHIFT))
+ /* Interrupt Enable Bit-Mask */
+ #define Debug_Timer_STATUS_TC_INT_MASK ((uint8)((uint8)0x01u << Debug_Timer_STATUS_TC_SHIFT))
+ /* Interrupt Enable Bit-Mask */
+ #define Debug_Timer_STATUS_CAPTURE_INT_MASK ((uint8)((uint8)0x01u << Debug_Timer_STATUS_CAPTURE_SHIFT))
+ /* NOT-Sticky FIFO Full Bit-Mask */
+ #define Debug_Timer_STATUS_FIFOFULL ((uint8)((uint8)0x01u << Debug_Timer_STATUS_FIFOFULL_SHIFT))
+ /* NOT-Sticky FIFO Not Empty Bit-Mask */
+ #define Debug_Timer_STATUS_FIFONEMP ((uint8)((uint8)0x01u << Debug_Timer_STATUS_FIFONEMP_SHIFT))
+ /* Interrupt Enable Bit-Mask */
+ #define Debug_Timer_STATUS_FIFOFULL_INT_MASK ((uint8)((uint8)0x01u << Debug_Timer_STATUS_FIFOFULL_SHIFT))
+
+ #define Debug_Timer_STATUS_ACTL_INT_EN 0x10u /* As defined for the ACTL Register */
+
+ /* Datapath Auxillary Control Register definitions */
+ #define Debug_Timer_AUX_CTRL_FIFO0_CLR 0x01u /* As defined by Register map */
+ #define Debug_Timer_AUX_CTRL_FIFO1_CLR 0x02u /* As defined by Register map */
+ #define Debug_Timer_AUX_CTRL_FIFO0_LVL 0x04u /* As defined by Register map */
+ #define Debug_Timer_AUX_CTRL_FIFO1_LVL 0x08u /* As defined by Register map */
+ #define Debug_Timer_STATUS_ACTL_INT_EN_MASK 0x10u /* As defined for the ACTL Register */
+
+#endif /* Implementation Specific Registers and Register Constants */
+
+#endif /* CY_Timer_v2_30_Debug_Timer_H */
+
+
+/* [] END OF FILE */
--- /dev/null
+/*******************************************************************************
+* File Name: Debug_Timer_Interrupt.c
+* Version 1.70
+*
+* Description:
+* API for controlling the state of an interrupt.
+*
+*
+* Note:
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+*******************************************************************************/
+
+
+#include <cydevice_trm.h>
+#include <CyLib.h>
+#include <Debug_Timer_Interrupt.h>
+
+#if !defined(Debug_Timer_Interrupt__REMOVED) /* Check for removal by optimization */
+
+/*******************************************************************************
+* Place your includes, defines and code here
+********************************************************************************/
+/* `#START Debug_Timer_Interrupt_intc` */
+
+/* `#END` */
+
+#ifndef CYINT_IRQ_BASE
+#define CYINT_IRQ_BASE 16
+#endif /* CYINT_IRQ_BASE */
+#ifndef CYINT_VECT_TABLE
+#define CYINT_VECT_TABLE ((cyisraddress **) CYREG_NVIC_VECT_OFFSET)
+#endif /* CYINT_VECT_TABLE */
+
+/* Declared in startup, used to set unused interrupts to. */
+CY_ISR_PROTO(IntDefaultHandler);
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_Start
+********************************************************************************
+*
+* Summary:
+* Set up the interrupt and enable it.
+*
+* Parameters:
+* None
+*
+* Return:
+* None
+*
+*******************************************************************************/
+void Debug_Timer_Interrupt_Start(void)
+{
+ /* For all we know the interrupt is active. */
+ Debug_Timer_Interrupt_Disable();
+
+ /* Set the ISR to point to the Debug_Timer_Interrupt Interrupt. */
+ Debug_Timer_Interrupt_SetVector(&Debug_Timer_Interrupt_Interrupt);
+
+ /* Set the priority. */
+ Debug_Timer_Interrupt_SetPriority((uint8)Debug_Timer_Interrupt_INTC_PRIOR_NUMBER);
+
+ /* Enable it. */
+ Debug_Timer_Interrupt_Enable();
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_StartEx
+********************************************************************************
+*
+* Summary:
+* Set up the interrupt and enable it.
+*
+* Parameters:
+* address: Address of the ISR to set in the interrupt vector table.
+*
+* Return:
+* None
+*
+*******************************************************************************/
+void Debug_Timer_Interrupt_StartEx(cyisraddress address)
+{
+ /* For all we know the interrupt is active. */
+ Debug_Timer_Interrupt_Disable();
+
+ /* Set the ISR to point to the Debug_Timer_Interrupt Interrupt. */
+ Debug_Timer_Interrupt_SetVector(address);
+
+ /* Set the priority. */
+ Debug_Timer_Interrupt_SetPriority((uint8)Debug_Timer_Interrupt_INTC_PRIOR_NUMBER);
+
+ /* Enable it. */
+ Debug_Timer_Interrupt_Enable();
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_Stop
+********************************************************************************
+*
+* Summary:
+* Disables and removes the interrupt.
+*
+* Parameters:
+*
+* Return:
+* None
+*
+*******************************************************************************/
+void Debug_Timer_Interrupt_Stop(void)
+{
+ /* Disable this interrupt. */
+ Debug_Timer_Interrupt_Disable();
+
+ /* Set the ISR to point to the passive one. */
+ Debug_Timer_Interrupt_SetVector(&IntDefaultHandler);
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_Interrupt
+********************************************************************************
+*
+* Summary:
+* The default Interrupt Service Routine for Debug_Timer_Interrupt.
+*
+* Add custom code between the coments to keep the next version of this file
+* from over writting your code.
+*
+* Parameters:
+*
+* Return:
+* None
+*
+*******************************************************************************/
+CY_ISR(Debug_Timer_Interrupt_Interrupt)
+{
+ /* Place your Interrupt code here. */
+ /* `#START Debug_Timer_Interrupt_Interrupt` */
+
+ /* `#END` */
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_SetVector
+********************************************************************************
+*
+* Summary:
+* Change the ISR vector for the Interrupt. Note calling Debug_Timer_Interrupt_Start
+* will override any effect this method would have had. To set the vector
+* before the component has been started use Debug_Timer_Interrupt_StartEx instead.
+*
+* Parameters:
+* address: Address of the ISR to set in the interrupt vector table.
+*
+* Return:
+* None
+*
+*******************************************************************************/
+void Debug_Timer_Interrupt_SetVector(cyisraddress address)
+{
+ cyisraddress * ramVectorTable;
+
+ ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE;
+
+ ramVectorTable[CYINT_IRQ_BASE + (uint32)Debug_Timer_Interrupt__INTC_NUMBER] = address;
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_GetVector
+********************************************************************************
+*
+* Summary:
+* Gets the "address" of the current ISR vector for the Interrupt.
+*
+* Parameters:
+* None
+*
+* Return:
+* Address of the ISR in the interrupt vector table.
+*
+*******************************************************************************/
+cyisraddress Debug_Timer_Interrupt_GetVector(void)
+{
+ cyisraddress * ramVectorTable;
+
+ ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE;
+
+ return ramVectorTable[CYINT_IRQ_BASE + (uint32)Debug_Timer_Interrupt__INTC_NUMBER];
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_SetPriority
+********************************************************************************
+*
+* Summary:
+* Sets the Priority of the Interrupt. Note calling Debug_Timer_Interrupt_Start
+* or Debug_Timer_Interrupt_StartEx will override any effect this method
+* would have had. This method should only be called after
+* Debug_Timer_Interrupt_Start or Debug_Timer_Interrupt_StartEx has been called. To set
+* the initial priority for the component use the cydwr file in the tool.
+*
+* Parameters:
+* priority: Priority of the interrupt. 0 - 7, 0 being the highest.
+*
+* Return:
+* None
+*
+*******************************************************************************/
+void Debug_Timer_Interrupt_SetPriority(uint8 priority)
+{
+ *Debug_Timer_Interrupt_INTC_PRIOR = priority << 5;
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_GetPriority
+********************************************************************************
+*
+* Summary:
+* Gets the Priority of the Interrupt.
+*
+* Parameters:
+* None
+*
+* Return:
+* Priority of the interrupt. 0 - 7, 0 being the highest.
+*
+*******************************************************************************/
+uint8 Debug_Timer_Interrupt_GetPriority(void)
+{
+ uint8 priority;
+
+
+ priority = *Debug_Timer_Interrupt_INTC_PRIOR >> 5;
+
+ return priority;
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_Enable
+********************************************************************************
+*
+* Summary:
+* Enables the interrupt.
+*
+* Parameters:
+* None
+*
+* Return:
+* None
+*
+*******************************************************************************/
+void Debug_Timer_Interrupt_Enable(void)
+{
+ /* Enable the general interrupt. */
+ *Debug_Timer_Interrupt_INTC_SET_EN = Debug_Timer_Interrupt__INTC_MASK;
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_GetState
+********************************************************************************
+*
+* Summary:
+* Gets the state (enabled, disabled) of the Interrupt.
+*
+* Parameters:
+* None
+*
+* Return:
+* 1 if enabled, 0 if disabled.
+*
+*******************************************************************************/
+uint8 Debug_Timer_Interrupt_GetState(void)
+{
+ /* Get the state of the general interrupt. */
+ return ((*Debug_Timer_Interrupt_INTC_SET_EN & (uint32)Debug_Timer_Interrupt__INTC_MASK) != 0u) ? 1u:0u;
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_Disable
+********************************************************************************
+*
+* Summary:
+* Disables the Interrupt.
+*
+* Parameters:
+* None
+*
+* Return:
+* None
+*
+*******************************************************************************/
+void Debug_Timer_Interrupt_Disable(void)
+{
+ /* Disable the general interrupt. */
+ *Debug_Timer_Interrupt_INTC_CLR_EN = Debug_Timer_Interrupt__INTC_MASK;
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_SetPending
+********************************************************************************
+*
+* Summary:
+* Causes the Interrupt to enter the pending state, a software method of
+* generating the interrupt.
+*
+* Parameters:
+* None
+*
+* Return:
+* None
+*
+*******************************************************************************/
+void Debug_Timer_Interrupt_SetPending(void)
+{
+ *Debug_Timer_Interrupt_INTC_SET_PD = Debug_Timer_Interrupt__INTC_MASK;
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Interrupt_ClearPending
+********************************************************************************
+*
+* Summary:
+* Clears a pending interrupt.
+*
+* Parameters:
+* None
+*
+* Return:
+* None
+*
+*******************************************************************************/
+void Debug_Timer_Interrupt_ClearPending(void)
+{
+ *Debug_Timer_Interrupt_INTC_CLR_PD = Debug_Timer_Interrupt__INTC_MASK;
+}
+
+#endif /* End check for removal by optimization */
+
+
+/* [] END OF FILE */
--- /dev/null
+/*******************************************************************************
+* File Name: Debug_Timer_Interrupt.h
+* Version 1.70
+*
+* Description:
+* Provides the function definitions for the Interrupt Controller.
+*
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+*******************************************************************************/
+#if !defined(CY_ISR_Debug_Timer_Interrupt_H)
+#define CY_ISR_Debug_Timer_Interrupt_H
+
+
+#include <cytypes.h>
+#include <cyfitter.h>
+
+/* Interrupt Controller API. */
+void Debug_Timer_Interrupt_Start(void);
+void Debug_Timer_Interrupt_StartEx(cyisraddress address);
+void Debug_Timer_Interrupt_Stop(void);
+
+CY_ISR_PROTO(Debug_Timer_Interrupt_Interrupt);
+
+void Debug_Timer_Interrupt_SetVector(cyisraddress address);
+cyisraddress Debug_Timer_Interrupt_GetVector(void);
+
+void Debug_Timer_Interrupt_SetPriority(uint8 priority);
+uint8 Debug_Timer_Interrupt_GetPriority(void);
+
+void Debug_Timer_Interrupt_Enable(void);
+uint8 Debug_Timer_Interrupt_GetState(void);
+void Debug_Timer_Interrupt_Disable(void);
+
+void Debug_Timer_Interrupt_SetPending(void);
+void Debug_Timer_Interrupt_ClearPending(void);
+
+
+/* Interrupt Controller Constants */
+
+/* Address of the INTC.VECT[x] register that contains the Address of the Debug_Timer_Interrupt ISR. */
+#define Debug_Timer_Interrupt_INTC_VECTOR ((reg32 *) Debug_Timer_Interrupt__INTC_VECT)
+
+/* Address of the Debug_Timer_Interrupt ISR priority. */
+#define Debug_Timer_Interrupt_INTC_PRIOR ((reg8 *) Debug_Timer_Interrupt__INTC_PRIOR_REG)
+
+/* Priority of the Debug_Timer_Interrupt interrupt. */
+#define Debug_Timer_Interrupt_INTC_PRIOR_NUMBER Debug_Timer_Interrupt__INTC_PRIOR_NUM
+
+/* Address of the INTC.SET_EN[x] byte to bit enable Debug_Timer_Interrupt interrupt. */
+#define Debug_Timer_Interrupt_INTC_SET_EN ((reg32 *) Debug_Timer_Interrupt__INTC_SET_EN_REG)
+
+/* Address of the INTC.CLR_EN[x] register to bit clear the Debug_Timer_Interrupt interrupt. */
+#define Debug_Timer_Interrupt_INTC_CLR_EN ((reg32 *) Debug_Timer_Interrupt__INTC_CLR_EN_REG)
+
+/* Address of the INTC.SET_PD[x] register to set the Debug_Timer_Interrupt interrupt state to pending. */
+#define Debug_Timer_Interrupt_INTC_SET_PD ((reg32 *) Debug_Timer_Interrupt__INTC_SET_PD_REG)
+
+/* Address of the INTC.CLR_PD[x] register to clear the Debug_Timer_Interrupt interrupt. */
+#define Debug_Timer_Interrupt_INTC_CLR_PD ((reg32 *) Debug_Timer_Interrupt__INTC_CLR_PD_REG)
+
+
+#endif /* CY_ISR_Debug_Timer_Interrupt_H */
+
+
+/* [] END OF FILE */
--- /dev/null
+/*******************************************************************************
+* File Name: Debug_Timer_PM.c
+* Version 2.50
+*
+* Description:
+* This file provides the power management source code to API for the
+* Timer.
+*
+* Note:
+* None
+*
+*******************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+********************************************************************************/
+
+#include "Debug_Timer.h"
+static Debug_Timer_backupStruct Debug_Timer_backup;
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_SaveConfig
+********************************************************************************
+*
+* Summary:
+* Save the current user configuration
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+* Global variables:
+* Debug_Timer_backup: Variables of this global structure are modified to
+* store the values of non retention configuration registers when Sleep() API is
+* called.
+*
+*******************************************************************************/
+void Debug_Timer_SaveConfig(void)
+{
+ #if (!Debug_Timer_UsingFixedFunction)
+ /* Backup the UDB non-rentention registers for CY_UDB_V0 */
+ #if (CY_UDB_V0)
+ Debug_Timer_backup.TimerUdb = Debug_Timer_ReadCounter();
+ Debug_Timer_backup.TimerPeriod = Debug_Timer_ReadPeriod();
+ Debug_Timer_backup.InterruptMaskValue = Debug_Timer_STATUS_MASK;
+ #if (Debug_Timer_UsingHWCaptureCounter)
+ Debug_Timer_backup.TimerCaptureCounter = Debug_Timer_ReadCaptureCount();
+ #endif /* Backup the UDB non-rentention register capture counter for CY_UDB_V0 */
+ #endif /* Backup the UDB non-rentention registers for CY_UDB_V0 */
+
+ #if (CY_UDB_V1)
+ Debug_Timer_backup.TimerUdb = Debug_Timer_ReadCounter();
+ Debug_Timer_backup.InterruptMaskValue = Debug_Timer_STATUS_MASK;
+ #if (Debug_Timer_UsingHWCaptureCounter)
+ Debug_Timer_backup.TimerCaptureCounter = Debug_Timer_ReadCaptureCount();
+ #endif /* Back Up capture counter register */
+ #endif /* Backup non retention registers, interrupt mask and capture counter for CY_UDB_V1 */
+
+ #if(!Debug_Timer_ControlRegRemoved)
+ Debug_Timer_backup.TimerControlRegister = Debug_Timer_ReadControlRegister();
+ #endif /* Backup the enable state of the Timer component */
+ #endif /* Backup non retention registers in UDB implementation. All fixed function registers are retention */
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_RestoreConfig
+********************************************************************************
+*
+* Summary:
+* Restores the current user configuration.
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+* Global variables:
+* Debug_Timer_backup: Variables of this global structure are used to
+* restore the values of non retention registers on wakeup from sleep mode.
+*
+*******************************************************************************/
+void Debug_Timer_RestoreConfig(void)
+{
+ #if (!Debug_Timer_UsingFixedFunction)
+ /* Restore the UDB non-rentention registers for CY_UDB_V0 */
+ #if (CY_UDB_V0)
+ /* Interrupt State Backup for Critical Region*/
+ uint8 Debug_Timer_interruptState;
+
+ Debug_Timer_WriteCounter(Debug_Timer_backup.TimerUdb);
+ Debug_Timer_WritePeriod(Debug_Timer_backup.TimerPeriod);
+ /* CyEnterCriticalRegion and CyExitCriticalRegion are used to mark following region critical*/
+ /* Enter Critical Region*/
+ Debug_Timer_interruptState = CyEnterCriticalSection();
+ /* Use the interrupt output of the status register for IRQ output */
+ Debug_Timer_STATUS_AUX_CTRL |= Debug_Timer_STATUS_ACTL_INT_EN_MASK;
+ /* Exit Critical Region*/
+ CyExitCriticalSection(Debug_Timer_interruptState);
+ Debug_Timer_STATUS_MASK =Debug_Timer_backup.InterruptMaskValue;
+ #if (Debug_Timer_UsingHWCaptureCounter)
+ Debug_Timer_SetCaptureCount(Debug_Timer_backup.TimerCaptureCounter);
+ #endif /* Restore the UDB non-rentention register capture counter for CY_UDB_V0 */
+ #endif /* Restore the UDB non-rentention registers for CY_UDB_V0 */
+
+ #if (CY_UDB_V1)
+ Debug_Timer_WriteCounter(Debug_Timer_backup.TimerUdb);
+ Debug_Timer_STATUS_MASK =Debug_Timer_backup.InterruptMaskValue;
+ #if (Debug_Timer_UsingHWCaptureCounter)
+ Debug_Timer_SetCaptureCount(Debug_Timer_backup.TimerCaptureCounter);
+ #endif /* Restore Capture counter register*/
+ #endif /* Restore up non retention registers, interrupt mask and capture counter for CY_UDB_V1 */
+
+ #if(!Debug_Timer_ControlRegRemoved)
+ Debug_Timer_WriteControlRegister(Debug_Timer_backup.TimerControlRegister);
+ #endif /* Restore the enable state of the Timer component */
+ #endif /* Restore non retention registers in the UDB implementation only */
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Sleep
+********************************************************************************
+*
+* Summary:
+* Stop and Save the user configuration
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+* Global variables:
+* Debug_Timer_backup.TimerEnableState: Is modified depending on the
+* enable state of the block before entering sleep mode.
+*
+*******************************************************************************/
+void Debug_Timer_Sleep(void)
+{
+ #if(!Debug_Timer_ControlRegRemoved)
+ /* Save Counter's enable state */
+ if(Debug_Timer_CTRL_ENABLE == (Debug_Timer_CONTROL & Debug_Timer_CTRL_ENABLE))
+ {
+ /* Timer is enabled */
+ Debug_Timer_backup.TimerEnableState = 1u;
+ }
+ else
+ {
+ /* Timer is disabled */
+ Debug_Timer_backup.TimerEnableState = 0u;
+ }
+ #endif /* Back up enable state from the Timer control register */
+ Debug_Timer_Stop();
+ Debug_Timer_SaveConfig();
+}
+
+
+/*******************************************************************************
+* Function Name: Debug_Timer_Wakeup
+********************************************************************************
+*
+* Summary:
+* Restores and enables the user configuration
+*
+* Parameters:
+* void
+*
+* Return:
+* void
+*
+* Global variables:
+* Debug_Timer_backup.enableState: Is used to restore the enable state of
+* block on wakeup from sleep mode.
+*
+*******************************************************************************/
+void Debug_Timer_Wakeup(void)
+{
+ Debug_Timer_RestoreConfig();
+ #if(!Debug_Timer_ControlRegRemoved)
+ if(Debug_Timer_backup.TimerEnableState == 1u)
+ { /* Enable Timer's operation */
+ Debug_Timer_Enable();
+ } /* Do nothing if Timer was disabled before */
+ #endif /* Remove this code section if Control register is removed */
+}
+
+
+/* [] END OF FILE */
+++ /dev/null
-/*******************************************************************************\r
-* File Name: SCSI_ATN_ISR.c \r
-* Version 1.70\r
-*\r
-* Description:\r
-* API for controlling the state of an interrupt.\r
-*\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-\r
-#include <cydevice_trm.h>\r
-#include <CyLib.h>\r
-#include <SCSI_ATN_ISR.h>\r
-\r
-#if !defined(SCSI_ATN_ISR__REMOVED) /* Check for removal by optimization */\r
-\r
-/*******************************************************************************\r
-* Place your includes, defines and code here \r
-********************************************************************************/\r
-/* `#START SCSI_ATN_ISR_intc` */\r
-\r
-/* `#END` */\r
-\r
-#ifndef CYINT_IRQ_BASE\r
-#define CYINT_IRQ_BASE 16\r
-#endif /* CYINT_IRQ_BASE */\r
-#ifndef CYINT_VECT_TABLE\r
-#define CYINT_VECT_TABLE ((cyisraddress **) CYREG_NVIC_VECT_OFFSET)\r
-#endif /* CYINT_VECT_TABLE */\r
-\r
-/* Declared in startup, used to set unused interrupts to. */\r
-CY_ISR_PROTO(IntDefaultHandler);\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_Start\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Set up the interrupt and enable it.\r
-*\r
-* Parameters: \r
-* None\r
-*\r
-* Return:\r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_ATN_ISR_Start(void)\r
-{\r
- /* For all we know the interrupt is active. */\r
- SCSI_ATN_ISR_Disable();\r
-\r
- /* Set the ISR to point to the SCSI_ATN_ISR Interrupt. */\r
- SCSI_ATN_ISR_SetVector(&SCSI_ATN_ISR_Interrupt);\r
-\r
- /* Set the priority. */\r
- SCSI_ATN_ISR_SetPriority((uint8)SCSI_ATN_ISR_INTC_PRIOR_NUMBER);\r
-\r
- /* Enable it. */\r
- SCSI_ATN_ISR_Enable();\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_StartEx\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Set up the interrupt and enable it.\r
-*\r
-* Parameters: \r
-* address: Address of the ISR to set in the interrupt vector table.\r
-*\r
-* Return:\r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_ATN_ISR_StartEx(cyisraddress address)\r
-{\r
- /* For all we know the interrupt is active. */\r
- SCSI_ATN_ISR_Disable();\r
-\r
- /* Set the ISR to point to the SCSI_ATN_ISR Interrupt. */\r
- SCSI_ATN_ISR_SetVector(address);\r
-\r
- /* Set the priority. */\r
- SCSI_ATN_ISR_SetPriority((uint8)SCSI_ATN_ISR_INTC_PRIOR_NUMBER);\r
-\r
- /* Enable it. */\r
- SCSI_ATN_ISR_Enable();\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_Stop\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Disables and removes the interrupt.\r
-*\r
-* Parameters: \r
-*\r
-* Return:\r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_ATN_ISR_Stop(void)\r
-{\r
- /* Disable this interrupt. */\r
- SCSI_ATN_ISR_Disable();\r
-\r
- /* Set the ISR to point to the passive one. */\r
- SCSI_ATN_ISR_SetVector(&IntDefaultHandler);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_Interrupt\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* The default Interrupt Service Routine for SCSI_ATN_ISR.\r
-*\r
-* Add custom code between the coments to keep the next version of this file\r
-* from over writting your code.\r
-*\r
-* Parameters: \r
-*\r
-* Return:\r
-* None\r
-*\r
-*******************************************************************************/\r
-CY_ISR(SCSI_ATN_ISR_Interrupt)\r
-{\r
- /* Place your Interrupt code here. */\r
- /* `#START SCSI_ATN_ISR_Interrupt` */\r
-\r
- /* `#END` */\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_SetVector\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Change the ISR vector for the Interrupt. Note calling SCSI_ATN_ISR_Start\r
-* will override any effect this method would have had. To set the vector \r
-* before the component has been started use SCSI_ATN_ISR_StartEx instead.\r
-*\r
-* Parameters:\r
-* address: Address of the ISR to set in the interrupt vector table.\r
-*\r
-* Return:\r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_ATN_ISR_SetVector(cyisraddress address)\r
-{\r
- cyisraddress * ramVectorTable;\r
-\r
- ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE;\r
-\r
- ramVectorTable[CYINT_IRQ_BASE + (uint32)SCSI_ATN_ISR__INTC_NUMBER] = address;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_GetVector\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Gets the "address" of the current ISR vector for the Interrupt.\r
-*\r
-* Parameters:\r
-* None\r
-*\r
-* Return:\r
-* Address of the ISR in the interrupt vector table.\r
-*\r
-*******************************************************************************/\r
-cyisraddress SCSI_ATN_ISR_GetVector(void)\r
-{\r
- cyisraddress * ramVectorTable;\r
-\r
- ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE;\r
-\r
- return ramVectorTable[CYINT_IRQ_BASE + (uint32)SCSI_ATN_ISR__INTC_NUMBER];\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_SetPriority\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Sets the Priority of the Interrupt. Note calling SCSI_ATN_ISR_Start\r
-* or SCSI_ATN_ISR_StartEx will override any effect this method \r
-* would have had. This method should only be called after \r
-* SCSI_ATN_ISR_Start or SCSI_ATN_ISR_StartEx has been called. To set \r
-* the initial priority for the component use the cydwr file in the tool.\r
-*\r
-* Parameters:\r
-* priority: Priority of the interrupt. 0 - 7, 0 being the highest.\r
-*\r
-* Return:\r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_ATN_ISR_SetPriority(uint8 priority)\r
-{\r
- *SCSI_ATN_ISR_INTC_PRIOR = priority << 5;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_GetPriority\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Gets the Priority of the Interrupt.\r
-*\r
-* Parameters:\r
-* None\r
-*\r
-* Return:\r
-* Priority of the interrupt. 0 - 7, 0 being the highest.\r
-*\r
-*******************************************************************************/\r
-uint8 SCSI_ATN_ISR_GetPriority(void)\r
-{\r
- uint8 priority;\r
-\r
-\r
- priority = *SCSI_ATN_ISR_INTC_PRIOR >> 5;\r
-\r
- return priority;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_Enable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Enables the interrupt.\r
-*\r
-* Parameters:\r
-* None\r
-*\r
-* Return:\r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_ATN_ISR_Enable(void)\r
-{\r
- /* Enable the general interrupt. */\r
- *SCSI_ATN_ISR_INTC_SET_EN = SCSI_ATN_ISR__INTC_MASK;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_GetState\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Gets the state (enabled, disabled) of the Interrupt.\r
-*\r
-* Parameters:\r
-* None\r
-*\r
-* Return:\r
-* 1 if enabled, 0 if disabled.\r
-*\r
-*******************************************************************************/\r
-uint8 SCSI_ATN_ISR_GetState(void)\r
-{\r
- /* Get the state of the general interrupt. */\r
- return ((*SCSI_ATN_ISR_INTC_SET_EN & (uint32)SCSI_ATN_ISR__INTC_MASK) != 0u) ? 1u:0u;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_Disable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Disables the Interrupt.\r
-*\r
-* Parameters:\r
-* None\r
-*\r
-* Return:\r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_ATN_ISR_Disable(void)\r
-{\r
- /* Disable the general interrupt. */\r
- *SCSI_ATN_ISR_INTC_CLR_EN = SCSI_ATN_ISR__INTC_MASK;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_SetPending\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Causes the Interrupt to enter the pending state, a software method of\r
-* generating the interrupt.\r
-*\r
-* Parameters:\r
-* None\r
-*\r
-* Return:\r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_ATN_ISR_SetPending(void)\r
-{\r
- *SCSI_ATN_ISR_INTC_SET_PD = SCSI_ATN_ISR__INTC_MASK;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_ATN_ISR_ClearPending\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Clears a pending interrupt.\r
-*\r
-* Parameters:\r
-* None\r
-*\r
-* Return:\r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_ATN_ISR_ClearPending(void)\r
-{\r
- *SCSI_ATN_ISR_INTC_CLR_PD = SCSI_ATN_ISR__INTC_MASK;\r
-}\r
-\r
-#endif /* End check for removal by optimization */\r
-\r
-\r
-/* [] END OF FILE */\r
+++ /dev/null
-/*******************************************************************************\r
-* File Name: SCSI_ATN_ISR.h\r
-* Version 1.70\r
-*\r
-* Description:\r
-* Provides the function definitions for the Interrupt Controller.\r
-*\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-#if !defined(CY_ISR_SCSI_ATN_ISR_H)\r
-#define CY_ISR_SCSI_ATN_ISR_H\r
-\r
-\r
-#include <cytypes.h>\r
-#include <cyfitter.h>\r
-\r
-/* Interrupt Controller API. */\r
-void SCSI_ATN_ISR_Start(void);\r
-void SCSI_ATN_ISR_StartEx(cyisraddress address);\r
-void SCSI_ATN_ISR_Stop(void);\r
-\r
-CY_ISR_PROTO(SCSI_ATN_ISR_Interrupt);\r
-\r
-void SCSI_ATN_ISR_SetVector(cyisraddress address);\r
-cyisraddress SCSI_ATN_ISR_GetVector(void);\r
-\r
-void SCSI_ATN_ISR_SetPriority(uint8 priority);\r
-uint8 SCSI_ATN_ISR_GetPriority(void);\r
-\r
-void SCSI_ATN_ISR_Enable(void);\r
-uint8 SCSI_ATN_ISR_GetState(void);\r
-void SCSI_ATN_ISR_Disable(void);\r
-\r
-void SCSI_ATN_ISR_SetPending(void);\r
-void SCSI_ATN_ISR_ClearPending(void);\r
-\r
-\r
-/* Interrupt Controller Constants */\r
-\r
-/* Address of the INTC.VECT[x] register that contains the Address of the SCSI_ATN_ISR ISR. */\r
-#define SCSI_ATN_ISR_INTC_VECTOR ((reg32 *) SCSI_ATN_ISR__INTC_VECT)\r
-\r
-/* Address of the SCSI_ATN_ISR ISR priority. */\r
-#define SCSI_ATN_ISR_INTC_PRIOR ((reg8 *) SCSI_ATN_ISR__INTC_PRIOR_REG)\r
-\r
-/* Priority of the SCSI_ATN_ISR interrupt. */\r
-#define SCSI_ATN_ISR_INTC_PRIOR_NUMBER SCSI_ATN_ISR__INTC_PRIOR_NUM\r
-\r
-/* Address of the INTC.SET_EN[x] byte to bit enable SCSI_ATN_ISR interrupt. */\r
-#define SCSI_ATN_ISR_INTC_SET_EN ((reg32 *) SCSI_ATN_ISR__INTC_SET_EN_REG)\r
-\r
-/* Address of the INTC.CLR_EN[x] register to bit clear the SCSI_ATN_ISR interrupt. */\r
-#define SCSI_ATN_ISR_INTC_CLR_EN ((reg32 *) SCSI_ATN_ISR__INTC_CLR_EN_REG)\r
-\r
-/* Address of the INTC.SET_PD[x] register to set the SCSI_ATN_ISR interrupt state to pending. */\r
-#define SCSI_ATN_ISR_INTC_SET_PD ((reg32 *) SCSI_ATN_ISR__INTC_SET_PD_REG)\r
-\r
-/* Address of the INTC.CLR_PD[x] register to clear the SCSI_ATN_ISR interrupt. */\r
-#define SCSI_ATN_ISR_INTC_CLR_PD ((reg32 *) SCSI_ATN_ISR__INTC_CLR_PD_REG)\r
-\r
-\r
-#endif /* CY_ISR_SCSI_ATN_ISR_H */\r
-\r
-\r
-/* [] END OF FILE */\r
+++ /dev/null
-/*******************************************************************************
-* File Name: SCSI_CMD_TIMER.c
-* Version 2.50
-*
-* Description:
-* The Timer component consists of a 8, 16, 24 or 32-bit timer with
-* a selectable period between 2 and 2^Width - 1. The timer may free run
-* or be used as a capture timer as well. The capture can be initiated
-* by a positive or negative edge signal as well as via software.
-* A trigger input can be programmed to enable the timer on rising edge
-* falling edge, either edge or continous run.
-* Interrupts may be generated due to a terminal count condition
-* or a capture event.
-*
-* Note:
-*
-********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
-* You may use this file only in accordance with the license, terms, conditions,
-* disclaimers, and limitations in the end user license agreement accompanying
-* the software package with which this file was provided.
-********************************************************************************/
-
-#include "SCSI_CMD_TIMER.h"
-
-uint8 SCSI_CMD_TIMER_initVar = 0u;
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_Init
-********************************************************************************
-*
-* Summary:
-* Initialize to the schematic state
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_Init(void)
-{
- #if(!SCSI_CMD_TIMER_UsingFixedFunction)
- /* Interrupt State Backup for Critical Region*/
- uint8 SCSI_CMD_TIMER_interruptState;
- #endif /* Interrupt state back up for Fixed Function only */
-
- #if (SCSI_CMD_TIMER_UsingFixedFunction)
- /* Clear all bits but the enable bit (if it's already set) for Timer operation */
- SCSI_CMD_TIMER_CONTROL &= SCSI_CMD_TIMER_CTRL_ENABLE;
-
- /* Clear the mode bits for continuous run mode */
- #if (CY_PSOC5A)
- SCSI_CMD_TIMER_CONTROL2 &= ((uint8)(~SCSI_CMD_TIMER_CTRL_MODE_MASK));
- #endif /* Clear bits in CONTROL2 only in PSOC5A */
-
- #if (CY_PSOC3 || CY_PSOC5LP)
- SCSI_CMD_TIMER_CONTROL3 &= ((uint8)(~SCSI_CMD_TIMER_CTRL_MODE_MASK));
- #endif /* CONTROL3 register exists only in PSoC3 OR PSoC5LP */
-
- /* Check if One Shot mode is enabled i.e. RunMode !=0*/
- #if (SCSI_CMD_TIMER_RunModeUsed != 0x0u)
- /* Set 3rd bit of Control register to enable one shot mode */
- SCSI_CMD_TIMER_CONTROL |= 0x04u;
- #endif /* One Shot enabled only when RunModeUsed is not Continuous*/
-
- #if (SCSI_CMD_TIMER_RunModeUsed == 2)
- #if (CY_PSOC5A)
- /* Set last 2 bits of control2 register if one shot(halt on
- interrupt) is enabled*/
- SCSI_CMD_TIMER_CONTROL2 |= 0x03u;
- #endif /* Set One-Shot Halt on Interrupt bit in CONTROL2 for PSoC5A */
-
- #if (CY_PSOC3 || CY_PSOC5LP)
- /* Set last 2 bits of control3 register if one shot(halt on
- interrupt) is enabled*/
- SCSI_CMD_TIMER_CONTROL3 |= 0x03u;
- #endif /* Set One-Shot Halt on Interrupt bit in CONTROL3 for PSoC3 or PSoC5LP */
-
- #endif /* Remove section if One Shot Halt on Interrupt is not enabled */
-
- #if (SCSI_CMD_TIMER_UsingHWEnable != 0)
- #if (CY_PSOC5A)
- /* Set the default Run Mode of the Timer to Continuous */
- SCSI_CMD_TIMER_CONTROL2 |= SCSI_CMD_TIMER_CTRL_MODE_PULSEWIDTH;
- #endif /* Set Continuous Run Mode in CONTROL2 for PSoC5A */
-
- #if (CY_PSOC3 || CY_PSOC5LP)
- /* Clear and Set ROD and COD bits of CFG2 register */
- SCSI_CMD_TIMER_CONTROL3 &= ((uint8)(~SCSI_CMD_TIMER_CTRL_RCOD_MASK));
- SCSI_CMD_TIMER_CONTROL3 |= SCSI_CMD_TIMER_CTRL_RCOD;
-
- /* Clear and Enable the HW enable bit in CFG2 register */
- SCSI_CMD_TIMER_CONTROL3 &= ((uint8)(~SCSI_CMD_TIMER_CTRL_ENBL_MASK));
- SCSI_CMD_TIMER_CONTROL3 |= SCSI_CMD_TIMER_CTRL_ENBL;
-
- /* Set the default Run Mode of the Timer to Continuous */
- SCSI_CMD_TIMER_CONTROL3 |= SCSI_CMD_TIMER_CTRL_MODE_CONTINUOUS;
- #endif /* Set Continuous Run Mode in CONTROL3 for PSoC3ES3 or PSoC5A */
-
- #endif /* Configure Run Mode with hardware enable */
-
- /* Clear and Set SYNCTC and SYNCCMP bits of RT1 register */
- SCSI_CMD_TIMER_RT1 &= ((uint8)(~SCSI_CMD_TIMER_RT1_MASK));
- SCSI_CMD_TIMER_RT1 |= SCSI_CMD_TIMER_SYNC;
-
- /*Enable DSI Sync all all inputs of the Timer*/
- SCSI_CMD_TIMER_RT1 &= ((uint8)(~SCSI_CMD_TIMER_SYNCDSI_MASK));
- SCSI_CMD_TIMER_RT1 |= SCSI_CMD_TIMER_SYNCDSI_EN;
-
- /* Set the IRQ to use the status register interrupts */
- SCSI_CMD_TIMER_CONTROL2 |= SCSI_CMD_TIMER_CTRL2_IRQ_SEL;
- #endif /* Configuring registers of fixed function implementation */
-
- /* Set Initial values from Configuration */
- SCSI_CMD_TIMER_WritePeriod(SCSI_CMD_TIMER_INIT_PERIOD);
- SCSI_CMD_TIMER_WriteCounter(SCSI_CMD_TIMER_INIT_PERIOD);
-
- #if (SCSI_CMD_TIMER_UsingHWCaptureCounter)/* Capture counter is enabled */
- SCSI_CMD_TIMER_CAPTURE_COUNT_CTRL |= SCSI_CMD_TIMER_CNTR_ENABLE;
- SCSI_CMD_TIMER_SetCaptureCount(SCSI_CMD_TIMER_INIT_CAPTURE_COUNT);
- #endif /* Configure capture counter value */
-
- #if (!SCSI_CMD_TIMER_UsingFixedFunction)
- #if (SCSI_CMD_TIMER_SoftwareCaptureMode)
- SCSI_CMD_TIMER_SetCaptureMode(SCSI_CMD_TIMER_INIT_CAPTURE_MODE);
- #endif /* Set Capture Mode for UDB implementation if capture mode is software controlled */
-
- #if (SCSI_CMD_TIMER_SoftwareTriggerMode)
- if (0u == (SCSI_CMD_TIMER_CONTROL & SCSI_CMD_TIMER__B_TIMER__TM_SOFTWARE))
- {
- SCSI_CMD_TIMER_SetTriggerMode(SCSI_CMD_TIMER_INIT_TRIGGER_MODE);
- }
- #endif /* Set trigger mode for UDB Implementation if trigger mode is software controlled */
-
- /* CyEnterCriticalRegion and CyExitCriticalRegion are used to mark following region critical*/
- /* Enter Critical Region*/
- SCSI_CMD_TIMER_interruptState = CyEnterCriticalSection();
-
- /* Use the interrupt output of the status register for IRQ output */
- SCSI_CMD_TIMER_STATUS_AUX_CTRL |= SCSI_CMD_TIMER_STATUS_ACTL_INT_EN_MASK;
-
- /* Exit Critical Region*/
- CyExitCriticalSection(SCSI_CMD_TIMER_interruptState);
-
- #if (SCSI_CMD_TIMER_EnableTriggerMode)
- SCSI_CMD_TIMER_EnableTrigger();
- #endif /* Set Trigger enable bit for UDB implementation in the control register*/
-
- #if (SCSI_CMD_TIMER_InterruptOnCaptureCount)
- #if (!SCSI_CMD_TIMER_ControlRegRemoved)
- SCSI_CMD_TIMER_SetInterruptCount(SCSI_CMD_TIMER_INIT_INT_CAPTURE_COUNT);
- #endif /* Set interrupt count in control register if control register is not removed */
- #endif /*Set interrupt count in UDB implementation if interrupt count feature is checked.*/
-
- SCSI_CMD_TIMER_ClearFIFO();
- #endif /* Configure additional features of UDB implementation */
-
- SCSI_CMD_TIMER_SetInterruptMode(SCSI_CMD_TIMER_INIT_INTERRUPT_MODE);
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_Enable
-********************************************************************************
-*
-* Summary:
-* Enable the Timer
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_Enable(void)
-{
- /* Globally Enable the Fixed Function Block chosen */
- #if (SCSI_CMD_TIMER_UsingFixedFunction)
- SCSI_CMD_TIMER_GLOBAL_ENABLE |= SCSI_CMD_TIMER_BLOCK_EN_MASK;
- SCSI_CMD_TIMER_GLOBAL_STBY_ENABLE |= SCSI_CMD_TIMER_BLOCK_STBY_EN_MASK;
- #endif /* Set Enable bit for enabling Fixed function timer*/
-
- /* Remove assignment if control register is removed */
- #if (!SCSI_CMD_TIMER_ControlRegRemoved || SCSI_CMD_TIMER_UsingFixedFunction)
- SCSI_CMD_TIMER_CONTROL |= SCSI_CMD_TIMER_CTRL_ENABLE;
- #endif /* Remove assignment if control register is removed */
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_Start
-********************************************************************************
-*
-* Summary:
-* The start function initializes the timer with the default values, the
-* enables the timerto begin counting. It does not enable interrupts,
-* the EnableInt command should be called if interrupt generation is required.
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-* Global variables:
-* SCSI_CMD_TIMER_initVar: Is modified when this function is called for the
-* first time. Is used to ensure that initialization happens only once.
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_Start(void)
-{
- if(SCSI_CMD_TIMER_initVar == 0u)
- {
- SCSI_CMD_TIMER_Init();
-
- SCSI_CMD_TIMER_initVar = 1u; /* Clear this bit for Initialization */
- }
-
- /* Enable the Timer */
- SCSI_CMD_TIMER_Enable();
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_Stop
-********************************************************************************
-*
-* Summary:
-* The stop function halts the timer, but does not change any modes or disable
-* interrupts.
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-* Side Effects: If the Enable mode is set to Hardware only then this function
-* has no effect on the operation of the timer.
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_Stop(void)
-{
- /* Disable Timer */
- #if(!SCSI_CMD_TIMER_ControlRegRemoved || SCSI_CMD_TIMER_UsingFixedFunction)
- SCSI_CMD_TIMER_CONTROL &= ((uint8)(~SCSI_CMD_TIMER_CTRL_ENABLE));
- #endif /* Remove assignment if control register is removed */
-
- /* Globally disable the Fixed Function Block chosen */
- #if (SCSI_CMD_TIMER_UsingFixedFunction)
- SCSI_CMD_TIMER_GLOBAL_ENABLE &= ((uint8)(~SCSI_CMD_TIMER_BLOCK_EN_MASK));
- SCSI_CMD_TIMER_GLOBAL_STBY_ENABLE &= ((uint8)(~SCSI_CMD_TIMER_BLOCK_STBY_EN_MASK));
- #endif /* Disable global enable for the Timer Fixed function block to stop the Timer*/
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_SetInterruptMode
-********************************************************************************
-*
-* Summary:
-* This function selects which of the interrupt inputs may cause an interrupt.
-* The twosources are caputure and terminal. One, both or neither may
-* be selected.
-*
-* Parameters:
-* interruptMode: This parameter is used to enable interrups on either/or
-* terminal count or capture.
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_SetInterruptMode(uint8 interruptMode)
-{
- SCSI_CMD_TIMER_STATUS_MASK = interruptMode;
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_SoftwareCapture
-********************************************************************************
-*
-* Summary:
-* This function forces a capture independent of the capture signal.
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-* Side Effects:
-* An existing hardware capture could be overwritten.
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_SoftwareCapture(void)
-{
- /* Generate a software capture by reading the counter register */
- (void)SCSI_CMD_TIMER_COUNTER_LSB;
- /* Capture Data is now in the FIFO */
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ReadStatusRegister
-********************************************************************************
-*
-* Summary:
-* Reads the status register and returns it's state. This function should use
-* defined types for the bit-field information as the bits in this register may
-* be permuteable.
-*
-* Parameters:
-* void
-*
-* Return:
-* The contents of the status register
-*
-* Side Effects:
-* Status register bits may be clear on read.
-*
-*******************************************************************************/
-uint8 SCSI_CMD_TIMER_ReadStatusRegister(void)
-{
- return (SCSI_CMD_TIMER_STATUS);
-}
-
-
-#if (!SCSI_CMD_TIMER_ControlRegRemoved) /* Remove API if control register is removed */
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ReadControlRegister
-********************************************************************************
-*
-* Summary:
-* Reads the control register and returns it's value.
-*
-* Parameters:
-* void
-*
-* Return:
-* The contents of the control register
-*
-*******************************************************************************/
-uint8 SCSI_CMD_TIMER_ReadControlRegister(void)
-{
- return ((uint8)SCSI_CMD_TIMER_CONTROL);
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_WriteControlRegister
-********************************************************************************
-*
-* Summary:
-* Sets the bit-field of the control register.
-*
-* Parameters:
-* control: The contents of the control register
-*
-* Return:
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_WriteControlRegister(uint8 control)
-{
- SCSI_CMD_TIMER_CONTROL = control;
-}
-#endif /* Remove API if control register is removed */
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ReadPeriod
-********************************************************************************
-*
-* Summary:
-* This function returns the current value of the Period.
-*
-* Parameters:
-* void
-*
-* Return:
-* The present value of the counter.
-*
-*******************************************************************************/
-uint16 SCSI_CMD_TIMER_ReadPeriod(void)
-{
- #if(SCSI_CMD_TIMER_UsingFixedFunction)
- return ((uint16)CY_GET_REG16(SCSI_CMD_TIMER_PERIOD_LSB_PTR));
- #else
- return (CY_GET_REG16(SCSI_CMD_TIMER_PERIOD_LSB_PTR));
- #endif /* (SCSI_CMD_TIMER_UsingFixedFunction) */
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_WritePeriod
-********************************************************************************
-*
-* Summary:
-* This function is used to change the period of the counter. The new period
-* will be loaded the next time terminal count is detected.
-*
-* Parameters:
-* period: This value may be between 1 and (2^Resolution)-1. A value of 0 will
-* result in the counter remaining at zero.
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_WritePeriod(uint16 period)
-{
- #if(SCSI_CMD_TIMER_UsingFixedFunction)
- uint16 period_temp = (uint16)period;
- CY_SET_REG16(SCSI_CMD_TIMER_PERIOD_LSB_PTR, period_temp);
- #else
- CY_SET_REG16(SCSI_CMD_TIMER_PERIOD_LSB_PTR, period);
- #endif /*Write Period value with appropriate resolution suffix depending on UDB or fixed function implementation */
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ReadCapture
-********************************************************************************
-*
-* Summary:
-* This function returns the last value captured.
-*
-* Parameters:
-* void
-*
-* Return:
-* Present Capture value.
-*
-*******************************************************************************/
-uint16 SCSI_CMD_TIMER_ReadCapture(void)
-{
- #if(SCSI_CMD_TIMER_UsingFixedFunction)
- return ((uint16)CY_GET_REG16(SCSI_CMD_TIMER_CAPTURE_LSB_PTR));
- #else
- return (CY_GET_REG16(SCSI_CMD_TIMER_CAPTURE_LSB_PTR));
- #endif /* (SCSI_CMD_TIMER_UsingFixedFunction) */
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_WriteCounter
-********************************************************************************
-*
-* Summary:
-* This funtion is used to set the counter to a specific value
-*
-* Parameters:
-* counter: New counter value.
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_WriteCounter(uint16 counter) \
-
-{
- #if(SCSI_CMD_TIMER_UsingFixedFunction)
- /* This functionality is removed until a FixedFunction HW update to
- * allow this register to be written
- */
- CY_SET_REG16(SCSI_CMD_TIMER_COUNTER_LSB_PTR, (uint16)counter);
-
- #else
- CY_SET_REG16(SCSI_CMD_TIMER_COUNTER_LSB_PTR, counter);
- #endif /* Set Write Counter only for the UDB implementation (Write Counter not available in fixed function Timer */
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ReadCounter
-********************************************************************************
-*
-* Summary:
-* This function returns the current counter value.
-*
-* Parameters:
-* void
-*
-* Return:
-* Present compare value.
-*
-*******************************************************************************/
-uint16 SCSI_CMD_TIMER_ReadCounter(void)
-{
-
- /* Force capture by reading Accumulator */
- /* Must first do a software capture to be able to read the counter */
- /* It is up to the user code to make sure there isn't already captured data in the FIFO */
- (void)SCSI_CMD_TIMER_COUNTER_LSB;
-
- /* Read the data from the FIFO (or capture register for Fixed Function)*/
- #if(SCSI_CMD_TIMER_UsingFixedFunction)
- return ((uint16)CY_GET_REG16(SCSI_CMD_TIMER_CAPTURE_LSB_PTR));
- #else
- return (CY_GET_REG16(SCSI_CMD_TIMER_CAPTURE_LSB_PTR));
- #endif /* (SCSI_CMD_TIMER_UsingFixedFunction) */
-}
-
-
-#if(!SCSI_CMD_TIMER_UsingFixedFunction) /* UDB Specific Functions */
-
-/*******************************************************************************
- * The functions below this point are only available using the UDB
- * implementation. If a feature is selected, then the API is enabled.
- ******************************************************************************/
-
-
-#if (SCSI_CMD_TIMER_SoftwareCaptureMode)
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_SetCaptureMode
-********************************************************************************
-*
-* Summary:
-* This function sets the capture mode to either rising or falling edge.
-*
-* Parameters:
-* captureMode: This parameter sets the capture mode of the UDB capture feature
-* The parameter values are defined using the
-* #define SCSI_CMD_TIMER__B_TIMER__CM_NONE 0
-#define SCSI_CMD_TIMER__B_TIMER__CM_RISINGEDGE 1
-#define SCSI_CMD_TIMER__B_TIMER__CM_FALLINGEDGE 2
-#define SCSI_CMD_TIMER__B_TIMER__CM_EITHEREDGE 3
-#define SCSI_CMD_TIMER__B_TIMER__CM_SOFTWARE 4
- identifiers
-* The following are the possible values of the parameter
-* SCSI_CMD_TIMER__B_TIMER__CM_NONE - Set Capture mode to None
-* SCSI_CMD_TIMER__B_TIMER__CM_RISINGEDGE - Rising edge of Capture input
-* SCSI_CMD_TIMER__B_TIMER__CM_FALLINGEDGE - Falling edge of Capture input
-* SCSI_CMD_TIMER__B_TIMER__CM_EITHEREDGE - Either edge of Capture input
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_SetCaptureMode(uint8 captureMode)
-{
- /* This must only set to two bits of the control register associated */
- captureMode = ((uint8)((uint8)captureMode << SCSI_CMD_TIMER_CTRL_CAP_MODE_SHIFT));
- captureMode &= (SCSI_CMD_TIMER_CTRL_CAP_MODE_MASK);
-
- /* Clear the Current Setting */
- SCSI_CMD_TIMER_CONTROL &= ((uint8)(~SCSI_CMD_TIMER_CTRL_CAP_MODE_MASK));
-
- /* Write The New Setting */
- SCSI_CMD_TIMER_CONTROL |= captureMode;
-}
-#endif /* Remove API if Capture Mode is not Software Controlled */
-
-
-#if (SCSI_CMD_TIMER_SoftwareTriggerMode)
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_SetTriggerMode
-********************************************************************************
-*
-* Summary:
-* This function sets the trigger input mode
-*
-* Parameters:
-* triggerMode: Pass one of the pre-defined Trigger Modes (except Software)
- #define SCSI_CMD_TIMER__B_TIMER__TM_NONE 0x00u
- #define SCSI_CMD_TIMER__B_TIMER__TM_RISINGEDGE 0x04u
- #define SCSI_CMD_TIMER__B_TIMER__TM_FALLINGEDGE 0x08u
- #define SCSI_CMD_TIMER__B_TIMER__TM_EITHEREDGE 0x0Cu
- #define SCSI_CMD_TIMER__B_TIMER__TM_SOFTWARE 0x10u
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_SetTriggerMode(uint8 triggerMode)
-{
- /* This must only set to two bits of the control register associated */
- triggerMode &= SCSI_CMD_TIMER_CTRL_TRIG_MODE_MASK;
-
- /* Clear the Current Setting */
- SCSI_CMD_TIMER_CONTROL &= ((uint8)(~SCSI_CMD_TIMER_CTRL_TRIG_MODE_MASK));
-
- /* Write The New Setting */
- SCSI_CMD_TIMER_CONTROL |= (triggerMode | SCSI_CMD_TIMER__B_TIMER__TM_SOFTWARE);
-
-}
-#endif /* Remove API if Trigger Mode is not Software Controlled */
-
-#if (SCSI_CMD_TIMER_EnableTriggerMode)
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_EnableTrigger
-********************************************************************************
-*
-* Summary:
-* Sets the control bit enabling Hardware Trigger mode
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_EnableTrigger(void)
-{
- #if (!SCSI_CMD_TIMER_ControlRegRemoved) /* Remove assignment if control register is removed */
- SCSI_CMD_TIMER_CONTROL |= SCSI_CMD_TIMER_CTRL_TRIG_EN;
- #endif /* Remove code section if control register is not used */
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_DisableTrigger
-********************************************************************************
-*
-* Summary:
-* Clears the control bit enabling Hardware Trigger mode
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_DisableTrigger(void)
-{
- #if (!SCSI_CMD_TIMER_ControlRegRemoved) /* Remove assignment if control register is removed */
- SCSI_CMD_TIMER_CONTROL &= ((uint8)(~SCSI_CMD_TIMER_CTRL_TRIG_EN));
- #endif /* Remove code section if control register is not used */
-}
-#endif /* Remove API is Trigger Mode is set to None */
-
-
-#if(SCSI_CMD_TIMER_InterruptOnCaptureCount)
-#if (!SCSI_CMD_TIMER_ControlRegRemoved) /* Remove API if control register is removed */
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_SetInterruptCount
-********************************************************************************
-*
-* Summary:
-* This function sets the capture count before an interrupt is triggered.
-*
-* Parameters:
-* interruptCount: A value between 0 and 3 is valid. If the value is 0, then
-* an interrupt will occur each time a capture occurs.
-* A value of 1 to 3 will cause the interrupt
-* to delay by the same number of captures.
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_SetInterruptCount(uint8 interruptCount)
-{
- /* This must only set to two bits of the control register associated */
- interruptCount &= SCSI_CMD_TIMER_CTRL_INTCNT_MASK;
-
- /* Clear the Current Setting */
- SCSI_CMD_TIMER_CONTROL &= ((uint8)(~SCSI_CMD_TIMER_CTRL_INTCNT_MASK));
- /* Write The New Setting */
- SCSI_CMD_TIMER_CONTROL |= interruptCount;
-}
-#endif /* Remove API if control register is removed */
-#endif /* SCSI_CMD_TIMER_InterruptOnCaptureCount */
-
-
-#if (SCSI_CMD_TIMER_UsingHWCaptureCounter)
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_SetCaptureCount
-********************************************************************************
-*
-* Summary:
-* This function sets the capture count
-*
-* Parameters:
-* captureCount: A value between 2 and 127 inclusive is valid. A value of 1
-* to 127 will cause the interrupt to delay by the same number of
-* captures.
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_SetCaptureCount(uint8 captureCount)
-{
- SCSI_CMD_TIMER_CAP_COUNT = captureCount;
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ReadCaptureCount
-********************************************************************************
-*
-* Summary:
-* This function reads the capture count setting
-*
-* Parameters:
-* void
-*
-* Return:
-* Returns the Capture Count Setting
-*
-*******************************************************************************/
-uint8 SCSI_CMD_TIMER_ReadCaptureCount(void)
-{
- return ((uint8)SCSI_CMD_TIMER_CAP_COUNT);
-}
-#endif /* SCSI_CMD_TIMER_UsingHWCaptureCounter */
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ClearFIFO
-********************************************************************************
-*
-* Summary:
-* This function clears all capture data from the capture FIFO
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_ClearFIFO(void)
-{
- while(0u != (SCSI_CMD_TIMER_ReadStatusRegister() & SCSI_CMD_TIMER_STATUS_FIFONEMP))
- {
- (void)SCSI_CMD_TIMER_ReadCapture();
- }
-}
-
-#endif /* UDB Specific Functions */
-
-
-/* [] END OF FILE */
+++ /dev/null
-/*******************************************************************************
-* File Name: SCSI_CMD_TIMER_ISR.c
-* Version 1.70
-*
-* Description:
-* API for controlling the state of an interrupt.
-*
-*
-* Note:
-*
-********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
-* You may use this file only in accordance with the license, terms, conditions,
-* disclaimers, and limitations in the end user license agreement accompanying
-* the software package with which this file was provided.
-*******************************************************************************/
-
-
-#include <cydevice_trm.h>
-#include <CyLib.h>
-#include <SCSI_CMD_TIMER_ISR.h>
-
-#if !defined(SCSI_CMD_TIMER_ISR__REMOVED) /* Check for removal by optimization */
-
-/*******************************************************************************
-* Place your includes, defines and code here
-********************************************************************************/
-/* `#START SCSI_CMD_TIMER_ISR_intc` */
-
-/* `#END` */
-
-#ifndef CYINT_IRQ_BASE
-#define CYINT_IRQ_BASE 16
-#endif /* CYINT_IRQ_BASE */
-#ifndef CYINT_VECT_TABLE
-#define CYINT_VECT_TABLE ((cyisraddress **) CYREG_NVIC_VECT_OFFSET)
-#endif /* CYINT_VECT_TABLE */
-
-/* Declared in startup, used to set unused interrupts to. */
-CY_ISR_PROTO(IntDefaultHandler);
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_Start
-********************************************************************************
-*
-* Summary:
-* Set up the interrupt and enable it.
-*
-* Parameters:
-* None
-*
-* Return:
-* None
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_ISR_Start(void)
-{
- /* For all we know the interrupt is active. */
- SCSI_CMD_TIMER_ISR_Disable();
-
- /* Set the ISR to point to the SCSI_CMD_TIMER_ISR Interrupt. */
- SCSI_CMD_TIMER_ISR_SetVector(&SCSI_CMD_TIMER_ISR_Interrupt);
-
- /* Set the priority. */
- SCSI_CMD_TIMER_ISR_SetPriority((uint8)SCSI_CMD_TIMER_ISR_INTC_PRIOR_NUMBER);
-
- /* Enable it. */
- SCSI_CMD_TIMER_ISR_Enable();
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_StartEx
-********************************************************************************
-*
-* Summary:
-* Set up the interrupt and enable it.
-*
-* Parameters:
-* address: Address of the ISR to set in the interrupt vector table.
-*
-* Return:
-* None
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_ISR_StartEx(cyisraddress address)
-{
- /* For all we know the interrupt is active. */
- SCSI_CMD_TIMER_ISR_Disable();
-
- /* Set the ISR to point to the SCSI_CMD_TIMER_ISR Interrupt. */
- SCSI_CMD_TIMER_ISR_SetVector(address);
-
- /* Set the priority. */
- SCSI_CMD_TIMER_ISR_SetPriority((uint8)SCSI_CMD_TIMER_ISR_INTC_PRIOR_NUMBER);
-
- /* Enable it. */
- SCSI_CMD_TIMER_ISR_Enable();
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_Stop
-********************************************************************************
-*
-* Summary:
-* Disables and removes the interrupt.
-*
-* Parameters:
-*
-* Return:
-* None
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_ISR_Stop(void)
-{
- /* Disable this interrupt. */
- SCSI_CMD_TIMER_ISR_Disable();
-
- /* Set the ISR to point to the passive one. */
- SCSI_CMD_TIMER_ISR_SetVector(&IntDefaultHandler);
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_Interrupt
-********************************************************************************
-*
-* Summary:
-* The default Interrupt Service Routine for SCSI_CMD_TIMER_ISR.
-*
-* Add custom code between the coments to keep the next version of this file
-* from over writting your code.
-*
-* Parameters:
-*
-* Return:
-* None
-*
-*******************************************************************************/
-CY_ISR(SCSI_CMD_TIMER_ISR_Interrupt)
-{
- /* Place your Interrupt code here. */
- /* `#START SCSI_CMD_TIMER_ISR_Interrupt` */
-
- /* `#END` */
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_SetVector
-********************************************************************************
-*
-* Summary:
-* Change the ISR vector for the Interrupt. Note calling SCSI_CMD_TIMER_ISR_Start
-* will override any effect this method would have had. To set the vector
-* before the component has been started use SCSI_CMD_TIMER_ISR_StartEx instead.
-*
-* Parameters:
-* address: Address of the ISR to set in the interrupt vector table.
-*
-* Return:
-* None
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_ISR_SetVector(cyisraddress address)
-{
- cyisraddress * ramVectorTable;
-
- ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE;
-
- ramVectorTable[CYINT_IRQ_BASE + (uint32)SCSI_CMD_TIMER_ISR__INTC_NUMBER] = address;
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_GetVector
-********************************************************************************
-*
-* Summary:
-* Gets the "address" of the current ISR vector for the Interrupt.
-*
-* Parameters:
-* None
-*
-* Return:
-* Address of the ISR in the interrupt vector table.
-*
-*******************************************************************************/
-cyisraddress SCSI_CMD_TIMER_ISR_GetVector(void)
-{
- cyisraddress * ramVectorTable;
-
- ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE;
-
- return ramVectorTable[CYINT_IRQ_BASE + (uint32)SCSI_CMD_TIMER_ISR__INTC_NUMBER];
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_SetPriority
-********************************************************************************
-*
-* Summary:
-* Sets the Priority of the Interrupt. Note calling SCSI_CMD_TIMER_ISR_Start
-* or SCSI_CMD_TIMER_ISR_StartEx will override any effect this method
-* would have had. This method should only be called after
-* SCSI_CMD_TIMER_ISR_Start or SCSI_CMD_TIMER_ISR_StartEx has been called. To set
-* the initial priority for the component use the cydwr file in the tool.
-*
-* Parameters:
-* priority: Priority of the interrupt. 0 - 7, 0 being the highest.
-*
-* Return:
-* None
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_ISR_SetPriority(uint8 priority)
-{
- *SCSI_CMD_TIMER_ISR_INTC_PRIOR = priority << 5;
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_GetPriority
-********************************************************************************
-*
-* Summary:
-* Gets the Priority of the Interrupt.
-*
-* Parameters:
-* None
-*
-* Return:
-* Priority of the interrupt. 0 - 7, 0 being the highest.
-*
-*******************************************************************************/
-uint8 SCSI_CMD_TIMER_ISR_GetPriority(void)
-{
- uint8 priority;
-
-
- priority = *SCSI_CMD_TIMER_ISR_INTC_PRIOR >> 5;
-
- return priority;
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_Enable
-********************************************************************************
-*
-* Summary:
-* Enables the interrupt.
-*
-* Parameters:
-* None
-*
-* Return:
-* None
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_ISR_Enable(void)
-{
- /* Enable the general interrupt. */
- *SCSI_CMD_TIMER_ISR_INTC_SET_EN = SCSI_CMD_TIMER_ISR__INTC_MASK;
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_GetState
-********************************************************************************
-*
-* Summary:
-* Gets the state (enabled, disabled) of the Interrupt.
-*
-* Parameters:
-* None
-*
-* Return:
-* 1 if enabled, 0 if disabled.
-*
-*******************************************************************************/
-uint8 SCSI_CMD_TIMER_ISR_GetState(void)
-{
- /* Get the state of the general interrupt. */
- return ((*SCSI_CMD_TIMER_ISR_INTC_SET_EN & (uint32)SCSI_CMD_TIMER_ISR__INTC_MASK) != 0u) ? 1u:0u;
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_Disable
-********************************************************************************
-*
-* Summary:
-* Disables the Interrupt.
-*
-* Parameters:
-* None
-*
-* Return:
-* None
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_ISR_Disable(void)
-{
- /* Disable the general interrupt. */
- *SCSI_CMD_TIMER_ISR_INTC_CLR_EN = SCSI_CMD_TIMER_ISR__INTC_MASK;
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_SetPending
-********************************************************************************
-*
-* Summary:
-* Causes the Interrupt to enter the pending state, a software method of
-* generating the interrupt.
-*
-* Parameters:
-* None
-*
-* Return:
-* None
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_ISR_SetPending(void)
-{
- *SCSI_CMD_TIMER_ISR_INTC_SET_PD = SCSI_CMD_TIMER_ISR__INTC_MASK;
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_ISR_ClearPending
-********************************************************************************
-*
-* Summary:
-* Clears a pending interrupt.
-*
-* Parameters:
-* None
-*
-* Return:
-* None
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_ISR_ClearPending(void)
-{
- *SCSI_CMD_TIMER_ISR_INTC_CLR_PD = SCSI_CMD_TIMER_ISR__INTC_MASK;
-}
-
-#endif /* End check for removal by optimization */
-
-
-/* [] END OF FILE */
+++ /dev/null
-/*******************************************************************************
-* File Name: SCSI_CMD_TIMER_ISR.h
-* Version 1.70
-*
-* Description:
-* Provides the function definitions for the Interrupt Controller.
-*
-*
-********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
-* You may use this file only in accordance with the license, terms, conditions,
-* disclaimers, and limitations in the end user license agreement accompanying
-* the software package with which this file was provided.
-*******************************************************************************/
-#if !defined(CY_ISR_SCSI_CMD_TIMER_ISR_H)
-#define CY_ISR_SCSI_CMD_TIMER_ISR_H
-
-
-#include <cytypes.h>
-#include <cyfitter.h>
-
-/* Interrupt Controller API. */
-void SCSI_CMD_TIMER_ISR_Start(void);
-void SCSI_CMD_TIMER_ISR_StartEx(cyisraddress address);
-void SCSI_CMD_TIMER_ISR_Stop(void);
-
-CY_ISR_PROTO(SCSI_CMD_TIMER_ISR_Interrupt);
-
-void SCSI_CMD_TIMER_ISR_SetVector(cyisraddress address);
-cyisraddress SCSI_CMD_TIMER_ISR_GetVector(void);
-
-void SCSI_CMD_TIMER_ISR_SetPriority(uint8 priority);
-uint8 SCSI_CMD_TIMER_ISR_GetPriority(void);
-
-void SCSI_CMD_TIMER_ISR_Enable(void);
-uint8 SCSI_CMD_TIMER_ISR_GetState(void);
-void SCSI_CMD_TIMER_ISR_Disable(void);
-
-void SCSI_CMD_TIMER_ISR_SetPending(void);
-void SCSI_CMD_TIMER_ISR_ClearPending(void);
-
-
-/* Interrupt Controller Constants */
-
-/* Address of the INTC.VECT[x] register that contains the Address of the SCSI_CMD_TIMER_ISR ISR. */
-#define SCSI_CMD_TIMER_ISR_INTC_VECTOR ((reg32 *) SCSI_CMD_TIMER_ISR__INTC_VECT)
-
-/* Address of the SCSI_CMD_TIMER_ISR ISR priority. */
-#define SCSI_CMD_TIMER_ISR_INTC_PRIOR ((reg8 *) SCSI_CMD_TIMER_ISR__INTC_PRIOR_REG)
-
-/* Priority of the SCSI_CMD_TIMER_ISR interrupt. */
-#define SCSI_CMD_TIMER_ISR_INTC_PRIOR_NUMBER SCSI_CMD_TIMER_ISR__INTC_PRIOR_NUM
-
-/* Address of the INTC.SET_EN[x] byte to bit enable SCSI_CMD_TIMER_ISR interrupt. */
-#define SCSI_CMD_TIMER_ISR_INTC_SET_EN ((reg32 *) SCSI_CMD_TIMER_ISR__INTC_SET_EN_REG)
-
-/* Address of the INTC.CLR_EN[x] register to bit clear the SCSI_CMD_TIMER_ISR interrupt. */
-#define SCSI_CMD_TIMER_ISR_INTC_CLR_EN ((reg32 *) SCSI_CMD_TIMER_ISR__INTC_CLR_EN_REG)
-
-/* Address of the INTC.SET_PD[x] register to set the SCSI_CMD_TIMER_ISR interrupt state to pending. */
-#define SCSI_CMD_TIMER_ISR_INTC_SET_PD ((reg32 *) SCSI_CMD_TIMER_ISR__INTC_SET_PD_REG)
-
-/* Address of the INTC.CLR_PD[x] register to clear the SCSI_CMD_TIMER_ISR interrupt. */
-#define SCSI_CMD_TIMER_ISR_INTC_CLR_PD ((reg32 *) SCSI_CMD_TIMER_ISR__INTC_CLR_PD_REG)
-
-
-#endif /* CY_ISR_SCSI_CMD_TIMER_ISR_H */
-
-
-/* [] END OF FILE */
+++ /dev/null
-/*******************************************************************************
-* File Name: SCSI_CMD_TIMER_PM.c
-* Version 2.50
-*
-* Description:
-* This file provides the power management source code to API for the
-* Timer.
-*
-* Note:
-* None
-*
-*******************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
-* You may use this file only in accordance with the license, terms, conditions,
-* disclaimers, and limitations in the end user license agreement accompanying
-* the software package with which this file was provided.
-********************************************************************************/
-
-#include "SCSI_CMD_TIMER.h"
-static SCSI_CMD_TIMER_backupStruct SCSI_CMD_TIMER_backup;
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_SaveConfig
-********************************************************************************
-*
-* Summary:
-* Save the current user configuration
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-* Global variables:
-* SCSI_CMD_TIMER_backup: Variables of this global structure are modified to
-* store the values of non retention configuration registers when Sleep() API is
-* called.
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_SaveConfig(void)
-{
- #if (!SCSI_CMD_TIMER_UsingFixedFunction)
- /* Backup the UDB non-rentention registers for CY_UDB_V0 */
- #if (CY_UDB_V0)
- SCSI_CMD_TIMER_backup.TimerUdb = SCSI_CMD_TIMER_ReadCounter();
- SCSI_CMD_TIMER_backup.TimerPeriod = SCSI_CMD_TIMER_ReadPeriod();
- SCSI_CMD_TIMER_backup.InterruptMaskValue = SCSI_CMD_TIMER_STATUS_MASK;
- #if (SCSI_CMD_TIMER_UsingHWCaptureCounter)
- SCSI_CMD_TIMER_backup.TimerCaptureCounter = SCSI_CMD_TIMER_ReadCaptureCount();
- #endif /* Backup the UDB non-rentention register capture counter for CY_UDB_V0 */
- #endif /* Backup the UDB non-rentention registers for CY_UDB_V0 */
-
- #if (CY_UDB_V1)
- SCSI_CMD_TIMER_backup.TimerUdb = SCSI_CMD_TIMER_ReadCounter();
- SCSI_CMD_TIMER_backup.InterruptMaskValue = SCSI_CMD_TIMER_STATUS_MASK;
- #if (SCSI_CMD_TIMER_UsingHWCaptureCounter)
- SCSI_CMD_TIMER_backup.TimerCaptureCounter = SCSI_CMD_TIMER_ReadCaptureCount();
- #endif /* Back Up capture counter register */
- #endif /* Backup non retention registers, interrupt mask and capture counter for CY_UDB_V1 */
-
- #if(!SCSI_CMD_TIMER_ControlRegRemoved)
- SCSI_CMD_TIMER_backup.TimerControlRegister = SCSI_CMD_TIMER_ReadControlRegister();
- #endif /* Backup the enable state of the Timer component */
- #endif /* Backup non retention registers in UDB implementation. All fixed function registers are retention */
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_RestoreConfig
-********************************************************************************
-*
-* Summary:
-* Restores the current user configuration.
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-* Global variables:
-* SCSI_CMD_TIMER_backup: Variables of this global structure are used to
-* restore the values of non retention registers on wakeup from sleep mode.
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_RestoreConfig(void)
-{
- #if (!SCSI_CMD_TIMER_UsingFixedFunction)
- /* Restore the UDB non-rentention registers for CY_UDB_V0 */
- #if (CY_UDB_V0)
- /* Interrupt State Backup for Critical Region*/
- uint8 SCSI_CMD_TIMER_interruptState;
-
- SCSI_CMD_TIMER_WriteCounter(SCSI_CMD_TIMER_backup.TimerUdb);
- SCSI_CMD_TIMER_WritePeriod(SCSI_CMD_TIMER_backup.TimerPeriod);
- /* CyEnterCriticalRegion and CyExitCriticalRegion are used to mark following region critical*/
- /* Enter Critical Region*/
- SCSI_CMD_TIMER_interruptState = CyEnterCriticalSection();
- /* Use the interrupt output of the status register for IRQ output */
- SCSI_CMD_TIMER_STATUS_AUX_CTRL |= SCSI_CMD_TIMER_STATUS_ACTL_INT_EN_MASK;
- /* Exit Critical Region*/
- CyExitCriticalSection(SCSI_CMD_TIMER_interruptState);
- SCSI_CMD_TIMER_STATUS_MASK =SCSI_CMD_TIMER_backup.InterruptMaskValue;
- #if (SCSI_CMD_TIMER_UsingHWCaptureCounter)
- SCSI_CMD_TIMER_SetCaptureCount(SCSI_CMD_TIMER_backup.TimerCaptureCounter);
- #endif /* Restore the UDB non-rentention register capture counter for CY_UDB_V0 */
- #endif /* Restore the UDB non-rentention registers for CY_UDB_V0 */
-
- #if (CY_UDB_V1)
- SCSI_CMD_TIMER_WriteCounter(SCSI_CMD_TIMER_backup.TimerUdb);
- SCSI_CMD_TIMER_STATUS_MASK =SCSI_CMD_TIMER_backup.InterruptMaskValue;
- #if (SCSI_CMD_TIMER_UsingHWCaptureCounter)
- SCSI_CMD_TIMER_SetCaptureCount(SCSI_CMD_TIMER_backup.TimerCaptureCounter);
- #endif /* Restore Capture counter register*/
- #endif /* Restore up non retention registers, interrupt mask and capture counter for CY_UDB_V1 */
-
- #if(!SCSI_CMD_TIMER_ControlRegRemoved)
- SCSI_CMD_TIMER_WriteControlRegister(SCSI_CMD_TIMER_backup.TimerControlRegister);
- #endif /* Restore the enable state of the Timer component */
- #endif /* Restore non retention registers in the UDB implementation only */
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_Sleep
-********************************************************************************
-*
-* Summary:
-* Stop and Save the user configuration
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-* Global variables:
-* SCSI_CMD_TIMER_backup.TimerEnableState: Is modified depending on the
-* enable state of the block before entering sleep mode.
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_Sleep(void)
-{
- #if(!SCSI_CMD_TIMER_ControlRegRemoved)
- /* Save Counter's enable state */
- if(SCSI_CMD_TIMER_CTRL_ENABLE == (SCSI_CMD_TIMER_CONTROL & SCSI_CMD_TIMER_CTRL_ENABLE))
- {
- /* Timer is enabled */
- SCSI_CMD_TIMER_backup.TimerEnableState = 1u;
- }
- else
- {
- /* Timer is disabled */
- SCSI_CMD_TIMER_backup.TimerEnableState = 0u;
- }
- #endif /* Back up enable state from the Timer control register */
- SCSI_CMD_TIMER_Stop();
- SCSI_CMD_TIMER_SaveConfig();
-}
-
-
-/*******************************************************************************
-* Function Name: SCSI_CMD_TIMER_Wakeup
-********************************************************************************
-*
-* Summary:
-* Restores and enables the user configuration
-*
-* Parameters:
-* void
-*
-* Return:
-* void
-*
-* Global variables:
-* SCSI_CMD_TIMER_backup.enableState: Is used to restore the enable state of
-* block on wakeup from sleep mode.
-*
-*******************************************************************************/
-void SCSI_CMD_TIMER_Wakeup(void)
-{
- SCSI_CMD_TIMER_RestoreConfig();
- #if(!SCSI_CMD_TIMER_ControlRegRemoved)
- if(SCSI_CMD_TIMER_backup.TimerEnableState == 1u)
- { /* Enable Timer's operation */
- SCSI_CMD_TIMER_Enable();
- } /* Do nothing if Timer was disabled before */
- #endif /* Remove this code section if Control register is removed */
-}
-
-
-/* [] END OF FILE */
+++ /dev/null
-/*******************************************************************************\r
-* File Name: SCSI_In_DBx.c \r
-* Version 1.90\r
-*\r
-* Description:\r
-* This file contains API to enable firmware control of a Pins component.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "cytypes.h"\r
-#include "SCSI_In_DBx.h"\r
-\r
-/* APIs are not generated for P15[7:6] on PSoC 5 */\r
-#if !(CY_PSOC5A &&\\r
- SCSI_In_DBx__PORT == 15 && ((SCSI_In_DBx__MASK & 0xC0) != 0))\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_In_DBx_Write\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Assign a new value to the digital port's data output register. \r
-*\r
-* Parameters: \r
-* prtValue: The value to be assigned to the Digital Port. \r
-*\r
-* Return: \r
-* None\r
-* \r
-*******************************************************************************/\r
-void SCSI_In_DBx_Write(uint8 value) \r
-{\r
- uint8 staticBits = (SCSI_In_DBx_DR & (uint8)(~SCSI_In_DBx_MASK));\r
- SCSI_In_DBx_DR = staticBits | ((uint8)(value << SCSI_In_DBx_SHIFT) & SCSI_In_DBx_MASK);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_In_DBx_SetDriveMode\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Change the drive mode on the pins of the port.\r
-* \r
-* Parameters: \r
-* mode: Change the pins to this drive mode.\r
-*\r
-* Return: \r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_In_DBx_SetDriveMode(uint8 mode) \r
-{\r
- CyPins_SetPinDriveMode(SCSI_In_DBx_0, mode);\r
- CyPins_SetPinDriveMode(SCSI_In_DBx_1, mode);\r
- CyPins_SetPinDriveMode(SCSI_In_DBx_2, mode);\r
- CyPins_SetPinDriveMode(SCSI_In_DBx_3, mode);\r
- CyPins_SetPinDriveMode(SCSI_In_DBx_4, mode);\r
- CyPins_SetPinDriveMode(SCSI_In_DBx_5, mode);\r
- CyPins_SetPinDriveMode(SCSI_In_DBx_6, mode);\r
- CyPins_SetPinDriveMode(SCSI_In_DBx_7, mode);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_In_DBx_Read\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Read the current value on the pins of the Digital Port in right justified \r
-* form.\r
-*\r
-* Parameters: \r
-* None\r
-*\r
-* Return: \r
-* Returns the current value of the Digital Port as a right justified number\r
-* \r
-* Note:\r
-* Macro SCSI_In_DBx_ReadPS calls this function. \r
-* \r
-*******************************************************************************/\r
-uint8 SCSI_In_DBx_Read(void) \r
-{\r
- return (SCSI_In_DBx_PS & SCSI_In_DBx_MASK) >> SCSI_In_DBx_SHIFT;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_In_DBx_ReadDataReg\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Read the current value assigned to a Digital Port's data output register\r
-*\r
-* Parameters: \r
-* None \r
-*\r
-* Return: \r
-* Returns the current value assigned to the Digital Port's data output register\r
-* \r
-*******************************************************************************/\r
-uint8 SCSI_In_DBx_ReadDataReg(void) \r
-{\r
- return (SCSI_In_DBx_DR & SCSI_In_DBx_MASK) >> SCSI_In_DBx_SHIFT;\r
-}\r
-\r
-\r
-/* If Interrupts Are Enabled for this Pins component */ \r
-#if defined(SCSI_In_DBx_INTSTAT) \r
-\r
- /*******************************************************************************\r
- * Function Name: SCSI_In_DBx_ClearInterrupt\r
- ********************************************************************************\r
- * Summary:\r
- * Clears any active interrupts attached to port and returns the value of the \r
- * interrupt status register.\r
- *\r
- * Parameters: \r
- * None \r
- *\r
- * Return: \r
- * Returns the value of the interrupt status register\r
- * \r
- *******************************************************************************/\r
- uint8 SCSI_In_DBx_ClearInterrupt(void) \r
- {\r
- return (SCSI_In_DBx_INTSTAT & SCSI_In_DBx_MASK) >> SCSI_In_DBx_SHIFT;\r
- }\r
-\r
-#endif /* If Interrupts Are Enabled for this Pins component */ \r
-\r
-#endif /* CY_PSOC5A... */\r
-\r
- \r
-/* [] END OF FILE */\r
+++ /dev/null
-/*******************************************************************************\r
-* File Name: SCSI_In_DBx.h \r
-* Version 1.90\r
-*\r
-* Description:\r
-* This file containts Control Register function prototypes and register defines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_PINS_SCSI_In_DBx_H) /* Pins SCSI_In_DBx_H */\r
-#define CY_PINS_SCSI_In_DBx_H\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-#include "cypins.h"\r
-#include "SCSI_In_DBx_aliases.h"\r
-\r
-/* Check to see if required defines such as CY_PSOC5A are available */\r
-/* They are defined starting with cy_boot v3.0 */\r
-#if !defined (CY_PSOC5A)\r
- #error Component cy_pins_v1_90 requires cy_boot v3.0 or later\r
-#endif /* (CY_PSOC5A) */\r
-\r
-/* APIs are not generated for P15[7:6] */\r
-#if !(CY_PSOC5A &&\\r
- SCSI_In_DBx__PORT == 15 && ((SCSI_In_DBx__MASK & 0xC0) != 0))\r
-\r
-\r
-/***************************************\r
-* Function Prototypes \r
-***************************************/ \r
-\r
-void SCSI_In_DBx_Write(uint8 value) ;\r
-void SCSI_In_DBx_SetDriveMode(uint8 mode) ;\r
-uint8 SCSI_In_DBx_ReadDataReg(void) ;\r
-uint8 SCSI_In_DBx_Read(void) ;\r
-uint8 SCSI_In_DBx_ClearInterrupt(void) ;\r
-\r
-\r
-/***************************************\r
-* API Constants \r
-***************************************/\r
-\r
-/* Drive Modes */\r
-#define SCSI_In_DBx_DM_ALG_HIZ PIN_DM_ALG_HIZ\r
-#define SCSI_In_DBx_DM_DIG_HIZ PIN_DM_DIG_HIZ\r
-#define SCSI_In_DBx_DM_RES_UP PIN_DM_RES_UP\r
-#define SCSI_In_DBx_DM_RES_DWN PIN_DM_RES_DWN\r
-#define SCSI_In_DBx_DM_OD_LO PIN_DM_OD_LO\r
-#define SCSI_In_DBx_DM_OD_HI PIN_DM_OD_HI\r
-#define SCSI_In_DBx_DM_STRONG PIN_DM_STRONG\r
-#define SCSI_In_DBx_DM_RES_UPDWN PIN_DM_RES_UPDWN\r
-\r
-/* Digital Port Constants */\r
-#define SCSI_In_DBx_MASK SCSI_In_DBx__MASK\r
-#define SCSI_In_DBx_SHIFT SCSI_In_DBx__SHIFT\r
-#define SCSI_In_DBx_WIDTH 8u\r
-\r
-\r
-/***************************************\r
-* Registers \r
-***************************************/\r
-\r
-/* Main Port Registers */\r
-/* Pin State */\r
-#define SCSI_In_DBx_PS (* (reg8 *) SCSI_In_DBx__PS)\r
-/* Data Register */\r
-#define SCSI_In_DBx_DR (* (reg8 *) SCSI_In_DBx__DR)\r
-/* Port Number */\r
-#define SCSI_In_DBx_PRT_NUM (* (reg8 *) SCSI_In_DBx__PRT) \r
-/* Connect to Analog Globals */ \r
-#define SCSI_In_DBx_AG (* (reg8 *) SCSI_In_DBx__AG) \r
-/* Analog MUX bux enable */\r
-#define SCSI_In_DBx_AMUX (* (reg8 *) SCSI_In_DBx__AMUX) \r
-/* Bidirectional Enable */ \r
-#define SCSI_In_DBx_BIE (* (reg8 *) SCSI_In_DBx__BIE)\r
-/* Bit-mask for Aliased Register Access */\r
-#define SCSI_In_DBx_BIT_MASK (* (reg8 *) SCSI_In_DBx__BIT_MASK)\r
-/* Bypass Enable */\r
-#define SCSI_In_DBx_BYP (* (reg8 *) SCSI_In_DBx__BYP)\r
-/* Port wide control signals */ \r
-#define SCSI_In_DBx_CTL (* (reg8 *) SCSI_In_DBx__CTL)\r
-/* Drive Modes */\r
-#define SCSI_In_DBx_DM0 (* (reg8 *) SCSI_In_DBx__DM0) \r
-#define SCSI_In_DBx_DM1 (* (reg8 *) SCSI_In_DBx__DM1)\r
-#define SCSI_In_DBx_DM2 (* (reg8 *) SCSI_In_DBx__DM2) \r
-/* Input Buffer Disable Override */\r
-#define SCSI_In_DBx_INP_DIS (* (reg8 *) SCSI_In_DBx__INP_DIS)\r
-/* LCD Common or Segment Drive */\r
-#define SCSI_In_DBx_LCD_COM_SEG (* (reg8 *) SCSI_In_DBx__LCD_COM_SEG)\r
-/* Enable Segment LCD */\r
-#define SCSI_In_DBx_LCD_EN (* (reg8 *) SCSI_In_DBx__LCD_EN)\r
-/* Slew Rate Control */\r
-#define SCSI_In_DBx_SLW (* (reg8 *) SCSI_In_DBx__SLW)\r
-\r
-/* DSI Port Registers */\r
-/* Global DSI Select Register */\r
-#define SCSI_In_DBx_PRTDSI__CAPS_SEL (* (reg8 *) SCSI_In_DBx__PRTDSI__CAPS_SEL) \r
-/* Double Sync Enable */\r
-#define SCSI_In_DBx_PRTDSI__DBL_SYNC_IN (* (reg8 *) SCSI_In_DBx__PRTDSI__DBL_SYNC_IN) \r
-/* Output Enable Select Drive Strength */\r
-#define SCSI_In_DBx_PRTDSI__OE_SEL0 (* (reg8 *) SCSI_In_DBx__PRTDSI__OE_SEL0) \r
-#define SCSI_In_DBx_PRTDSI__OE_SEL1 (* (reg8 *) SCSI_In_DBx__PRTDSI__OE_SEL1) \r
-/* Port Pin Output Select Registers */\r
-#define SCSI_In_DBx_PRTDSI__OUT_SEL0 (* (reg8 *) SCSI_In_DBx__PRTDSI__OUT_SEL0) \r
-#define SCSI_In_DBx_PRTDSI__OUT_SEL1 (* (reg8 *) SCSI_In_DBx__PRTDSI__OUT_SEL1) \r
-/* Sync Output Enable Registers */\r
-#define SCSI_In_DBx_PRTDSI__SYNC_OUT (* (reg8 *) SCSI_In_DBx__PRTDSI__SYNC_OUT) \r
-\r
-\r
-#if defined(SCSI_In_DBx__INTSTAT) /* Interrupt Registers */\r
-\r
- #define SCSI_In_DBx_INTSTAT (* (reg8 *) SCSI_In_DBx__INTSTAT)\r
- #define SCSI_In_DBx_SNAP (* (reg8 *) SCSI_In_DBx__SNAP)\r
-\r
-#endif /* Interrupt Registers */\r
-\r
-#endif /* CY_PSOC5A... */\r
-\r
-#endif /* CY_PINS_SCSI_In_DBx_H */\r
-\r
-\r
-/* [] END OF FILE */\r
--- /dev/null
+/*******************************************************************************
+* File Name: SCSI_Out_Bits.c
+* Version 1.70
+*
+* Description:
+* This file contains API to enable firmware control of a Control Register.
+*
+* Note:
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+*******************************************************************************/
+
+#include "SCSI_Out_Bits.h"
+
+#if !defined(SCSI_Out_Bits_Sync_ctrl_reg__REMOVED) /* Check for removal by optimization */
+
+/*******************************************************************************
+* Function Name: SCSI_Out_Bits_Write
+********************************************************************************
+*
+* Summary:
+* Write a byte to the Control Register.
+*
+* Parameters:
+* control: The value to be assigned to the Control Register.
+*
+* Return:
+* None.
+*
+*******************************************************************************/
+void SCSI_Out_Bits_Write(uint8 control)
+{
+ SCSI_Out_Bits_Control = control;
+}
+
+
+/*******************************************************************************
+* Function Name: SCSI_Out_Bits_Read
+********************************************************************************
+*
+* Summary:
+* Reads the current value assigned to the Control Register.
+*
+* Parameters:
+* None.
+*
+* Return:
+* Returns the current value in the Control Register.
+*
+*******************************************************************************/
+uint8 SCSI_Out_Bits_Read(void)
+{
+ return SCSI_Out_Bits_Control;
+}
+
+#endif /* End check for removal by optimization */
+
+
+/* [] END OF FILE */
--- /dev/null
+/*******************************************************************************
+* File Name: SCSI_Out_Bits.h
+* Version 1.70
+*
+* Description:
+* This file containts Control Register function prototypes and register defines
+*
+* Note:
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+*******************************************************************************/
+
+#if !defined(CY_CONTROL_REG_SCSI_Out_Bits_H) /* CY_CONTROL_REG_SCSI_Out_Bits_H */
+#define CY_CONTROL_REG_SCSI_Out_Bits_H
+
+#include "cytypes.h"
+
+
+/***************************************
+* Function Prototypes
+***************************************/
+
+void SCSI_Out_Bits_Write(uint8 control) ;
+uint8 SCSI_Out_Bits_Read(void) ;
+
+
+/***************************************
+* Registers
+***************************************/
+
+/* Control Register */
+#define SCSI_Out_Bits_Control (* (reg8 *) SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG )
+#define SCSI_Out_Bits_Control_PTR ( (reg8 *) SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG )
+
+#endif /* End CY_CONTROL_REG_SCSI_Out_Bits_H */
+
+
+/* [] END OF FILE */
--- /dev/null
+/*******************************************************************************
+* File Name: SCSI_Out_Ctl.c
+* Version 1.70
+*
+* Description:
+* This file contains API to enable firmware control of a Control Register.
+*
+* Note:
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+*******************************************************************************/
+
+#include "SCSI_Out_Ctl.h"
+
+#if !defined(SCSI_Out_Ctl_Sync_ctrl_reg__REMOVED) /* Check for removal by optimization */
+
+/*******************************************************************************
+* Function Name: SCSI_Out_Ctl_Write
+********************************************************************************
+*
+* Summary:
+* Write a byte to the Control Register.
+*
+* Parameters:
+* control: The value to be assigned to the Control Register.
+*
+* Return:
+* None.
+*
+*******************************************************************************/
+void SCSI_Out_Ctl_Write(uint8 control)
+{
+ SCSI_Out_Ctl_Control = control;
+}
+
+
+/*******************************************************************************
+* Function Name: SCSI_Out_Ctl_Read
+********************************************************************************
+*
+* Summary:
+* Reads the current value assigned to the Control Register.
+*
+* Parameters:
+* None.
+*
+* Return:
+* Returns the current value in the Control Register.
+*
+*******************************************************************************/
+uint8 SCSI_Out_Ctl_Read(void)
+{
+ return SCSI_Out_Ctl_Control;
+}
+
+#endif /* End check for removal by optimization */
+
+
+/* [] END OF FILE */
--- /dev/null
+/*******************************************************************************
+* File Name: SCSI_Out_Ctl.h
+* Version 1.70
+*
+* Description:
+* This file containts Control Register function prototypes and register defines
+*
+* Note:
+*
+********************************************************************************
+* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+*******************************************************************************/
+
+#if !defined(CY_CONTROL_REG_SCSI_Out_Ctl_H) /* CY_CONTROL_REG_SCSI_Out_Ctl_H */
+#define CY_CONTROL_REG_SCSI_Out_Ctl_H
+
+#include "cytypes.h"
+
+
+/***************************************
+* Function Prototypes
+***************************************/
+
+void SCSI_Out_Ctl_Write(uint8 control) ;
+uint8 SCSI_Out_Ctl_Read(void) ;
+
+
+/***************************************
+* Registers
+***************************************/
+
+/* Control Register */
+#define SCSI_Out_Ctl_Control (* (reg8 *) SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG )
+#define SCSI_Out_Ctl_Control_PTR ( (reg8 *) SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG )
+
+#endif /* End CY_CONTROL_REG_SCSI_Out_Ctl_H */
+
+
+/* [] END OF FILE */
+++ /dev/null
-/*******************************************************************************\r
-* File Name: SCSI_Out_DBx.c \r
-* Version 1.90\r
-*\r
-* Description:\r
-* This file contains API to enable firmware control of a Pins component.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "cytypes.h"\r
-#include "SCSI_Out_DBx.h"\r
-\r
-/* APIs are not generated for P15[7:6] on PSoC 5 */\r
-#if !(CY_PSOC5A &&\\r
- SCSI_Out_DBx__PORT == 15 && ((SCSI_Out_DBx__MASK & 0xC0) != 0))\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_Out_DBx_Write\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Assign a new value to the digital port's data output register. \r
-*\r
-* Parameters: \r
-* prtValue: The value to be assigned to the Digital Port. \r
-*\r
-* Return: \r
-* None\r
-* \r
-*******************************************************************************/\r
-void SCSI_Out_DBx_Write(uint8 value) \r
-{\r
- uint8 staticBits = (SCSI_Out_DBx_DR & (uint8)(~SCSI_Out_DBx_MASK));\r
- SCSI_Out_DBx_DR = staticBits | ((uint8)(value << SCSI_Out_DBx_SHIFT) & SCSI_Out_DBx_MASK);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_Out_DBx_SetDriveMode\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Change the drive mode on the pins of the port.\r
-* \r
-* Parameters: \r
-* mode: Change the pins to this drive mode.\r
-*\r
-* Return: \r
-* None\r
-*\r
-*******************************************************************************/\r
-void SCSI_Out_DBx_SetDriveMode(uint8 mode) \r
-{\r
- CyPins_SetPinDriveMode(SCSI_Out_DBx_0, mode);\r
- CyPins_SetPinDriveMode(SCSI_Out_DBx_1, mode);\r
- CyPins_SetPinDriveMode(SCSI_Out_DBx_2, mode);\r
- CyPins_SetPinDriveMode(SCSI_Out_DBx_3, mode);\r
- CyPins_SetPinDriveMode(SCSI_Out_DBx_4, mode);\r
- CyPins_SetPinDriveMode(SCSI_Out_DBx_5, mode);\r
- CyPins_SetPinDriveMode(SCSI_Out_DBx_6, mode);\r
- CyPins_SetPinDriveMode(SCSI_Out_DBx_7, mode);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_Out_DBx_Read\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Read the current value on the pins of the Digital Port in right justified \r
-* form.\r
-*\r
-* Parameters: \r
-* None\r
-*\r
-* Return: \r
-* Returns the current value of the Digital Port as a right justified number\r
-* \r
-* Note:\r
-* Macro SCSI_Out_DBx_ReadPS calls this function. \r
-* \r
-*******************************************************************************/\r
-uint8 SCSI_Out_DBx_Read(void) \r
-{\r
- return (SCSI_Out_DBx_PS & SCSI_Out_DBx_MASK) >> SCSI_Out_DBx_SHIFT;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SCSI_Out_DBx_ReadDataReg\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Read the current value assigned to a Digital Port's data output register\r
-*\r
-* Parameters: \r
-* None \r
-*\r
-* Return: \r
-* Returns the current value assigned to the Digital Port's data output register\r
-* \r
-*******************************************************************************/\r
-uint8 SCSI_Out_DBx_ReadDataReg(void) \r
-{\r
- return (SCSI_Out_DBx_DR & SCSI_Out_DBx_MASK) >> SCSI_Out_DBx_SHIFT;\r
-}\r
-\r
-\r
-/* If Interrupts Are Enabled for this Pins component */ \r
-#if defined(SCSI_Out_DBx_INTSTAT) \r
-\r
- /*******************************************************************************\r
- * Function Name: SCSI_Out_DBx_ClearInterrupt\r
- ********************************************************************************\r
- * Summary:\r
- * Clears any active interrupts attached to port and returns the value of the \r
- * interrupt status register.\r
- *\r
- * Parameters: \r
- * None \r
- *\r
- * Return: \r
- * Returns the value of the interrupt status register\r
- * \r
- *******************************************************************************/\r
- uint8 SCSI_Out_DBx_ClearInterrupt(void) \r
- {\r
- return (SCSI_Out_DBx_INTSTAT & SCSI_Out_DBx_MASK) >> SCSI_Out_DBx_SHIFT;\r
- }\r
-\r
-#endif /* If Interrupts Are Enabled for this Pins component */ \r
-\r
-#endif /* CY_PSOC5A... */\r
-\r
- \r
-/* [] END OF FILE */\r
+++ /dev/null
-/*******************************************************************************\r
-* File Name: SCSI_Out_DBx.h \r
-* Version 1.90\r
-*\r
-* Description:\r
-* This file containts Control Register function prototypes and register defines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_PINS_SCSI_Out_DBx_H) /* Pins SCSI_Out_DBx_H */\r
-#define CY_PINS_SCSI_Out_DBx_H\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-#include "cypins.h"\r
-#include "SCSI_Out_DBx_aliases.h"\r
-\r
-/* Check to see if required defines such as CY_PSOC5A are available */\r
-/* They are defined starting with cy_boot v3.0 */\r
-#if !defined (CY_PSOC5A)\r
- #error Component cy_pins_v1_90 requires cy_boot v3.0 or later\r
-#endif /* (CY_PSOC5A) */\r
-\r
-/* APIs are not generated for P15[7:6] */\r
-#if !(CY_PSOC5A &&\\r
- SCSI_Out_DBx__PORT == 15 && ((SCSI_Out_DBx__MASK & 0xC0) != 0))\r
-\r
-\r
-/***************************************\r
-* Function Prototypes \r
-***************************************/ \r
-\r
-void SCSI_Out_DBx_Write(uint8 value) ;\r
-void SCSI_Out_DBx_SetDriveMode(uint8 mode) ;\r
-uint8 SCSI_Out_DBx_ReadDataReg(void) ;\r
-uint8 SCSI_Out_DBx_Read(void) ;\r
-uint8 SCSI_Out_DBx_ClearInterrupt(void) ;\r
-\r
-\r
-/***************************************\r
-* API Constants \r
-***************************************/\r
-\r
-/* Drive Modes */\r
-#define SCSI_Out_DBx_DM_ALG_HIZ PIN_DM_ALG_HIZ\r
-#define SCSI_Out_DBx_DM_DIG_HIZ PIN_DM_DIG_HIZ\r
-#define SCSI_Out_DBx_DM_RES_UP PIN_DM_RES_UP\r
-#define SCSI_Out_DBx_DM_RES_DWN PIN_DM_RES_DWN\r
-#define SCSI_Out_DBx_DM_OD_LO PIN_DM_OD_LO\r
-#define SCSI_Out_DBx_DM_OD_HI PIN_DM_OD_HI\r
-#define SCSI_Out_DBx_DM_STRONG PIN_DM_STRONG\r
-#define SCSI_Out_DBx_DM_RES_UPDWN PIN_DM_RES_UPDWN\r
-\r
-/* Digital Port Constants */\r
-#define SCSI_Out_DBx_MASK SCSI_Out_DBx__MASK\r
-#define SCSI_Out_DBx_SHIFT SCSI_Out_DBx__SHIFT\r
-#define SCSI_Out_DBx_WIDTH 8u\r
-\r
-\r
-/***************************************\r
-* Registers \r
-***************************************/\r
-\r
-/* Main Port Registers */\r
-/* Pin State */\r
-#define SCSI_Out_DBx_PS (* (reg8 *) SCSI_Out_DBx__PS)\r
-/* Data Register */\r
-#define SCSI_Out_DBx_DR (* (reg8 *) SCSI_Out_DBx__DR)\r
-/* Port Number */\r
-#define SCSI_Out_DBx_PRT_NUM (* (reg8 *) SCSI_Out_DBx__PRT) \r
-/* Connect to Analog Globals */ \r
-#define SCSI_Out_DBx_AG (* (reg8 *) SCSI_Out_DBx__AG) \r
-/* Analog MUX bux enable */\r
-#define SCSI_Out_DBx_AMUX (* (reg8 *) SCSI_Out_DBx__AMUX) \r
-/* Bidirectional Enable */ \r
-#define SCSI_Out_DBx_BIE (* (reg8 *) SCSI_Out_DBx__BIE)\r
-/* Bit-mask for Aliased Register Access */\r
-#define SCSI_Out_DBx_BIT_MASK (* (reg8 *) SCSI_Out_DBx__BIT_MASK)\r
-/* Bypass Enable */\r
-#define SCSI_Out_DBx_BYP (* (reg8 *) SCSI_Out_DBx__BYP)\r
-/* Port wide control signals */ \r
-#define SCSI_Out_DBx_CTL (* (reg8 *) SCSI_Out_DBx__CTL)\r
-/* Drive Modes */\r
-#define SCSI_Out_DBx_DM0 (* (reg8 *) SCSI_Out_DBx__DM0) \r
-#define SCSI_Out_DBx_DM1 (* (reg8 *) SCSI_Out_DBx__DM1)\r
-#define SCSI_Out_DBx_DM2 (* (reg8 *) SCSI_Out_DBx__DM2) \r
-/* Input Buffer Disable Override */\r
-#define SCSI_Out_DBx_INP_DIS (* (reg8 *) SCSI_Out_DBx__INP_DIS)\r
-/* LCD Common or Segment Drive */\r
-#define SCSI_Out_DBx_LCD_COM_SEG (* (reg8 *) SCSI_Out_DBx__LCD_COM_SEG)\r
-/* Enable Segment LCD */\r
-#define SCSI_Out_DBx_LCD_EN (* (reg8 *) SCSI_Out_DBx__LCD_EN)\r
-/* Slew Rate Control */\r
-#define SCSI_Out_DBx_SLW (* (reg8 *) SCSI_Out_DBx__SLW)\r
-\r
-/* DSI Port Registers */\r
-/* Global DSI Select Register */\r
-#define SCSI_Out_DBx_PRTDSI__CAPS_SEL (* (reg8 *) SCSI_Out_DBx__PRTDSI__CAPS_SEL) \r
-/* Double Sync Enable */\r
-#define SCSI_Out_DBx_PRTDSI__DBL_SYNC_IN (* (reg8 *) SCSI_Out_DBx__PRTDSI__DBL_SYNC_IN) \r
-/* Output Enable Select Drive Strength */\r
-#define SCSI_Out_DBx_PRTDSI__OE_SEL0 (* (reg8 *) SCSI_Out_DBx__PRTDSI__OE_SEL0) \r
-#define SCSI_Out_DBx_PRTDSI__OE_SEL1 (* (reg8 *) SCSI_Out_DBx__PRTDSI__OE_SEL1) \r
-/* Port Pin Output Select Registers */\r
-#define SCSI_Out_DBx_PRTDSI__OUT_SEL0 (* (reg8 *) SCSI_Out_DBx__PRTDSI__OUT_SEL0) \r
-#define SCSI_Out_DBx_PRTDSI__OUT_SEL1 (* (reg8 *) SCSI_Out_DBx__PRTDSI__OUT_SEL1) \r
-/* Sync Output Enable Registers */\r
-#define SCSI_Out_DBx_PRTDSI__SYNC_OUT (* (reg8 *) SCSI_Out_DBx__PRTDSI__SYNC_OUT) \r
-\r
-\r
-#if defined(SCSI_Out_DBx__INTSTAT) /* Interrupt Registers */\r
-\r
- #define SCSI_Out_DBx_INTSTAT (* (reg8 *) SCSI_Out_DBx__INTSTAT)\r
- #define SCSI_Out_DBx_SNAP (* (reg8 *) SCSI_Out_DBx__SNAP)\r
-\r
-#endif /* Interrupt Registers */\r
-\r
-#endif /* CY_PSOC5A... */\r
-\r
-#endif /* CY_PINS_SCSI_Out_DBx_H */\r
-\r
-\r
-/* [] END OF FILE */\r
+++ /dev/null
-/*******************************************************************************\r
-* File Name: SD_WP.c \r
-* Version 1.90\r
-*\r
-* Description:\r
-* This file contains API to enable firmware control of a Pins component.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "cytypes.h"\r
-#include "SD_WP.h"\r
-\r
-/* APIs are not generated for P15[7:6] on PSoC 5 */\r
-#if !(CY_PSOC5A &&\\r
- SD_WP__PORT == 15 && ((SD_WP__MASK & 0xC0) != 0))\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SD_WP_Write\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Assign a new value to the digital port's data output register. \r
-*\r
-* Parameters: \r
-* prtValue: The value to be assigned to the Digital Port. \r
-*\r
-* Return: \r
-* None\r
-* \r
-*******************************************************************************/\r
-void SD_WP_Write(uint8 value) \r
-{\r
- uint8 staticBits = (SD_WP_DR & (uint8)(~SD_WP_MASK));\r
- SD_WP_DR = staticBits | ((uint8)(value << SD_WP_SHIFT) & SD_WP_MASK);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SD_WP_SetDriveMode\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Change the drive mode on the pins of the port.\r
-* \r
-* Parameters: \r
-* mode: Change the pins to this drive mode.\r
-*\r
-* Return: \r
-* None\r
-*\r
-*******************************************************************************/\r
-void SD_WP_SetDriveMode(uint8 mode) \r
-{\r
- CyPins_SetPinDriveMode(SD_WP_0, mode);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SD_WP_Read\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Read the current value on the pins of the Digital Port in right justified \r
-* form.\r
-*\r
-* Parameters: \r
-* None\r
-*\r
-* Return: \r
-* Returns the current value of the Digital Port as a right justified number\r
-* \r
-* Note:\r
-* Macro SD_WP_ReadPS calls this function. \r
-* \r
-*******************************************************************************/\r
-uint8 SD_WP_Read(void) \r
-{\r
- return (SD_WP_PS & SD_WP_MASK) >> SD_WP_SHIFT;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SD_WP_ReadDataReg\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Read the current value assigned to a Digital Port's data output register\r
-*\r
-* Parameters: \r
-* None \r
-*\r
-* Return: \r
-* Returns the current value assigned to the Digital Port's data output register\r
-* \r
-*******************************************************************************/\r
-uint8 SD_WP_ReadDataReg(void) \r
-{\r
- return (SD_WP_DR & SD_WP_MASK) >> SD_WP_SHIFT;\r
-}\r
-\r
-\r
-/* If Interrupts Are Enabled for this Pins component */ \r
-#if defined(SD_WP_INTSTAT) \r
-\r
- /*******************************************************************************\r
- * Function Name: SD_WP_ClearInterrupt\r
- ********************************************************************************\r
- * Summary:\r
- * Clears any active interrupts attached to port and returns the value of the \r
- * interrupt status register.\r
- *\r
- * Parameters: \r
- * None \r
- *\r
- * Return: \r
- * Returns the value of the interrupt status register\r
- * \r
- *******************************************************************************/\r
- uint8 SD_WP_ClearInterrupt(void) \r
- {\r
- return (SD_WP_INTSTAT & SD_WP_MASK) >> SD_WP_SHIFT;\r
- }\r
-\r
-#endif /* If Interrupts Are Enabled for this Pins component */ \r
-\r
-#endif /* CY_PSOC5A... */\r
-\r
- \r
-/* [] END OF FILE */\r
+++ /dev/null
-/*******************************************************************************\r
-* File Name: SD_WP.h \r
-* Version 1.90\r
-*\r
-* Description:\r
-* This file containts Control Register function prototypes and register defines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_PINS_SD_WP_H) /* Pins SD_WP_H */\r
-#define CY_PINS_SD_WP_H\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-#include "cypins.h"\r
-#include "SD_WP_aliases.h"\r
-\r
-/* Check to see if required defines such as CY_PSOC5A are available */\r
-/* They are defined starting with cy_boot v3.0 */\r
-#if !defined (CY_PSOC5A)\r
- #error Component cy_pins_v1_90 requires cy_boot v3.0 or later\r
-#endif /* (CY_PSOC5A) */\r
-\r
-/* APIs are not generated for P15[7:6] */\r
-#if !(CY_PSOC5A &&\\r
- SD_WP__PORT == 15 && ((SD_WP__MASK & 0xC0) != 0))\r
-\r
-\r
-/***************************************\r
-* Function Prototypes \r
-***************************************/ \r
-\r
-void SD_WP_Write(uint8 value) ;\r
-void SD_WP_SetDriveMode(uint8 mode) ;\r
-uint8 SD_WP_ReadDataReg(void) ;\r
-uint8 SD_WP_Read(void) ;\r
-uint8 SD_WP_ClearInterrupt(void) ;\r
-\r
-\r
-/***************************************\r
-* API Constants \r
-***************************************/\r
-\r
-/* Drive Modes */\r
-#define SD_WP_DM_ALG_HIZ PIN_DM_ALG_HIZ\r
-#define SD_WP_DM_DIG_HIZ PIN_DM_DIG_HIZ\r
-#define SD_WP_DM_RES_UP PIN_DM_RES_UP\r
-#define SD_WP_DM_RES_DWN PIN_DM_RES_DWN\r
-#define SD_WP_DM_OD_LO PIN_DM_OD_LO\r
-#define SD_WP_DM_OD_HI PIN_DM_OD_HI\r
-#define SD_WP_DM_STRONG PIN_DM_STRONG\r
-#define SD_WP_DM_RES_UPDWN PIN_DM_RES_UPDWN\r
-\r
-/* Digital Port Constants */\r
-#define SD_WP_MASK SD_WP__MASK\r
-#define SD_WP_SHIFT SD_WP__SHIFT\r
-#define SD_WP_WIDTH 1u\r
-\r
-\r
-/***************************************\r
-* Registers \r
-***************************************/\r
-\r
-/* Main Port Registers */\r
-/* Pin State */\r
-#define SD_WP_PS (* (reg8 *) SD_WP__PS)\r
-/* Data Register */\r
-#define SD_WP_DR (* (reg8 *) SD_WP__DR)\r
-/* Port Number */\r
-#define SD_WP_PRT_NUM (* (reg8 *) SD_WP__PRT) \r
-/* Connect to Analog Globals */ \r
-#define SD_WP_AG (* (reg8 *) SD_WP__AG) \r
-/* Analog MUX bux enable */\r
-#define SD_WP_AMUX (* (reg8 *) SD_WP__AMUX) \r
-/* Bidirectional Enable */ \r
-#define SD_WP_BIE (* (reg8 *) SD_WP__BIE)\r
-/* Bit-mask for Aliased Register Access */\r
-#define SD_WP_BIT_MASK (* (reg8 *) SD_WP__BIT_MASK)\r
-/* Bypass Enable */\r
-#define SD_WP_BYP (* (reg8 *) SD_WP__BYP)\r
-/* Port wide control signals */ \r
-#define SD_WP_CTL (* (reg8 *) SD_WP__CTL)\r
-/* Drive Modes */\r
-#define SD_WP_DM0 (* (reg8 *) SD_WP__DM0) \r
-#define SD_WP_DM1 (* (reg8 *) SD_WP__DM1)\r
-#define SD_WP_DM2 (* (reg8 *) SD_WP__DM2) \r
-/* Input Buffer Disable Override */\r
-#define SD_WP_INP_DIS (* (reg8 *) SD_WP__INP_DIS)\r
-/* LCD Common or Segment Drive */\r
-#define SD_WP_LCD_COM_SEG (* (reg8 *) SD_WP__LCD_COM_SEG)\r
-/* Enable Segment LCD */\r
-#define SD_WP_LCD_EN (* (reg8 *) SD_WP__LCD_EN)\r
-/* Slew Rate Control */\r
-#define SD_WP_SLW (* (reg8 *) SD_WP__SLW)\r
-\r
-/* DSI Port Registers */\r
-/* Global DSI Select Register */\r
-#define SD_WP_PRTDSI__CAPS_SEL (* (reg8 *) SD_WP__PRTDSI__CAPS_SEL) \r
-/* Double Sync Enable */\r
-#define SD_WP_PRTDSI__DBL_SYNC_IN (* (reg8 *) SD_WP__PRTDSI__DBL_SYNC_IN) \r
-/* Output Enable Select Drive Strength */\r
-#define SD_WP_PRTDSI__OE_SEL0 (* (reg8 *) SD_WP__PRTDSI__OE_SEL0) \r
-#define SD_WP_PRTDSI__OE_SEL1 (* (reg8 *) SD_WP__PRTDSI__OE_SEL1) \r
-/* Port Pin Output Select Registers */\r
-#define SD_WP_PRTDSI__OUT_SEL0 (* (reg8 *) SD_WP__PRTDSI__OUT_SEL0) \r
-#define SD_WP_PRTDSI__OUT_SEL1 (* (reg8 *) SD_WP__PRTDSI__OUT_SEL1) \r
-/* Sync Output Enable Registers */\r
-#define SD_WP_PRTDSI__SYNC_OUT (* (reg8 *) SD_WP__PRTDSI__SYNC_OUT) \r
-\r
-\r
-#if defined(SD_WP__INTSTAT) /* Interrupt Registers */\r
-\r
- #define SD_WP_INTSTAT (* (reg8 *) SD_WP__INTSTAT)\r
- #define SD_WP_SNAP (* (reg8 *) SD_WP__SNAP)\r
-\r
-#endif /* Interrupt Registers */\r
-\r
-#endif /* CY_PSOC5A... */\r
-\r
-#endif /* CY_PINS_SD_WP_H */\r
-\r
-\r
-/* [] END OF FILE */\r
+++ /dev/null
-/*******************************************************************************\r
-* File Name: SD_WP.h \r
-* Version 1.90\r
-*\r
-* Description:\r
-* This file containts Control Register function prototypes and register defines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_PINS_SD_WP_ALIASES_H) /* Pins SD_WP_ALIASES_H */\r
-#define CY_PINS_SD_WP_ALIASES_H\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-\r
-\r
-\r
-/***************************************\r
-* Constants \r
-***************************************/\r
-#define SD_WP_0 SD_WP__0__PC\r
-\r
-#endif /* End Pins SD_WP_ALIASES_H */\r
-\r
-/* [] END OF FILE */\r
#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF_SIZE (65u)\r
#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_NUM_OUT_RPTS (1u)\r
#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_COUNT (1u)\r
+#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_BUF_SIZE (65u)\r
+#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_NUM_IN_RPTS (1u)\r
+#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_BUF_SIZE (65u)\r
+#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_NUM_OUT_RPTS (1u)\r
+#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_COUNT (1u)\r
#define USBFS_ENABLE_HID_CLASS \r
#define USBFS_HID_RPT_1_SIZE_LSB (0x24u)\r
#define USBFS_HID_RPT_1_SIZE_MSB (0x00u)\r
#define USBFS_EXTERN_VBUS (0u)\r
#define USBFS_EXTERN_VND (0u)\r
#define USBFS_EXTERN_CLS (0u)\r
-#define USBFS_MAX_INTERFACES_NUMBER (1u)\r
+#define USBFS_MAX_INTERFACES_NUMBER (2u)\r
#define USBFS_EP0_ISR_REMOVE (0u)\r
#define USBFS_EP1_ISR_REMOVE (0u)\r
#define USBFS_EP2_ISR_REMOVE (0u)\r
-#define USBFS_EP3_ISR_REMOVE (1u)\r
-#define USBFS_EP4_ISR_REMOVE (1u)\r
+#define USBFS_EP3_ISR_REMOVE (0u)\r
+#define USBFS_EP4_ISR_REMOVE (0u)\r
#define USBFS_EP5_ISR_REMOVE (1u)\r
#define USBFS_EP6_ISR_REMOVE (1u)\r
#define USBFS_EP7_ISR_REMOVE (1u)\r
+++ /dev/null
-/*******************************************************************************\r
-* File Name: USBFS_1.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-* API for USBFS Component.\r
-*\r
-* Note:\r
-* Many of the functions use endpoint number. RAM arrays are sized with 9\r
-* elements so they are indexed directly by epNumber. The SIE and ARB\r
-* registers are indexed by variations of epNumber - 1.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include <CyDmac.h>\r
-#include "USBFS_1.h"\r
-#include "USBFS_1_pvt.h"\r
-#include "USBFS_1_hid.h"\r
-#if(USBFS_1_DMA1_REMOVE == 0u)\r
- #include "USBFS_1_ep1_dma.h"\r
-#endif /* End USBFS_1_DMA1_REMOVE */\r
-#if(USBFS_1_DMA2_REMOVE == 0u)\r
- #include "USBFS_1_ep2_dma.h"\r
-#endif /* End USBFS_1_DMA2_REMOVE */\r
-#if(USBFS_1_DMA3_REMOVE == 0u)\r
- #include "USBFS_1_ep3_dma.h"\r
-#endif /* End USBFS_1_DMA3_REMOVE */\r
-#if(USBFS_1_DMA4_REMOVE == 0u)\r
- #include "USBFS_1_ep4_dma.h"\r
-#endif /* End USBFS_1_DMA4_REMOVE */\r
-#if(USBFS_1_DMA5_REMOVE == 0u)\r
- #include "USBFS_1_ep5_dma.h"\r
-#endif /* End USBFS_1_DMA5_REMOVE */\r
-#if(USBFS_1_DMA6_REMOVE == 0u)\r
- #include "USBFS_1_ep6_dma.h"\r
-#endif /* End USBFS_1_DMA6_REMOVE */\r
-#if(USBFS_1_DMA7_REMOVE == 0u)\r
- #include "USBFS_1_ep7_dma.h"\r
-#endif /* End USBFS_1_DMA7_REMOVE */\r
-#if(USBFS_1_DMA8_REMOVE == 0u)\r
- #include "USBFS_1_ep8_dma.h"\r
-#endif /* End USBFS_1_DMA8_REMOVE */\r
-\r
-\r
-/***************************************\r
-* Global data allocation\r
-***************************************/\r
-\r
-uint8 USBFS_1_initVar = 0u;\r
-#if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)\r
- uint8 USBFS_1_DmaChan[USBFS_1_MAX_EP];\r
- uint8 USBFS_1_DmaTd[USBFS_1_MAX_EP];\r
-#endif /* End USBFS_1_EP_MM */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_Start\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* This function initialize the USB SIE, arbiter and the\r
-* endpoint APIs, including setting the D+ Pullup\r
-*\r
-* Parameters:\r
-* device: Contains the device number of the desired device descriptor.\r
-* The device number can be found in the Device Descriptor Tab of\r
-* "Configure" dialog, under the settings of desired Device Descriptor,\r
-* in the "Device Number" field.\r
-* mode: The operating voltage. This determines whether the voltage regulator\r
-* is enabled for 5V operation or if pass through mode is used for 3.3V\r
-* operation. Symbolic names and their associated values are given in the\r
-* following table.\r
-* USBFS_1_3V_OPERATION - Disable voltage regulator and pass-thru\r
-* Vcc for pull-up\r
-* USBFS_1_5V_OPERATION - Enable voltage regulator and use\r
-* regulator for pull-up\r
-* USBFS_1_DWR_VDDD_OPERATION - Enable or Disable voltage\r
-* regulator depend on Vddd Voltage configuration in DWR.\r
-*\r
-* Return:\r
-* None.\r
-*\r
-* Global variables:\r
-* The USBFS_1_intiVar variable is used to indicate initial\r
-* configuration of this component. The variable is initialized to zero (0u)\r
-* and set to one (1u) the first time USBFS_1_Start() is called.\r
-* This allows for component Re-Start without unnecessary re-initialization\r
-* in all subsequent calls to the USBFS_1_Start() routine.\r
-* If re-initialization of the component is required the variable should be set\r
-* to zero before call of UART_Start() routine, or the user may call\r
-* USBFS_1_Init() and USBFS_1_InitComponent() as done\r
-* in the USBFS_1_Start() routine.\r
-*\r
-* Side Effects:\r
-* This function will reset all communication states to default.\r
-*\r
-* Reentrant:\r
-* No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_1_Start(uint8 device, uint8 mode) \r
-{\r
- /* If not Initialized then initialize all required hardware and software */\r
- if(USBFS_1_initVar == 0u)\r
- {\r
- USBFS_1_Init();\r
- USBFS_1_initVar = 1u;\r
- }\r
- USBFS_1_InitComponent(device, mode);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_Init\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Initialize component's hardware. Usually called in USBFS_1_Start().\r
-*\r
-* Parameters:\r
-* None.\r
-*\r
-* Return:\r
-* None.\r
-*\r
-* Reentrant:\r
-* No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_1_Init(void) \r
-{\r
- uint8 enableInterrupts;\r
- #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)\r
- uint16 i;\r
- #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */\r
-\r
- enableInterrupts = CyEnterCriticalSection();\r
-\r
- /* Enable USB block */\r
- USBFS_1_PM_ACT_CFG_REG |= USBFS_1_PM_ACT_EN_FSUSB;\r
- /* Enable USB block for Standby Power Mode */\r
- USBFS_1_PM_STBY_CFG_REG |= USBFS_1_PM_STBY_EN_FSUSB;\r
-\r
- /* Enable core clock */\r
- USBFS_1_USB_CLK_EN_REG = USBFS_1_USB_CLK_ENABLE;\r
-\r
- USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK;\r
-\r
- /* ENABLING USBIO PADS IN USB MODE FROM I/O MODE */\r
- /* Ensure USB transmit enable is low (USB_USBIO_CR0.ten). - Manual Transmission - Disabled */\r
- USBFS_1_USBIO_CR0_REG &= ((uint8)(~USBFS_1_USBIO_CR0_TEN));\r
- CyDelayUs(0u); /*~50ns delay */\r
- /* Disable the USBIO by asserting PM.USB_CR0.fsusbio_pd_n(Inverted)\r
- * high. This will have been set low by the power manger out of reset.\r
- * Also confirm USBIO pull-up disabled\r
- */\r
- USBFS_1_PM_USB_CR0_REG &= ((uint8)(~(USBFS_1_PM_USB_CR0_PD_N |\r
- USBFS_1_PM_USB_CR0_PD_PULLUP_N)));\r
-\r
- /* Select iomode to USB mode*/\r
- USBFS_1_USBIO_CR1_REG &= ((uint8)(~USBFS_1_USBIO_CR1_IOMODE));\r
-\r
- /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/\r
- USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_REF_EN;\r
- /* The reference will be available 1 us after the regulator is enabled */\r
- CyDelayUs(1u);\r
- /* OR 40us after power restored */\r
- CyDelayUs(40u);\r
- /* Ensure the single ended disable bits are low (PRT15.INP_DIS[7:6])(input receiver enabled). */\r
- USBFS_1_DM_INP_DIS_REG &= ((uint8)(~USBFS_1_DM_MASK));\r
- USBFS_1_DP_INP_DIS_REG &= ((uint8)(~USBFS_1_DP_MASK));\r
-\r
- /* Enable USBIO */\r
- USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_PD_N;\r
- CyDelayUs(2u);\r
- /* Set the USBIO pull-up enable */\r
- USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_PD_PULLUP_N;\r
-\r
- /* Write WAx */\r
- CY_SET_REG8(USBFS_1_ARB_RW1_WA_PTR, 0u);\r
- CY_SET_REG8(USBFS_1_ARB_RW1_WA_MSB_PTR, 0u);\r
-\r
- #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)\r
- /* Init transfer descriptor. This will be used to detect the DMA state - initialized or not. */\r
- for (i = 0u; i < USBFS_1_MAX_EP; i++)\r
- {\r
- USBFS_1_DmaTd[i] = DMA_INVALID_TD;\r
- }\r
- #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */\r
-\r
- CyExitCriticalSection(enableInterrupts);\r
-\r
-\r
- /* Set the bus reset Interrupt. */\r
- (void) CyIntSetVector(USBFS_1_BUS_RESET_VECT_NUM, &USBFS_1_BUS_RESET_ISR);\r
- CyIntSetPriority(USBFS_1_BUS_RESET_VECT_NUM, USBFS_1_BUS_RESET_PRIOR);\r
-\r
- /* Set the SOF Interrupt. */\r
- #if(USBFS_1_SOF_ISR_REMOVE == 0u)\r
- (void) CyIntSetVector(USBFS_1_SOF_VECT_NUM, &USBFS_1_SOF_ISR);\r
- CyIntSetPriority(USBFS_1_SOF_VECT_NUM, USBFS_1_SOF_PRIOR);\r
- #endif /* End USBFS_1_SOF_ISR_REMOVE */\r
-\r
- /* Set the Control Endpoint Interrupt. */\r
- (void) CyIntSetVector(USBFS_1_EP_0_VECT_NUM, &USBFS_1_EP_0_ISR);\r
- CyIntSetPriority(USBFS_1_EP_0_VECT_NUM, USBFS_1_EP_0_PRIOR);\r
-\r
- /* Set the Data Endpoint 1 Interrupt. */\r
- #if(USBFS_1_EP1_ISR_REMOVE == 0u)\r
- (void) CyIntSetVector(USBFS_1_EP_1_VECT_NUM, &USBFS_1_EP_1_ISR);\r
- CyIntSetPriority(USBFS_1_EP_1_VECT_NUM, USBFS_1_EP_1_PRIOR);\r
- #endif /* End USBFS_1_EP1_ISR_REMOVE */\r
-\r
- /* Set the Data Endpoint 2 Interrupt. */\r
- #if(USBFS_1_EP2_ISR_REMOVE == 0u)\r
- (void) CyIntSetVector(USBFS_1_EP_2_VECT_NUM, &USBFS_1_EP_2_ISR);\r
- CyIntSetPriority(USBFS_1_EP_2_VECT_NUM, USBFS_1_EP_2_PRIOR);\r
- #endif /* End USBFS_1_EP2_ISR_REMOVE */\r
-\r
- /* Set the Data Endpoint 3 Interrupt. */\r
- #if(USBFS_1_EP3_ISR_REMOVE == 0u)\r
- (void) CyIntSetVector(USBFS_1_EP_3_VECT_NUM, &USBFS_1_EP_3_ISR);\r
- CyIntSetPriority(USBFS_1_EP_3_VECT_NUM, USBFS_1_EP_3_PRIOR);\r
- #endif /* End USBFS_1_EP3_ISR_REMOVE */\r
-\r
- /* Set the Data Endpoint 4 Interrupt. */\r
- #if(USBFS_1_EP4_ISR_REMOVE == 0u)\r
- (void) CyIntSetVector(USBFS_1_EP_4_VECT_NUM, &USBFS_1_EP_4_ISR);\r
- CyIntSetPriority(USBFS_1_EP_4_VECT_NUM, USBFS_1_EP_4_PRIOR);\r
- #endif /* End USBFS_1_EP4_ISR_REMOVE */\r
-\r
- /* Set the Data Endpoint 5 Interrupt. */\r
- #if(USBFS_1_EP5_ISR_REMOVE == 0u)\r
- (void) CyIntSetVector(USBFS_1_EP_5_VECT_NUM, &USBFS_1_EP_5_ISR);\r
- CyIntSetPriority(USBFS_1_EP_5_VECT_NUM, USBFS_1_EP_5_PRIOR);\r
- #endif /* End USBFS_1_EP5_ISR_REMOVE */\r
-\r
- /* Set the Data Endpoint 6 Interrupt. */\r
- #if(USBFS_1_EP6_ISR_REMOVE == 0u)\r
- (void) CyIntSetVector(USBFS_1_EP_6_VECT_NUM, &USBFS_1_EP_6_ISR);\r
- CyIntSetPriority(USBFS_1_EP_6_VECT_NUM, USBFS_1_EP_6_PRIOR);\r
- #endif /* End USBFS_1_EP6_ISR_REMOVE */\r
-\r
- /* Set the Data Endpoint 7 Interrupt. */\r
- #if(USBFS_1_EP7_ISR_REMOVE == 0u)\r
- (void) CyIntSetVector(USBFS_1_EP_7_VECT_NUM, &USBFS_1_EP_7_ISR);\r
- CyIntSetPriority(USBFS_1_EP_7_VECT_NUM, USBFS_1_EP_7_PRIOR);\r
- #endif /* End USBFS_1_EP7_ISR_REMOVE */\r
-\r
- /* Set the Data Endpoint 8 Interrupt. */\r
- #if(USBFS_1_EP8_ISR_REMOVE == 0u)\r
- (void) CyIntSetVector(USBFS_1_EP_8_VECT_NUM, &USBFS_1_EP_8_ISR);\r
- CyIntSetPriority(USBFS_1_EP_8_VECT_NUM, USBFS_1_EP_8_PRIOR);\r
- #endif /* End USBFS_1_EP8_ISR_REMOVE */\r
-\r
- #if((USBFS_1_EP_MM != USBFS_1__EP_MANUAL) && (USBFS_1_ARB_ISR_REMOVE == 0u))\r
- /* Set the ARB Interrupt. */\r
- (void) CyIntSetVector(USBFS_1_ARB_VECT_NUM, &USBFS_1_ARB_ISR);\r
- CyIntSetPriority(USBFS_1_ARB_VECT_NUM, USBFS_1_ARB_PRIOR);\r
- #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_InitComponent\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Initialize the component, except for the HW which is done one time in\r
-* the Start function. This function pulls up D+.\r
-*\r
-* Parameters:\r
-* device: Contains the device number of the desired device descriptor.\r
-* The device number can be found in the Device Descriptor Tab of\r
-* "Configure" dialog, under the settings of desired Device Descriptor,\r
-* in the "Device Number" field.\r
-* mode: The operating voltage. This determines whether the voltage regulator\r
-* is enabled for 5V operation or if pass through mode is used for 3.3V\r
-* operation. Symbolic names and their associated values are given in the\r
-* following table.\r
-* USBFS_1_3V_OPERATION - Disable voltage regulator and pass-thru\r
-* Vcc for pull-up\r
-* USBFS_1_5V_OPERATION - Enable voltage regulator and use\r
-* regulator for pull-up\r
-* USBFS_1_DWR_VDDD_OPERATION - Enable or Disable voltage\r
-* regulator depend on Vddd Voltage configuration in DWR.\r
-*\r
-* Return:\r
-* None.\r
-*\r
-* Global variables:\r
-* USBFS_1_device: Contains the device number of the desired device\r
-* descriptor. The device number can be found in the Device Descriptor Tab\r
-* of "Configure" dialog, under the settings of desired Device Descriptor,\r
-* in the "Device Number" field.\r
-* USBFS_1_transferState: This variable used by the communication\r
-* functions to handle current transfer state. Initialized to\r
-* TRANS_STATE_IDLE in this API.\r
-* USBFS_1_configuration: Contains current configuration number\r
-* which is set by the Host using SET_CONFIGURATION request.\r
-* Initialized to zero in this API.\r
-* USBFS_1_deviceAddress: Contains current device address. This\r
-* variable is initialized to zero in this API. Host starts to communicate\r
-* to device with address 0 and then set it to whatever value using\r
-* SET_ADDRESS request.\r
-* USBFS_1_deviceStatus: initialized to 0.\r
-* This is two bit variable which contain power status in first bit\r
-* (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote\r
-* wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.\r
-* USBFS_1_lastPacketSize initialized to 0;\r
-*\r
-* Reentrant:\r
-* No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_1_InitComponent(uint8 device, uint8 mode) \r
-{\r
- /* Initialize _hidProtocol variable to comply with\r
- * HID 7.2.6 Set_Protocol Request:\r
- * "When initialized, all devices default to report protocol."\r
- */\r
- #if defined(USBFS_1_ENABLE_HID_CLASS)\r
- uint8 i;\r
-\r
- for (i = 0u; i < USBFS_1_MAX_INTERFACES_NUMBER; i++)\r
- {\r
- USBFS_1_hidProtocol[i] = USBFS_1_PROTOCOL_REPORT;\r
- }\r
- #endif /* USBFS_1_ENABLE_HID_CLASS */\r
-\r
- /* Enable Interrupts. */\r
- CyIntEnable(USBFS_1_BUS_RESET_VECT_NUM);\r
- CyIntEnable(USBFS_1_EP_0_VECT_NUM);\r
- #if(USBFS_1_EP1_ISR_REMOVE == 0u)\r
- CyIntEnable(USBFS_1_EP_1_VECT_NUM);\r
- #endif /* End USBFS_1_EP1_ISR_REMOVE */\r
- #if(USBFS_1_EP2_ISR_REMOVE == 0u)\r
- CyIntEnable(USBFS_1_EP_2_VECT_NUM);\r
- #endif /* End USBFS_1_EP2_ISR_REMOVE */\r
- #if(USBFS_1_EP3_ISR_REMOVE == 0u)\r
- CyIntEnable(USBFS_1_EP_3_VECT_NUM);\r
- #endif /* End USBFS_1_EP3_ISR_REMOVE */\r
- #if(USBFS_1_EP4_ISR_REMOVE == 0u)\r
- CyIntEnable(USBFS_1_EP_4_VECT_NUM);\r
- #endif /* End USBFS_1_EP4_ISR_REMOVE */\r
- #if(USBFS_1_EP5_ISR_REMOVE == 0u)\r
- CyIntEnable(USBFS_1_EP_5_VECT_NUM);\r
- #endif /* End USBFS_1_EP5_ISR_REMOVE */\r
- #if(USBFS_1_EP6_ISR_REMOVE == 0u)\r
- CyIntEnable(USBFS_1_EP_6_VECT_NUM);\r
- #endif /* End USBFS_1_EP6_ISR_REMOVE */\r
- #if(USBFS_1_EP7_ISR_REMOVE == 0u)\r
- CyIntEnable(USBFS_1_EP_7_VECT_NUM);\r
- #endif /* End USBFS_1_EP7_ISR_REMOVE */\r
- #if(USBFS_1_EP8_ISR_REMOVE == 0u)\r
- CyIntEnable(USBFS_1_EP_8_VECT_NUM);\r
- #endif /* End USBFS_1_EP8_ISR_REMOVE */\r
- #if((USBFS_1_EP_MM != USBFS_1__EP_MANUAL) && (USBFS_1_ARB_ISR_REMOVE == 0u))\r
- /* usb arb interrupt enable */\r
- USBFS_1_ARB_INT_EN_REG = USBFS_1_ARB_INT_MASK;\r
- CyIntEnable(USBFS_1_ARB_VECT_NUM);\r
- #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */\r
-\r
- /* Arbiter configuration for DMA transfers */\r
- #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)\r
-\r
- #if(USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL)\r
- USBFS_1_ARB_CFG_REG = USBFS_1_ARB_CFG_MANUAL_DMA;\r
- #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL */\r
- #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO)\r
- /*Set cfg cmplt this rises DMA request when the full configuration is done */\r
- USBFS_1_ARB_CFG_REG = USBFS_1_ARB_CFG_AUTO_DMA | USBFS_1_ARB_CFG_AUTO_MEM;\r
- #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */\r
- #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */\r
-\r
- USBFS_1_transferState = USBFS_1_TRANS_STATE_IDLE;\r
-\r
- /* USB Locking: Enabled, VRegulator: depend on mode or DWR Voltage configuration*/\r
- switch(mode)\r
- {\r
- case USBFS_1_3V_OPERATION:\r
- USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK;\r
- break;\r
- case USBFS_1_5V_OPERATION:\r
- USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK | USBFS_1_CR1_REG_ENABLE;\r
- break;\r
- default: /*USBFS_1_DWR_VDDD_OPERATION */\r
- #if(USBFS_1_VDDD_MV < USBFS_1_3500MV)\r
- USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK;\r
- #else\r
- USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK | USBFS_1_CR1_REG_ENABLE;\r
- #endif /* End USBFS_1_VDDD_MV < USBFS_1_3500MV */\r
- break;\r
- }\r
-\r
- /* Record the descriptor selection */\r
- USBFS_1_device = device;\r
-\r
- /* Clear all of the component data */\r
- USBFS_1_configuration = 0u;\r
- USBFS_1_interfaceNumber = 0u;\r
- USBFS_1_configurationChanged = 0u;\r
- USBFS_1_deviceAddress = 0u;\r
- USBFS_1_deviceStatus = 0u;\r
-\r
- USBFS_1_lastPacketSize = 0u;\r
-\r
- /* ACK Setup, Stall IN/OUT */\r
- CY_SET_REG8(USBFS_1_EP0_CR_PTR, USBFS_1_MODE_STALL_IN_OUT);\r
-\r
- /* Enable the SIE with an address 0 */\r
- CY_SET_REG8(USBFS_1_CR0_PTR, USBFS_1_CR0_ENABLE);\r
-\r
- /* Workaround for PSOC5LP */\r
- CyDelayCycles(1u);\r
-\r
- /* Finally, Enable d+ pullup and select iomode to USB mode*/\r
- CY_SET_REG8(USBFS_1_USBIO_CR1_PTR, USBFS_1_USBIO_CR1_USBPUEN);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_ReInitComponent\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* This function reinitialize the component configuration and is\r
-* intend to be called from the Reset interrupt.\r
-*\r
-* Parameters:\r
-* None.\r
-*\r
-* Return:\r
-* None.\r
-*\r
-* Global variables:\r
-* USBFS_1_device: Contains the device number of the desired device\r
-* descriptor. The device number can be found in the Device Descriptor Tab\r
-* of "Configure" dialog, under the settings of desired Device Descriptor,\r
-* in the "Device Number" field.\r
-* USBFS_1_transferState: This variable used by the communication\r
-* functions to handle current transfer state. Initialized to\r
-* TRANS_STATE_IDLE in this API.\r
-* USBFS_1_configuration: Contains current configuration number\r
-* which is set by the Host using SET_CONFIGURATION request.\r
-* Initialized to zero in this API.\r
-* USBFS_1_deviceAddress: Contains current device address. This\r
-* variable is initialized to zero in this API. Host starts to communicate\r
-* to device with address 0 and then set it to whatever value using\r
-* SET_ADDRESS request.\r
-* USBFS_1_deviceStatus: initialized to 0.\r
-* This is two bit variable which contain power status in first bit\r
-* (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote\r
-* wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.\r
-* USBFS_1_lastPacketSize initialized to 0;\r
-*\r
-* Reentrant:\r
-* No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_1_ReInitComponent(void) \r
-{\r
- /* Initialize _hidProtocol variable to comply with HID 7.2.6 Set_Protocol\r
- * Request: "When initialized, all devices default to report protocol."\r
- */\r
- #if defined(USBFS_1_ENABLE_HID_CLASS)\r
- uint8 i;\r
-\r
- for (i = 0u; i < USBFS_1_MAX_INTERFACES_NUMBER; i++)\r
- {\r
- USBFS_1_hidProtocol[i] = USBFS_1_PROTOCOL_REPORT;\r
- }\r
- #endif /* USBFS_1_ENABLE_HID_CLASS */\r
-\r
- USBFS_1_transferState = USBFS_1_TRANS_STATE_IDLE;\r
-\r
- /* Clear all of the component data */\r
- USBFS_1_configuration = 0u;\r
- USBFS_1_interfaceNumber = 0u;\r
- USBFS_1_configurationChanged = 0u;\r
- USBFS_1_deviceAddress = 0u;\r
- USBFS_1_deviceStatus = 0u;\r
-\r
- USBFS_1_lastPacketSize = 0u;\r
-\r
-\r
- /* ACK Setup, Stall IN/OUT */\r
- CY_SET_REG8(USBFS_1_EP0_CR_PTR, USBFS_1_MODE_STALL_IN_OUT);\r
-\r
- /* Enable the SIE with an address 0 */\r
- CY_SET_REG8(USBFS_1_CR0_PTR, USBFS_1_CR0_ENABLE);\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_Stop\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* This function shuts down the USB function including to release\r
-* the D+ Pullup and disabling the SIE.\r
-*\r
-* Parameters:\r
-* None.\r
-*\r
-* Return:\r
-* None.\r
-*\r
-* Global variables:\r
-* USBFS_1_configuration: Contains current configuration number\r
-* which is set by the Host using SET_CONFIGURATION request.\r
-* Initialized to zero in this API.\r
-* USBFS_1_deviceAddress: Contains current device address. This\r
-* variable is initialized to zero in this API. Host starts to communicate\r
-* to device with address 0 and then set it to whatever value using\r
-* SET_ADDRESS request.\r
-* USBFS_1_deviceStatus: initialized to 0.\r
-* This is two bit variable which contain power status in first bit\r
-* (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote\r
-* wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.\r
-* USBFS_1_configurationChanged: This variable is set to one after\r
-* SET_CONFIGURATION request and cleared in this function.\r
-* USBFS_1_intiVar variable is set to zero\r
-*\r
-*******************************************************************************/\r
-void USBFS_1_Stop(void) \r
-{\r
-\r
- #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)\r
- USBFS_1_Stop_DMA(USBFS_1_MAX_EP); /* Stop all DMAs */\r
- #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */\r
-\r
- /* Disable the SIE */\r
- USBFS_1_CR0_REG &= (uint8)(~USBFS_1_CR0_ENABLE);\r
- /* Disable the d+ pullup */\r
- USBFS_1_USBIO_CR1_REG &= (uint8)(~USBFS_1_USBIO_CR1_USBPUEN);\r
- /* Disable USB in ACT PM */\r
- USBFS_1_PM_ACT_CFG_REG &= (uint8)(~USBFS_1_PM_ACT_EN_FSUSB);\r
- /* Disable USB block for Standby Power Mode */\r
- USBFS_1_PM_STBY_CFG_REG &= (uint8)(~USBFS_1_PM_STBY_EN_FSUSB);\r
-\r
- /* Disable the reset and EP interrupts */\r
- CyIntDisable(USBFS_1_BUS_RESET_VECT_NUM);\r
- CyIntDisable(USBFS_1_EP_0_VECT_NUM);\r
- #if(USBFS_1_EP1_ISR_REMOVE == 0u)\r
- CyIntDisable(USBFS_1_EP_1_VECT_NUM);\r
- #endif /* End USBFS_1_EP1_ISR_REMOVE */\r
- #if(USBFS_1_EP2_ISR_REMOVE == 0u)\r
- CyIntDisable(USBFS_1_EP_2_VECT_NUM);\r
- #endif /* End USBFS_1_EP2_ISR_REMOVE */\r
- #if(USBFS_1_EP3_ISR_REMOVE == 0u)\r
- CyIntDisable(USBFS_1_EP_3_VECT_NUM);\r
- #endif /* End USBFS_1_EP3_ISR_REMOVE */\r
- #if(USBFS_1_EP4_ISR_REMOVE == 0u)\r
- CyIntDisable(USBFS_1_EP_4_VECT_NUM);\r
- #endif /* End USBFS_1_EP4_ISR_REMOVE */\r
- #if(USBFS_1_EP5_ISR_REMOVE == 0u)\r
- CyIntDisable(USBFS_1_EP_5_VECT_NUM);\r
- #endif /* End USBFS_1_EP5_ISR_REMOVE */\r
- #if(USBFS_1_EP6_ISR_REMOVE == 0u)\r
- CyIntDisable(USBFS_1_EP_6_VECT_NUM);\r
- #endif /* End USBFS_1_EP6_ISR_REMOVE */\r
- #if(USBFS_1_EP7_ISR_REMOVE == 0u)\r
- CyIntDisable(USBFS_1_EP_7_VECT_NUM);\r
- #endif /* End USBFS_1_EP7_ISR_REMOVE */\r
- #if(USBFS_1_EP8_ISR_REMOVE == 0u)\r
- CyIntDisable(USBFS_1_EP_8_VECT_NUM);\r
- #endif /* End USBFS_1_EP8_ISR_REMOVE */\r
-\r
- /* Clear all of the component data */\r
- USBFS_1_configuration = 0u;\r
- USBFS_1_interfaceNumber = 0u;\r
- USBFS_1_configurationChanged = 0u;\r
- USBFS_1_deviceAddress = 0u;\r
- USBFS_1_deviceStatus = 0u;\r
- USBFS_1_initVar = 0u;\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_CheckActivity\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Returns the activity status of the bus. Clears the status hardware to\r
-* provide fresh activity status on the next call of this routine.\r
-*\r
-* Parameters:\r
-* None.\r
-*\r
-* Return:\r
-* 1 - If bus activity was detected since the last call to this function\r
-* 0 - If bus activity not was detected since the last call to this function\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_1_CheckActivity(void) \r
-{\r
- uint8 r;\r
-\r
- r = CY_GET_REG8(USBFS_1_CR1_PTR);\r
- CY_SET_REG8(USBFS_1_CR1_PTR, (r & ((uint8)(~USBFS_1_CR1_BUS_ACTIVITY))));\r
-\r
- return((r & USBFS_1_CR1_BUS_ACTIVITY) >> USBFS_1_CR1_BUS_ACTIVITY_SHIFT);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_GetConfiguration\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Returns the current configuration setting\r
-*\r
-* Parameters:\r
-* None.\r
-*\r
-* Return:\r
-* configuration.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_1_GetConfiguration(void) \r
-{\r
- return(USBFS_1_configuration);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_IsConfigurationChanged\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Returns the clear on read configuration state. It is usefull when PC send\r
-* double SET_CONFIGURATION request with same configuration number.\r
-*\r
-* Parameters:\r
-* None.\r
-*\r
-* Return:\r
-* Not zero value when new configuration has been changed, otherwise zero is\r
-* returned.\r
-*\r
-* Global variables:\r
-* USBFS_1_configurationChanged: This variable is set to one after\r
-* SET_CONFIGURATION request and cleared in this function.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_1_IsConfigurationChanged(void) \r
-{\r
- uint8 res = 0u;\r
-\r
- if(USBFS_1_configurationChanged != 0u)\r
- {\r
- res = USBFS_1_configurationChanged;\r
- USBFS_1_configurationChanged = 0u;\r
- }\r
-\r
- return(res);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_GetInterfaceSetting\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Returns the alternate setting from current interface\r
-*\r
-* Parameters:\r
-* uint8 interfaceNumber, interface number\r
-*\r
-* Return:\r
-* Alternate setting.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_1_GetInterfaceSetting(uint8 interfaceNumber)\r
- \r
-{\r
- return(USBFS_1_interfaceSetting[interfaceNumber]);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_GetEPState\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Returned the state of the requested endpoint.\r
-*\r
-* Parameters:\r
-* epNumber: Endpoint Number\r
-*\r
-* Return:\r
-* State of the requested endpoint.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_1_GetEPState(uint8 epNumber) \r
-{\r
- return(USBFS_1_EP[epNumber].apiEpState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_GetEPCount\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* This function supports Data Endpoints only(EP1-EP8).\r
-* Returns the transfer count for the requested endpoint. The value from\r
-* the count registers includes 2 counts for the two byte checksum of the\r
-* packet. This function subtracts the two counts.\r
-*\r
-* Parameters:\r
-* epNumber: Data Endpoint Number.\r
-* Valid values are between 1 and 8.\r
-*\r
-* Return:\r
-* Returns the current byte count from the specified endpoint or 0 for an\r
-* invalid endpoint.\r
-*\r
-*******************************************************************************/\r
-uint16 USBFS_1_GetEPCount(uint8 epNumber) \r
-{\r
- uint8 ri;\r
- uint16 result = 0u;\r
-\r
- if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP))\r
- {\r
- ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT);\r
-\r
- result = (uint8)(CY_GET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT0_IND + ri)) &\r
- USBFS_1_EPX_CNT0_MASK);\r
- result = (result << 8u) | CY_GET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT1_IND + ri));\r
- result -= USBFS_1_EPX_CNTX_CRC_COUNT;\r
- }\r
- return(result);\r
-}\r
-\r
-\r
-#if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)\r
-\r
-\r
- /*******************************************************************************\r
- * Function Name: USBFS_1_InitEP_DMA\r
- ********************************************************************************\r
- *\r
- * Summary:\r
- * This function allocates and initializes a DMA channel to be used by the\r
- * USBFS_1_LoadInEP() or USBFS_1_ReadOutEP() APIs for data\r
- * transfer.\r
- *\r
- * Parameters:\r
- * epNumber: Contains the data endpoint number.\r
- * Valid values are between 1 and 8.\r
- * *pData: Pointer to a data array that is related to the EP transfers.\r
- *\r
- * Return:\r
- * None.\r
- *\r
- * Reentrant:\r
- * No.\r
- *\r
- *******************************************************************************/\r
- void USBFS_1_InitEP_DMA(uint8 epNumber, const uint8 *pData)\r
- \r
- {\r
- uint16 src;\r
- uint16 dst;\r
- #if (CY_PSOC3) /* PSoC 3 */\r
- src = HI16(CYDEV_SRAM_BASE);\r
- dst = HI16(CYDEV_PERIPH_BASE);\r
- pData = pData;\r
- #else /* PSoC 5 */\r
- if((USBFS_1_EP[epNumber].addr & USBFS_1_DIR_IN) != 0u )\r
- { /* for the IN EP source is the SRAM memory buffer */\r
- src = HI16(pData);\r
- dst = HI16(CYDEV_PERIPH_BASE);\r
- }\r
- else\r
- { /* for the OUT EP source is the SIE register */\r
- src = HI16(CYDEV_PERIPH_BASE);\r
- dst = HI16(pData);\r
- }\r
- #endif /* End C51 */\r
- switch(epNumber)\r
- {\r
- case USBFS_1_EP1:\r
- #if(USBFS_1_DMA1_REMOVE == 0u)\r
- USBFS_1_DmaChan[epNumber] = USBFS_1_ep1_DmaInitialize(\r
- USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst);\r
- #endif /* End USBFS_1_DMA1_REMOVE */\r
- break;\r
- case USBFS_1_EP2:\r
- #if(USBFS_1_DMA2_REMOVE == 0u)\r
- USBFS_1_DmaChan[epNumber] = USBFS_1_ep2_DmaInitialize(\r
- USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst);\r
- #endif /* End USBFS_1_DMA2_REMOVE */\r
- break;\r
- case USBFS_1_EP3:\r
- #if(USBFS_1_DMA3_REMOVE == 0u)\r
- USBFS_1_DmaChan[epNumber] = USBFS_1_ep3_DmaInitialize(\r
- USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst);\r
- #endif /* End USBFS_1_DMA3_REMOVE */\r
- break;\r
- case USBFS_1_EP4:\r
- #if(USBFS_1_DMA4_REMOVE == 0u)\r
- USBFS_1_DmaChan[epNumber] = USBFS_1_ep4_DmaInitialize(\r
- USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst);\r
- #endif /* End USBFS_1_DMA4_REMOVE */\r
- break;\r
- case USBFS_1_EP5:\r
- #if(USBFS_1_DMA5_REMOVE == 0u)\r
- USBFS_1_DmaChan[epNumber] = USBFS_1_ep5_DmaInitialize(\r
- USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst);\r
- #endif /* End USBFS_1_DMA5_REMOVE */\r
- break;\r
- case USBFS_1_EP6:\r
- #if(USBFS_1_DMA6_REMOVE == 0u)\r
- USBFS_1_DmaChan[epNumber] = USBFS_1_ep6_DmaInitialize(\r
- USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst);\r
- #endif /* End USBFS_1_DMA6_REMOVE */\r
- break;\r
- case USBFS_1_EP7:\r
- #if(USBFS_1_DMA7_REMOVE == 0u)\r
- USBFS_1_DmaChan[epNumber] = USBFS_1_ep7_DmaInitialize(\r
- USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst);\r
- #endif /* End USBFS_1_DMA7_REMOVE */\r
- break;\r
- case USBFS_1_EP8:\r
- #if(USBFS_1_DMA8_REMOVE == 0u)\r
- USBFS_1_DmaChan[epNumber] = USBFS_1_ep8_DmaInitialize(\r
- USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst);\r
- #endif /* End USBFS_1_DMA8_REMOVE */\r
- break;\r
- default:\r
- /* Do not support EP0 DMA transfers */\r
- break;\r
- }\r
- if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP))\r
- {\r
- USBFS_1_DmaTd[epNumber] = CyDmaTdAllocate();\r
- }\r
- }\r
-\r
-\r
- /*******************************************************************************\r
- * Function Name: USBFS_1_Stop_DMA\r
- ********************************************************************************\r
- *\r
- * Summary: Stops and free DMA\r
- *\r
- * Parameters:\r
- * epNumber: Contains the data endpoint number or\r
- * USBFS_1_MAX_EP to stop all DMAs\r
- *\r
- * Return:\r
- * None.\r
- *\r
- * Reentrant:\r
- * No.\r
- *\r
- *******************************************************************************/\r
- void USBFS_1_Stop_DMA(uint8 epNumber) \r
- {\r
- uint8 i;\r
- i = (epNumber < USBFS_1_MAX_EP) ? epNumber : USBFS_1_EP1;\r
- do\r
- {\r
- if(USBFS_1_DmaTd[i] != DMA_INVALID_TD)\r
- {\r
- (void) CyDmaChDisable(USBFS_1_DmaChan[i]);\r
- CyDmaTdFree(USBFS_1_DmaTd[i]);\r
- USBFS_1_DmaTd[i] = DMA_INVALID_TD;\r
- }\r
- i++;\r
- }while((i < USBFS_1_MAX_EP) && (epNumber == USBFS_1_MAX_EP));\r
- }\r
-\r
-#endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_LoadInEP\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Loads and enables the specified USB data endpoint for an IN interrupt or bulk\r
-* transfer.\r
-*\r
-* Parameters:\r
-* epNumber: Contains the data endpoint number.\r
-* Valid values are between 1 and 8.\r
-* *pData: A pointer to a data array from which the data for the endpoint space\r
-* is loaded.\r
-* length: The number of bytes to transfer from the array and then send as a\r
-* result of an IN request. Valid values are between 0 and 512.\r
-*\r
-* Return:\r
-* None.\r
-*\r
-* Reentrant:\r
-* No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_1_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)\r
- \r
-{\r
- uint8 ri;\r
- reg8 *p;\r
- #if(USBFS_1_EP_MM == USBFS_1__EP_MANUAL)\r
- uint16 i;\r
- #endif /* End USBFS_1_EP_MM == USBFS_1__EP_MANUAL */\r
-\r
- if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP))\r
- {\r
- ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT);\r
- p = (reg8 *)(USBFS_1_ARB_RW1_DR_IND + ri);\r
-\r
- #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO)\r
- /* Limits length to available buffer space, auto MM could send packets up to 1024 bytes */\r
- if(length > (USBFS_1_EPX_DATA_BUF_MAX - USBFS_1_EP[epNumber].buffOffset))\r
- {\r
- length = USBFS_1_EPX_DATA_BUF_MAX - USBFS_1_EP[epNumber].buffOffset;\r
- }\r
- #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */\r
-\r
- /* Set the count and data toggle */\r
- CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT0_IND + ri),\r
- (length >> 8u) | (USBFS_1_EP[epNumber].epToggle));\r
- CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT1_IND + ri), length & 0xFFu);\r
-\r
- #if(USBFS_1_EP_MM == USBFS_1__EP_MANUAL)\r
- if(pData != NULL)\r
- {\r
- /* Copy the data using the arbiter data register */\r
- for (i = 0u; i < length; i++)\r
- {\r
- CY_SET_REG8(p, pData[i]);\r
- }\r
- }\r
- USBFS_1_EP[epNumber].apiEpState = USBFS_1_NO_EVENT_PENDING;\r
- /* Write the Mode register */\r
- CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_EP[epNumber].epMode);\r
- #else\r
- /* Init DMA if it was not initialized */\r
- if(USBFS_1_DmaTd[epNumber] == DMA_INVALID_TD)\r
- {\r
- USBFS_1_InitEP_DMA(epNumber, pData);\r
- }\r
- #endif /* End USBFS_1_EP_MM == USBFS_1__EP_MANUAL */\r
-\r
- #if(USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL)\r
- USBFS_1_EP[epNumber].apiEpState = USBFS_1_NO_EVENT_PENDING;\r
- if((pData != NULL) && (length > 0u))\r
- {\r
- /* Enable DMA in mode2 for transferring data */\r
- (void) CyDmaChDisable(USBFS_1_DmaChan[epNumber]);\r
- (void) CyDmaTdSetConfiguration(USBFS_1_DmaTd[epNumber], length, CY_DMA_DISABLE_TD,\r
- TD_TERMIN_EN | TD_INC_SRC_ADR);\r
- (void) CyDmaTdSetAddress(USBFS_1_DmaTd[epNumber], LO16((uint32)pData), LO16((uint32)p));\r
- /* Enable the DMA */\r
- (void) CyDmaChSetInitialTd(USBFS_1_DmaChan[epNumber], USBFS_1_DmaTd[epNumber]);\r
- (void) CyDmaChEnable(USBFS_1_DmaChan[epNumber], 1u);\r
- /* Generate DMA request */\r
- * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) |= USBFS_1_ARB_EPX_CFG_DMA_REQ;\r
- * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) &= ((uint8)(~USBFS_1_ARB_EPX_CFG_DMA_REQ));\r
- /* Mode register will be written in arb ISR after DMA transfer complete */\r
- }\r
- else\r
- {\r
- /* When zero-length packet - write the Mode register directly */\r
- CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_EP[epNumber].epMode);\r
- }\r
- #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL */\r
-\r
- #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO)\r
- if(pData != NULL)\r
- {\r
- /* Enable DMA in mode3 for transferring data */\r
- (void) CyDmaChDisable(USBFS_1_DmaChan[epNumber]);\r
- (void) CyDmaTdSetConfiguration(USBFS_1_DmaTd[epNumber], length,\r
- USBFS_1_DmaTd[epNumber], TD_TERMIN_EN | TD_INC_SRC_ADR);\r
- (void) CyDmaTdSetAddress(USBFS_1_DmaTd[epNumber], LO16((uint32)pData), LO16((uint32)p));\r
- /* Clear Any potential pending DMA requests before starting the DMA channel to transfer data */\r
- (void) CyDmaClearPendingDrq(USBFS_1_DmaChan[epNumber]);\r
- /* Enable the DMA */\r
- (void) CyDmaChSetInitialTd(USBFS_1_DmaChan[epNumber], USBFS_1_DmaTd[epNumber]);\r
- (void) CyDmaChEnable(USBFS_1_DmaChan[epNumber], 1u);\r
- }\r
- else\r
- {\r
- USBFS_1_EP[epNumber].apiEpState = USBFS_1_NO_EVENT_PENDING;\r
- if(length > 0u)\r
- {\r
- /* Set Data ready status, This will generate DMA request */\r
- * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) |= USBFS_1_ARB_EPX_CFG_IN_DATA_RDY;\r
- /* Mode register will be written in arb ISR(In Buffer Full) after first DMA transfer complete */\r
- }\r
- else\r
- {\r
- /* When zero-length packet - write the Mode register directly */\r
- CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_EP[epNumber].epMode);\r
- }\r
- }\r
- #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */\r
-\r
- }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_ReadOutEP\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Read data from an endpoint. The application must call\r
-* USBFS_1_GetEPState to see if an event is pending.\r
-*\r
-* Parameters:\r
-* epNumber: Contains the data endpoint number.\r
-* Valid values are between 1 and 8.\r
-* pData: A pointer to a data array from which the data for the endpoint space\r
-* is loaded.\r
-* length: The number of bytes to transfer from the USB Out endpoint and loads\r
-* it into data array. Valid values are between 0 and 1023. The function\r
-* moves fewer than the requested number of bytes if the host sends\r
-* fewer bytes than requested.\r
-*\r
-* Returns:\r
-* Number of bytes received, 0 for an invalid endpoint.\r
-*\r
-* Reentrant:\r
-* No.\r
-*\r
-*******************************************************************************/\r
-uint16 USBFS_1_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length)\r
- \r
-{\r
- uint8 ri;\r
- reg8 *p;\r
- #if(USBFS_1_EP_MM == USBFS_1__EP_MANUAL)\r
- uint16 i;\r
- #endif /* End USBFS_1_EP_MM == USBFS_1__EP_MANUAL */\r
- #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO)\r
- uint16 xferCount;\r
- #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */\r
-\r
- if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP) && (pData != NULL))\r
- {\r
- ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT);\r
- p = (reg8 *)(USBFS_1_ARB_RW1_DR_IND + ri);\r
-\r
- #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO)\r
- /* Determine which is smaller the requested data or the available data */\r
- xferCount = USBFS_1_GetEPCount(epNumber);\r
- if (length > xferCount)\r
- {\r
- length = xferCount;\r
- }\r
- #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */\r
-\r
- #if(USBFS_1_EP_MM == USBFS_1__EP_MANUAL)\r
- /* Copy the data using the arbiter data register */\r
- for (i = 0u; i < length; i++)\r
- {\r
- pData[i] = CY_GET_REG8(p);\r
- }\r
-\r
- /* (re)arming of OUT endpoint */\r
- USBFS_1_EnableOutEP(epNumber);\r
- #else\r
- /*Init DMA if it was not initialized */\r
- if(USBFS_1_DmaTd[epNumber] == DMA_INVALID_TD)\r
- {\r
- USBFS_1_InitEP_DMA(epNumber, pData);\r
- }\r
- #endif /* End USBFS_1_EP_MM == USBFS_1__EP_MANUAL */\r
-\r
- #if(USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL)\r
- /* Enable DMA in mode2 for transferring data */\r
- (void) CyDmaChDisable(USBFS_1_DmaChan[epNumber]);\r
- (void) CyDmaTdSetConfiguration(USBFS_1_DmaTd[epNumber], length, CY_DMA_DISABLE_TD,\r
- TD_TERMIN_EN | TD_INC_DST_ADR);\r
- (void) CyDmaTdSetAddress(USBFS_1_DmaTd[epNumber], LO16((uint32)p), LO16((uint32)pData));\r
- /* Enable the DMA */\r
- (void) CyDmaChSetInitialTd(USBFS_1_DmaChan[epNumber], USBFS_1_DmaTd[epNumber]);\r
- (void) CyDmaChEnable(USBFS_1_DmaChan[epNumber], 1u);\r
-\r
- /* Generate DMA request */\r
- * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) |= USBFS_1_ARB_EPX_CFG_DMA_REQ;\r
- * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) &= ((uint8)(~USBFS_1_ARB_EPX_CFG_DMA_REQ));\r
- /* Out EP will be (re)armed in arb ISR after transfer complete */\r
- #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL */\r
-\r
- #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO)\r
- /* Enable DMA in mode3 for transferring data */\r
- (void) CyDmaChDisable(USBFS_1_DmaChan[epNumber]);\r
- (void) CyDmaTdSetConfiguration(USBFS_1_DmaTd[epNumber], length, USBFS_1_DmaTd[epNumber],\r
- TD_TERMIN_EN | TD_INC_DST_ADR);\r
- (void) CyDmaTdSetAddress(USBFS_1_DmaTd[epNumber], LO16((uint32)p), LO16((uint32)pData));\r
-\r
- /* Clear Any potential pending DMA requests before starting the DMA channel to transfer data */\r
- (void) CyDmaClearPendingDrq(USBFS_1_DmaChan[epNumber]);\r
- /* Enable the DMA */\r
- (void) CyDmaChSetInitialTd(USBFS_1_DmaChan[epNumber], USBFS_1_DmaTd[epNumber]);\r
- (void) CyDmaChEnable(USBFS_1_DmaChan[epNumber], 1u);\r
- /* Out EP will be (re)armed in arb ISR after transfer complete */\r
- #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */\r
-\r
- }\r
- else\r
- {\r
- length = 0u;\r
- }\r
-\r
- return(length);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_EnableOutEP\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* This function enables an OUT endpoint. It should not be\r
-* called for an IN endpoint.\r
-*\r
-* Parameters:\r
-* epNumber: Endpoint Number\r
-* Valid values are between 1 and 8.\r
-*\r
-* Return:\r
-* None.\r
-*\r
-* Global variables:\r
-* USBFS_1_EP[epNumber].apiEpState - set to NO_EVENT_PENDING\r
-*\r
-* Reentrant:\r
-* No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_1_EnableOutEP(uint8 epNumber) \r
-{\r
- uint8 ri;\r
-\r
- if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP))\r
- {\r
- ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT);\r
- USBFS_1_EP[epNumber].apiEpState = USBFS_1_NO_EVENT_PENDING;\r
- /* Write the Mode register */\r
- CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_EP[epNumber].epMode);\r
- }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_DisableOutEP\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* This function disables an OUT endpoint. It should not be\r
-* called for an IN endpoint.\r
-*\r
-* Parameters:\r
-* epNumber: Endpoint Number\r
-* Valid values are between 1 and 8.\r
-*\r
-* Return:\r
-* None.\r
-*\r
-*******************************************************************************/\r
-void USBFS_1_DisableOutEP(uint8 epNumber) \r
-{\r
- uint8 ri ;\r
-\r
- if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP))\r
- {\r
- ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT);\r
- /* Write the Mode register */\r
- CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_NAK_OUT);\r
- }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_Force\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Forces the bus state\r
-*\r
-* Parameters:\r
-* bState\r
-* USBFS_1_FORCE_J\r
-* USBFS_1_FORCE_K\r
-* USBFS_1_FORCE_SE0\r
-* USBFS_1_FORCE_NONE\r
-*\r
-* Return:\r
-* None.\r
-*\r
-*******************************************************************************/\r
-void USBFS_1_Force(uint8 bState) \r
-{\r
- CY_SET_REG8(USBFS_1_USBIO_CR0_PTR, bState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_GetEPAckState\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Returns the ACK of the CR0 Register (ACKD)\r
-*\r
-* Parameters:\r
-* epNumber: Endpoint Number\r
-* Valid values are between 1 and 8.\r
-*\r
-* Returns\r
-* 0 if nothing has been ACKD, non-=zero something has been ACKD\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_1_GetEPAckState(uint8 epNumber) \r
-{\r
- uint8 ri;\r
- uint8 cr = 0u;\r
-\r
- if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP))\r
- {\r
- ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT);\r
- cr = CY_GET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri)) & USBFS_1_MODE_ACKD;\r
- }\r
-\r
- return(cr);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_SetPowerStatus\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Sets the device power status for reporting in the Get Device Status\r
-* request\r
-*\r
-* Parameters:\r
-* powerStatus: USBFS_1_DEVICE_STATUS_BUS_POWERED(0) - Bus Powered,\r
-* USBFS_1_DEVICE_STATUS_SELF_POWERED(1) - Self Powered\r
-*\r
-* Return:\r
-* None.\r
-*\r
-* Global variables:\r
-* USBFS_1_deviceStatus - set power status\r
-*\r
-* Reentrant:\r
-* No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_1_SetPowerStatus(uint8 powerStatus) \r
-{\r
- if (powerStatus != USBFS_1_DEVICE_STATUS_BUS_POWERED)\r
- {\r
- USBFS_1_deviceStatus |= USBFS_1_DEVICE_STATUS_SELF_POWERED;\r
- }\r
- else\r
- {\r
- USBFS_1_deviceStatus &= ((uint8)(~USBFS_1_DEVICE_STATUS_SELF_POWERED));\r
- }\r
-}\r
-\r
-\r
-#if (USBFS_1_MON_VBUS == 1u)\r
-\r
- /*******************************************************************************\r
- * Function Name: USBFS_1_VBusPresent\r
- ********************************************************************************\r
- *\r
- * Summary:\r
- * Determines VBUS presence for Self Powered Devices.\r
- *\r
- * Parameters:\r
- * None.\r
- *\r
- * Return:\r
- * 1 if VBUS is present, otherwise 0.\r
- *\r
- *******************************************************************************/\r
- uint8 USBFS_1_VBusPresent(void) \r
- {\r
- return((0u != (CY_GET_REG8(USBFS_1_VBUS_PS_PTR) & USBFS_1_VBUS_MASK)) ? 1u : 0u);\r
- }\r
-\r
-#endif /* USBFS_1_MON_VBUS */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_1_RWUEnabled\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Returns TRUE if Remote Wake Up is enabled, otherwise FALSE\r
-*\r
-* Parameters:\r
-* None.\r
-*\r
-* Return:\r
-* TRUE - Remote Wake Up Enabled\r
-* FALSE - Remote Wake Up Disabled\r
-*\r
-* Global variables:\r
-* USBFS_1_deviceStatus - checked to determine remote status\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_1_RWUEnabled(void) \r
-{\r
- uint8 result = USBFS_1_FALSE;\r
- if((USBFS_1_deviceStatus & USBFS_1_DEVICE_STATUS_REMOTE_WAKEUP) != 0u)\r
- {\r
- result = USBFS_1_TRUE;\r
- }\r
-\r
- return(result);\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r
+++ /dev/null
-/*******************************************************************************\r
-* File Name: USBFS_1.h\r
-* Version 2.60\r
-*\r
-* Description:\r
-* Header File for the USFS component. Contains prototypes and constant values.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_USBFS_USBFS_1_H)\r
-#define CY_USBFS_USBFS_1_H\r
-\r
-#include "cytypes.h"\r
-#include "cydevice_trm.h"\r
-#include "cyfitter.h"\r
-#include "CyLib.h"\r
-\r
-\r
-/***************************************\r
-* Conditional Compilation Parameters\r
-***************************************/\r
-\r
-/* Check to see if required defines such as CY_PSOC5LP are available */\r
-/* They are defined starting with cy_boot v3.0 */\r
-#if !defined (CY_PSOC5LP)\r
- #error Component USBFS_v2_60 requires cy_boot v3.0 or later\r
-#endif /* (CY_PSOC5LP) */\r
-\r
-\r
-/***************************************\r
-* Memory Type Definitions\r
-***************************************/\r
-\r
-/* Renamed Type Definitions for backward compatibility.\r
-* Should not be used in new designs.\r
-*/\r
-#define USBFS_1_CODE CYCODE\r
-#define USBFS_1_FAR CYFAR\r
-#if defined(__C51__) || defined(__CX51__)\r
- #define USBFS_1_DATA data\r
- #define USBFS_1_XDATA xdata\r
-#else\r
- #define USBFS_1_DATA\r
- #define USBFS_1_XDATA\r
-#endif /* End __C51__ */\r
-#define USBFS_1_NULL NULL\r
-\r
-\r
-/***************************************\r
-* Enumerated Types and Parameters\r
-***************************************/\r
-\r
-#define USBFS_1__EP_MANUAL 0\r
-#define USBFS_1__EP_DMAMANUAL 1\r
-#define USBFS_1__EP_DMAAUTO 2\r
-\r
-#define USBFS_1__MA_STATIC 0\r
-#define USBFS_1__MA_DYNAMIC 1\r
-\r
-\r
-\r
-/***************************************\r
-* Initial Parameter Constants\r
-***************************************/\r
-\r
-#define USBFS_1_NUM_DEVICES (1u)\r
-#define USBFS_1_MAX_REPORTID_NUMBER (0u)\r
-\r
-#define USBFS_1_MON_VBUS (0u)\r
-#define USBFS_1_EXTERN_VBUS (0u)\r
-#define USBFS_1_EXTERN_VND (0u)\r
-#define USBFS_1_EXTERN_CLS (0u)\r
-#define USBFS_1_MAX_INTERFACES_NUMBER (1u)\r
-#define USBFS_1_EP0_ISR_REMOVE (0u)\r
-#define USBFS_1_EP1_ISR_REMOVE (0u)\r
-#define USBFS_1_EP2_ISR_REMOVE (1u)\r
-#define USBFS_1_EP3_ISR_REMOVE (1u)\r
-#define USBFS_1_EP4_ISR_REMOVE (1u)\r
-#define USBFS_1_EP5_ISR_REMOVE (1u)\r
-#define USBFS_1_EP6_ISR_REMOVE (1u)\r
-#define USBFS_1_EP7_ISR_REMOVE (1u)\r
-#define USBFS_1_EP8_ISR_REMOVE (1u)\r
-#define USBFS_1_EP_MM (0u)\r
-#define USBFS_1_EP_MA (0u)\r
-#define USBFS_1_DMA1_REMOVE (1u)\r
-#define USBFS_1_DMA2_REMOVE (1u)\r
-#define USBFS_1_DMA3_REMOVE (1u)\r
-#define USBFS_1_DMA4_REMOVE (1u)\r
-#define USBFS_1_DMA5_REMOVE (1u)\r
-#define USBFS_1_DMA6_REMOVE (1u)\r
-#define USBFS_1_DMA7_REMOVE (1u)\r
-#define USBFS_1_DMA8_REMOVE (1u)\r
-#define USBFS_1_SOF_ISR_REMOVE (0u)\r
-#define USBFS_1_ARB_ISR_REMOVE (0u)\r
-#define USBFS_1_DP_ISR_REMOVE (0u)\r
-#define USBFS_1_ENABLE_CDC_CLASS_API (1u)\r
-#define USBFS_1_ENABLE_MIDI_API (1u)\r
-#define USBFS_1_MIDI_EXT_MODE (0u)\r
-\r
-\r
-/***************************************\r
-* Data Struct Definition\r
-***************************************/\r
-\r
-typedef struct\r
-{\r
- uint8 attrib;\r
- uint8 apiEpState;\r
- uint8 hwEpState;\r
- uint8 epToggle;\r
- uint8 addr;\r
- uint8 epMode;\r
- uint16 buffOffset;\r
- uint16 bufferSize;\r
- uint8 interface;\r
-} T_USBFS_1_EP_CTL_BLOCK;\r
-\r
-typedef struct\r
-{\r
- uint8 interface;\r
- uint8 altSetting;\r
- uint8 addr;\r
- uint8 attributes;\r
- uint16 bufferSize;\r
- uint8 bMisc;\r
-} T_USBFS_1_EP_SETTINGS_BLOCK;\r
-\r
-typedef struct\r
-{\r
- uint8 status;\r
- uint16 length;\r
-} T_USBFS_1_XFER_STATUS_BLOCK;\r
-\r
-typedef struct\r
-{\r
- uint16 count;\r
- volatile uint8 *pData;\r
- T_USBFS_1_XFER_STATUS_BLOCK *pStatusBlock;\r
-} T_USBFS_1_TD;\r
-\r
-\r
-typedef struct\r
-{\r
- uint8 c;\r
- const void *p_list;\r
-} T_USBFS_1_LUT;\r
-\r
-/* Resume/Suspend API Support */\r
-typedef struct\r
-{\r
- uint8 enableState;\r
- uint8 mode;\r
-} USBFS_1_BACKUP_STRUCT;\r
-\r
-\r
-/* Renamed structure fields for backward compatibility.\r
-* Should not be used in new designs.\r
-*/\r
-#define wBuffOffset buffOffset\r
-#define wBufferSize bufferSize\r
-#define bStatus status\r
-#define wLength length\r
-#define wCount count\r
-\r
-/* Renamed global variable for backward compatibility.\r
-* Should not be used in new designs.\r
-*/\r
-#define CurrentTD USBFS_1_currentTD\r
-\r
-\r
-/***************************************\r
-* Function Prototypes\r
-***************************************/\r
-\r
-void USBFS_1_Start(uint8 device, uint8 mode) ;\r
-void USBFS_1_Init(void) ;\r
-void USBFS_1_InitComponent(uint8 device, uint8 mode) ;\r
-void USBFS_1_Stop(void) ;\r
-uint8 USBFS_1_CheckActivity(void) ;\r
-uint8 USBFS_1_GetConfiguration(void) ;\r
-uint8 USBFS_1_IsConfigurationChanged(void) ;\r
-uint8 USBFS_1_GetInterfaceSetting(uint8 interfaceNumber)\r
- ;\r
-uint8 USBFS_1_GetEPState(uint8 epNumber) ;\r
-uint16 USBFS_1_GetEPCount(uint8 epNumber) ;\r
-void USBFS_1_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)\r
- ;\r
-uint16 USBFS_1_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length)\r
- ;\r
-void USBFS_1_EnableOutEP(uint8 epNumber) ;\r
-void USBFS_1_DisableOutEP(uint8 epNumber) ;\r
-void USBFS_1_Force(uint8 bState) ;\r
-uint8 USBFS_1_GetEPAckState(uint8 epNumber) ;\r
-void USBFS_1_SetPowerStatus(uint8 powerStatus) ;\r
-uint8 USBFS_1_RWUEnabled(void) ;\r
-void USBFS_1_TerminateEP(uint8 ep) ;\r
-\r
-void USBFS_1_Suspend(void) ;\r
-void USBFS_1_Resume(void) ;\r
-\r
-#if defined(USBFS_1_ENABLE_FWSN_STRING)\r
- void USBFS_1_SerialNumString(uint8 snString[]) ;\r
-#endif /* USBFS_1_ENABLE_FWSN_STRING */\r
-#if (USBFS_1_MON_VBUS == 1u)\r
- uint8 USBFS_1_VBusPresent(void) ;\r
-#endif /* End USBFS_1_MON_VBUS */\r
-\r
-#if defined(CYDEV_BOOTLOADER_IO_COMP) && ((CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS_1) || \\r
- (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_Custom_Interface))\r
-\r
- void USBFS_1_CyBtldrCommStart(void) ;\r
- void USBFS_1_CyBtldrCommStop(void) ;\r
- void USBFS_1_CyBtldrCommReset(void) ;\r
- cystatus USBFS_1_CyBtldrCommWrite(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL\r
- ;\r
- cystatus USBFS_1_CyBtldrCommRead( uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL\r
- ;\r
-\r
- #define USBFS_1_BTLDR_SIZEOF_WRITE_BUFFER (64u) /* EP 1 OUT */\r
- #define USBFS_1_BTLDR_SIZEOF_READ_BUFFER (64u) /* EP 2 IN */\r
- #define USBFS_1_BTLDR_MAX_PACKET_SIZE USBFS_1_BTLDR_SIZEOF_WRITE_BUFFER\r
-\r
- /* These defines active if used USBFS interface as an\r
- * IO Component for bootloading. When Custom_Interface selected\r
- * in Bootloder configuration as the IO Component, user must\r
- * provide these functions\r
- */\r
- #if (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS_1)\r
- #define CyBtldrCommStart USBFS_1_CyBtldrCommStart\r
- #define CyBtldrCommStop USBFS_1_CyBtldrCommStop\r
- #define CyBtldrCommReset USBFS_1_CyBtldrCommReset\r
- #define CyBtldrCommWrite USBFS_1_CyBtldrCommWrite\r
- #define CyBtldrCommRead USBFS_1_CyBtldrCommRead\r
- #endif /*End CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS_1 */\r
-\r
-#endif /* End CYDEV_BOOTLOADER_IO_COMP */\r
-\r
-#if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL)\r
- void USBFS_1_InitEP_DMA(uint8 epNumber, const uint8 *pData)\r
- ;\r
- void USBFS_1_Stop_DMA(uint8 epNumber) ;\r
-#endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL) */\r
-\r
-#if defined(USBFS_1_ENABLE_MIDI_STREAMING) && (USBFS_1_ENABLE_MIDI_API != 0u)\r
- void USBFS_1_MIDI_EP_Init(void) ;\r
-\r
- #if (USBFS_1_MIDI_IN_BUFF_SIZE > 0)\r
- void USBFS_1_MIDI_IN_Service(void) ;\r
- uint8 USBFS_1_PutUsbMidiIn(uint8 ic, const uint8 midiMsg[], uint8 cable)\r
- ;\r
- #endif /* USBFS_1_MIDI_IN_BUFF_SIZE > 0 */\r
-\r
- #if (USBFS_1_MIDI_OUT_BUFF_SIZE > 0)\r
- void USBFS_1_MIDI_OUT_EP_Service(void) ;\r
- #endif /* USBFS_1_MIDI_OUT_BUFF_SIZE > 0 */\r
-\r
-#endif /* End USBFS_1_ENABLE_MIDI_API != 0u */\r
-\r
-/* Renamed Functions for backward compatibility.\r
-* Should not be used in new designs.\r
-*/\r
-\r
-#define USBFS_1_bCheckActivity USBFS_1_CheckActivity\r
-#define USBFS_1_bGetConfiguration USBFS_1_GetConfiguration\r
-#define USBFS_1_bGetInterfaceSetting USBFS_1_GetInterfaceSetting\r
-#define USBFS_1_bGetEPState USBFS_1_GetEPState\r
-#define USBFS_1_wGetEPCount USBFS_1_GetEPCount\r
-#define USBFS_1_bGetEPAckState USBFS_1_GetEPAckState\r
-#define USBFS_1_bRWUEnabled USBFS_1_RWUEnabled\r
-#define USBFS_1_bVBusPresent USBFS_1_VBusPresent\r
-\r
-#define USBFS_1_bConfiguration USBFS_1_configuration\r
-#define USBFS_1_bInterfaceSetting USBFS_1_interfaceSetting\r
-#define USBFS_1_bDeviceAddress USBFS_1_deviceAddress\r
-#define USBFS_1_bDeviceStatus USBFS_1_deviceStatus\r
-#define USBFS_1_bDevice USBFS_1_device\r
-#define USBFS_1_bTransferState USBFS_1_transferState\r
-#define USBFS_1_bLastPacketSize USBFS_1_lastPacketSize\r
-\r
-#define USBFS_1_LoadEP USBFS_1_LoadInEP\r
-#define USBFS_1_LoadInISOCEP USBFS_1_LoadInEP\r
-#define USBFS_1_EnableOutISOCEP USBFS_1_EnableOutEP\r
-\r
-#define USBFS_1_SetVector CyIntSetVector\r
-#define USBFS_1_SetPriority CyIntSetPriority\r
-#define USBFS_1_EnableInt CyIntEnable\r
-\r
-\r
-/***************************************\r
-* API Constants\r
-***************************************/\r
-\r
-#define USBFS_1_EP0 (0u)\r
-#define USBFS_1_EP1 (1u)\r
-#define USBFS_1_EP2 (2u)\r
-#define USBFS_1_EP3 (3u)\r
-#define USBFS_1_EP4 (4u)\r
-#define USBFS_1_EP5 (5u)\r
-#define USBFS_1_EP6 (6u)\r
-#define USBFS_1_EP7 (7u)\r
-#define USBFS_1_EP8 (8u)\r
-#define USBFS_1_MAX_EP (9u)\r
-\r
-#define USBFS_1_TRUE (1u)\r
-#define USBFS_1_FALSE (0u)\r
-\r
-#define USBFS_1_NO_EVENT_ALLOWED (2u)\r
-#define USBFS_1_EVENT_PENDING (1u)\r
-#define USBFS_1_NO_EVENT_PENDING (0u)\r
-\r
-#define USBFS_1_IN_BUFFER_FULL USBFS_1_NO_EVENT_PENDING\r
-#define USBFS_1_IN_BUFFER_EMPTY USBFS_1_EVENT_PENDING\r
-#define USBFS_1_OUT_BUFFER_FULL USBFS_1_EVENT_PENDING\r
-#define USBFS_1_OUT_BUFFER_EMPTY USBFS_1_NO_EVENT_PENDING\r
-\r
-#define USBFS_1_FORCE_J (0xA0u)\r
-#define USBFS_1_FORCE_K (0x80u)\r
-#define USBFS_1_FORCE_SE0 (0xC0u)\r
-#define USBFS_1_FORCE_NONE (0x00u)\r
-\r
-#define USBFS_1_IDLE_TIMER_RUNNING (0x02u)\r
-#define USBFS_1_IDLE_TIMER_EXPIRED (0x01u)\r
-#define USBFS_1_IDLE_TIMER_INDEFINITE (0x00u)\r
-\r
-#define USBFS_1_DEVICE_STATUS_BUS_POWERED (0x00u)\r
-#define USBFS_1_DEVICE_STATUS_SELF_POWERED (0x01u)\r
-\r
-#define USBFS_1_3V_OPERATION (0x00u)\r
-#define USBFS_1_5V_OPERATION (0x01u)\r
-#define USBFS_1_DWR_VDDD_OPERATION (0x02u)\r
-\r
-#define USBFS_1_MODE_DISABLE (0x00u)\r
-#define USBFS_1_MODE_NAK_IN_OUT (0x01u)\r
-#define USBFS_1_MODE_STATUS_OUT_ONLY (0x02u)\r
-#define USBFS_1_MODE_STALL_IN_OUT (0x03u)\r
-#define USBFS_1_MODE_RESERVED_0100 (0x04u)\r
-#define USBFS_1_MODE_ISO_OUT (0x05u)\r
-#define USBFS_1_MODE_STATUS_IN_ONLY (0x06u)\r
-#define USBFS_1_MODE_ISO_IN (0x07u)\r
-#define USBFS_1_MODE_NAK_OUT (0x08u)\r
-#define USBFS_1_MODE_ACK_OUT (0x09u)\r
-#define USBFS_1_MODE_RESERVED_1010 (0x0Au)\r
-#define USBFS_1_MODE_ACK_OUT_STATUS_IN (0x0Bu)\r
-#define USBFS_1_MODE_NAK_IN (0x0Cu)\r
-#define USBFS_1_MODE_ACK_IN (0x0Du)\r
-#define USBFS_1_MODE_RESERVED_1110 (0x0Eu)\r
-#define USBFS_1_MODE_ACK_IN_STATUS_OUT (0x0Fu)\r
-#define USBFS_1_MODE_MASK (0x0Fu)\r
-#define USBFS_1_MODE_STALL_DATA_EP (0x80u)\r
-\r
-#define USBFS_1_MODE_ACKD (0x10u)\r
-#define USBFS_1_MODE_OUT_RCVD (0x20u)\r
-#define USBFS_1_MODE_IN_RCVD (0x40u)\r
-#define USBFS_1_MODE_SETUP_RCVD (0x80u)\r
-\r
-#define USBFS_1_RQST_TYPE_MASK (0x60u)\r
-#define USBFS_1_RQST_TYPE_STD (0x00u)\r
-#define USBFS_1_RQST_TYPE_CLS (0x20u)\r
-#define USBFS_1_RQST_TYPE_VND (0x40u)\r
-#define USBFS_1_RQST_DIR_MASK (0x80u)\r
-#define USBFS_1_RQST_DIR_D2H (0x80u)\r
-#define USBFS_1_RQST_DIR_H2D (0x00u)\r
-#define USBFS_1_RQST_RCPT_MASK (0x03u)\r
-#define USBFS_1_RQST_RCPT_DEV (0x00u)\r
-#define USBFS_1_RQST_RCPT_IFC (0x01u)\r
-#define USBFS_1_RQST_RCPT_EP (0x02u)\r
-#define USBFS_1_RQST_RCPT_OTHER (0x03u)\r
-\r
-/* USB Class Codes */\r
-#define USBFS_1_CLASS_DEVICE (0x00u) /* Use class code info from Interface Descriptors */\r
-#define USBFS_1_CLASS_AUDIO (0x01u) /* Audio device */\r
-#define USBFS_1_CLASS_CDC (0x02u) /* Communication device class */\r
-#define USBFS_1_CLASS_HID (0x03u) /* Human Interface Device */\r
-#define USBFS_1_CLASS_PDC (0x05u) /* Physical device class */\r
-#define USBFS_1_CLASS_IMAGE (0x06u) /* Still Imaging device */\r
-#define USBFS_1_CLASS_PRINTER (0x07u) /* Printer device */\r
-#define USBFS_1_CLASS_MSD (0x08u) /* Mass Storage device */\r
-#define USBFS_1_CLASS_HUB (0x09u) /* Full/Hi speed Hub */\r
-#define USBFS_1_CLASS_CDC_DATA (0x0Au) /* CDC data device */\r
-#define USBFS_1_CLASS_SMART_CARD (0x0Bu) /* Smart Card device */\r
-#define USBFS_1_CLASS_CSD (0x0Du) /* Content Security device */\r
-#define USBFS_1_CLASS_VIDEO (0x0Eu) /* Video device */\r
-#define USBFS_1_CLASS_PHD (0x0Fu) /* Personal Healthcare device */\r
-#define USBFS_1_CLASS_WIRELESSD (0xDCu) /* Wireless Controller */\r
-#define USBFS_1_CLASS_MIS (0xE0u) /* Miscellaneous */\r
-#define USBFS_1_CLASS_APP (0xEFu) /* Application Specific */\r
-#define USBFS_1_CLASS_VENDOR (0xFFu) /* Vendor specific */\r
-\r
-\r
-/* Standard Request Types (Table 9-4) */\r
-#define USBFS_1_GET_STATUS (0x00u)\r
-#define USBFS_1_CLEAR_FEATURE (0x01u)\r
-#define USBFS_1_SET_FEATURE (0x03u)\r
-#define USBFS_1_SET_ADDRESS (0x05u)\r
-#define USBFS_1_GET_DESCRIPTOR (0x06u)\r
-#define USBFS_1_SET_DESCRIPTOR (0x07u)\r
-#define USBFS_1_GET_CONFIGURATION (0x08u)\r
-#define USBFS_1_SET_CONFIGURATION (0x09u)\r
-#define USBFS_1_GET_INTERFACE (0x0Au)\r
-#define USBFS_1_SET_INTERFACE (0x0Bu)\r
-#define USBFS_1_SYNCH_FRAME (0x0Cu)\r
-\r
-/* Vendor Specific Request Types */\r
-/* Request for Microsoft OS String Descriptor */\r
-#define USBFS_1_GET_EXTENDED_CONFIG_DESCRIPTOR (0x01u)\r
-\r
-/* Descriptor Types (Table 9-5) */\r
-#define USBFS_1_DESCR_DEVICE (1u)\r
-#define USBFS_1_DESCR_CONFIG (2u)\r
-#define USBFS_1_DESCR_STRING (3u)\r
-#define USBFS_1_DESCR_INTERFACE (4u)\r
-#define USBFS_1_DESCR_ENDPOINT (5u)\r
-#define USBFS_1_DESCR_DEVICE_QUALIFIER (6u)\r
-#define USBFS_1_DESCR_OTHER_SPEED (7u)\r
-#define USBFS_1_DESCR_INTERFACE_POWER (8u)\r
-\r
-/* Device Descriptor Defines */\r
-#define USBFS_1_DEVICE_DESCR_LENGTH (18u)\r
-#define USBFS_1_DEVICE_DESCR_SN_SHIFT (16u)\r
-\r
-/* Config Descriptor Shifts and Masks */\r
-#define USBFS_1_CONFIG_DESCR_LENGTH (0u)\r
-#define USBFS_1_CONFIG_DESCR_TYPE (1u)\r
-#define USBFS_1_CONFIG_DESCR_TOTAL_LENGTH_LOW (2u)\r
-#define USBFS_1_CONFIG_DESCR_TOTAL_LENGTH_HI (3u)\r
-#define USBFS_1_CONFIG_DESCR_NUM_INTERFACES (4u)\r
-#define USBFS_1_CONFIG_DESCR_CONFIG_VALUE (5u)\r
-#define USBFS_1_CONFIG_DESCR_CONFIGURATION (6u)\r
-#define USBFS_1_CONFIG_DESCR_ATTRIB (7u)\r
-#define USBFS_1_CONFIG_DESCR_ATTRIB_SELF_POWERED (0x40u)\r
-#define USBFS_1_CONFIG_DESCR_ATTRIB_RWU_EN (0x20u)\r
-\r
-/* Feature Selectors (Table 9-6) */\r
-#define USBFS_1_DEVICE_REMOTE_WAKEUP (0x01u)\r
-#define USBFS_1_ENDPOINT_HALT (0x00u)\r
-#define USBFS_1_TEST_MODE (0x02u)\r
-\r
-/* USB Device Status (Figure 9-4) */\r
-#define USBFS_1_DEVICE_STATUS_BUS_POWERED (0x00u)\r
-#define USBFS_1_DEVICE_STATUS_SELF_POWERED (0x01u)\r
-#define USBFS_1_DEVICE_STATUS_REMOTE_WAKEUP (0x02u)\r
-\r
-/* USB Endpoint Status (Figure 9-4) */\r
-#define USBFS_1_ENDPOINT_STATUS_HALT (0x01u)\r
-\r
-/* USB Endpoint Directions */\r
-#define USBFS_1_DIR_IN (0x80u)\r
-#define USBFS_1_DIR_OUT (0x00u)\r
-#define USBFS_1_DIR_UNUSED (0x7Fu)\r
-\r
-/* USB Endpoint Attributes */\r
-#define USBFS_1_EP_TYPE_CTRL (0x00u)\r
-#define USBFS_1_EP_TYPE_ISOC (0x01u)\r
-#define USBFS_1_EP_TYPE_BULK (0x02u)\r
-#define USBFS_1_EP_TYPE_INT (0x03u)\r
-#define USBFS_1_EP_TYPE_MASK (0x03u)\r
-\r
-#define USBFS_1_EP_SYNC_TYPE_NO_SYNC (0x00u)\r
-#define USBFS_1_EP_SYNC_TYPE_ASYNC (0x04u)\r
-#define USBFS_1_EP_SYNC_TYPE_ADAPTIVE (0x08u)\r
-#define USBFS_1_EP_SYNC_TYPE_SYNCHRONOUS (0x0Cu)\r
-#define USBFS_1_EP_SYNC_TYPE_MASK (0x0Cu)\r
-\r
-#define USBFS_1_EP_USAGE_TYPE_DATA (0x00u)\r
-#define USBFS_1_EP_USAGE_TYPE_FEEDBACK (0x10u)\r
-#define USBFS_1_EP_USAGE_TYPE_IMPLICIT (0x20u)\r
-#define USBFS_1_EP_USAGE_TYPE_RESERVED (0x30u)\r
-#define USBFS_1_EP_USAGE_TYPE_MASK (0x30u)\r
-\r
-/* Endpoint Status defines */\r
-#define USBFS_1_EP_STATUS_LENGTH (0x02u)\r
-\r
-/* Endpoint Device defines */\r
-#define USBFS_1_DEVICE_STATUS_LENGTH (0x02u)\r
-\r
-#define USBFS_1_STATUS_LENGTH_MAX \\r
- ( (USBFS_1_EP_STATUS_LENGTH > USBFS_1_DEVICE_STATUS_LENGTH) ? \\r
- USBFS_1_EP_STATUS_LENGTH : USBFS_1_DEVICE_STATUS_LENGTH )\r
-/* Transfer Completion Notification */\r
-#define USBFS_1_XFER_IDLE (0x00u)\r
-#define USBFS_1_XFER_STATUS_ACK (0x01u)\r
-#define USBFS_1_XFER_PREMATURE (0x02u)\r
-#define USBFS_1_XFER_ERROR (0x03u)\r
-\r
-/* Driver State defines */\r
-#define USBFS_1_TRANS_STATE_IDLE (0x00u)\r
-#define USBFS_1_TRANS_STATE_CONTROL_READ (0x02u)\r
-#define USBFS_1_TRANS_STATE_CONTROL_WRITE (0x04u)\r
-#define USBFS_1_TRANS_STATE_NO_DATA_CONTROL (0x06u)\r
-\r
-/* String Descriptor defines */\r
-#define USBFS_1_STRING_MSOS (0xEEu)\r
-#define USBFS_1_MSOS_DESCRIPTOR_LENGTH (18u)\r
-#define USBFS_1_MSOS_CONF_DESCR_LENGTH (40u)\r
-\r
-#if(USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL)\r
- /* DMA manual mode defines */\r
- #define USBFS_1_DMA_BYTES_PER_BURST (0u)\r
- #define USBFS_1_DMA_REQUEST_PER_BURST (0u)\r
-#endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL */\r
-#if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO)\r
- /* DMA automatic mode defines */\r
- #define USBFS_1_DMA_BYTES_PER_BURST (32u)\r
- /* BUF_SIZE-BYTES_PER_BURST examples: 55-32 bytes 44-16 bytes 33-8 bytes 22-4 bytes 11-2 bytes */\r
- #define USBFS_1_DMA_BUF_SIZE (0x55u)\r
- #define USBFS_1_DMA_REQUEST_PER_BURST (1u)\r
-#endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */\r
-\r
-/* DIE ID string descriptor defines */\r
-#if defined(USBFS_1_ENABLE_IDSN_STRING)\r
- #define USBFS_1_IDSN_DESCR_LENGTH (0x22u)\r
-#endif /* USBFS_1_ENABLE_IDSN_STRING */\r
-\r
-\r
-/***************************************\r
-* External data references\r
-***************************************/\r
-\r
-extern uint8 USBFS_1_initVar;\r
-extern volatile uint8 USBFS_1_device;\r
-extern volatile uint8 USBFS_1_transferState;\r
-extern volatile uint8 USBFS_1_configuration;\r
-extern volatile uint8 USBFS_1_configurationChanged;\r
-extern volatile uint8 USBFS_1_deviceStatus;\r
-\r
-/* HID Variables */\r
-#if defined(USBFS_1_ENABLE_HID_CLASS)\r
- extern volatile uint8 USBFS_1_hidProtocol[USBFS_1_MAX_INTERFACES_NUMBER];\r
- extern volatile uint8 USBFS_1_hidIdleRate[USBFS_1_MAX_INTERFACES_NUMBER];\r
- extern volatile uint8 USBFS_1_hidIdleTimer[USBFS_1_MAX_INTERFACES_NUMBER];\r
-#endif /* USBFS_1_ENABLE_HID_CLASS */\r
-\r
-\r
-/***************************************\r
-* Registers\r
-***************************************/\r
-\r
-#define USBFS_1_ARB_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_CFG)\r
-#define USBFS_1_ARB_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_CFG)\r
-\r
-#define USBFS_1_ARB_EP1_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP1_CFG)\r
-#define USBFS_1_ARB_EP1_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP1_CFG)\r
-#define USBFS_1_ARB_EP1_CFG_IND USBFS_1_USB__ARB_EP1_CFG\r
-#define USBFS_1_ARB_EP1_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP1_INT_EN)\r
-#define USBFS_1_ARB_EP1_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP1_INT_EN)\r
-#define USBFS_1_ARB_EP1_INT_EN_IND USBFS_1_USB__ARB_EP1_INT_EN\r
-#define USBFS_1_ARB_EP1_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP1_SR)\r
-#define USBFS_1_ARB_EP1_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP1_SR)\r
-#define USBFS_1_ARB_EP1_SR_IND USBFS_1_USB__ARB_EP1_SR\r
-\r
-#define USBFS_1_ARB_EP2_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP2_CFG)\r
-#define USBFS_1_ARB_EP2_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP2_CFG)\r
-#define USBFS_1_ARB_EP2_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP2_INT_EN)\r
-#define USBFS_1_ARB_EP2_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP2_INT_EN)\r
-#define USBFS_1_ARB_EP2_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP2_SR)\r
-#define USBFS_1_ARB_EP2_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP2_SR)\r
-\r
-#define USBFS_1_ARB_EP3_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP3_CFG)\r
-#define USBFS_1_ARB_EP3_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP3_CFG)\r
-#define USBFS_1_ARB_EP3_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP3_INT_EN)\r
-#define USBFS_1_ARB_EP3_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP3_INT_EN)\r
-#define USBFS_1_ARB_EP3_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP3_SR)\r
-#define USBFS_1_ARB_EP3_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP3_SR)\r
-\r
-#define USBFS_1_ARB_EP4_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP4_CFG)\r
-#define USBFS_1_ARB_EP4_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP4_CFG)\r
-#define USBFS_1_ARB_EP4_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP4_INT_EN)\r
-#define USBFS_1_ARB_EP4_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP4_INT_EN)\r
-#define USBFS_1_ARB_EP4_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP4_SR)\r
-#define USBFS_1_ARB_EP4_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP4_SR)\r
-\r
-#define USBFS_1_ARB_EP5_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP5_CFG)\r
-#define USBFS_1_ARB_EP5_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP5_CFG)\r
-#define USBFS_1_ARB_EP5_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP5_INT_EN)\r
-#define USBFS_1_ARB_EP5_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP5_INT_EN)\r
-#define USBFS_1_ARB_EP5_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP5_SR)\r
-#define USBFS_1_ARB_EP5_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP5_SR)\r
-\r
-#define USBFS_1_ARB_EP6_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP6_CFG)\r
-#define USBFS_1_ARB_EP6_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP6_CFG)\r
-#define USBFS_1_ARB_EP6_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP6_INT_EN)\r
-#define USBFS_1_ARB_EP6_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP6_INT_EN)\r
-#define USBFS_1_ARB_EP6_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP6_SR)\r
-#define USBFS_1_ARB_EP6_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP6_SR)\r
-\r
-#define USBFS_1_ARB_EP7_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP7_CFG)\r
-#define USBFS_1_ARB_EP7_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP7_CFG)\r
-#define USBFS_1_ARB_EP7_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP7_INT_EN)\r
-#define USBFS_1_ARB_EP7_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP7_INT_EN)\r
-#define USBFS_1_ARB_EP7_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP7_SR)\r
-#define USBFS_1_ARB_EP7_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP7_SR)\r
-\r
-#define USBFS_1_ARB_EP8_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP8_CFG)\r
-#define USBFS_1_ARB_EP8_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP8_CFG)\r
-#define USBFS_1_ARB_EP8_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP8_INT_EN)\r
-#define USBFS_1_ARB_EP8_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP8_INT_EN)\r
-#define USBFS_1_ARB_EP8_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP8_SR)\r
-#define USBFS_1_ARB_EP8_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP8_SR)\r
-\r
-#define USBFS_1_ARB_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_INT_EN)\r
-#define USBFS_1_ARB_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_INT_EN)\r
-#define USBFS_1_ARB_INT_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_INT_SR)\r
-#define USBFS_1_ARB_INT_SR_REG (* (reg8 *) USBFS_1_USB__ARB_INT_SR)\r
-\r
-#define USBFS_1_ARB_RW1_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW1_DR)\r
-#define USBFS_1_ARB_RW1_DR_IND USBFS_1_USB__ARB_RW1_DR\r
-#define USBFS_1_ARB_RW1_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW1_RA)\r
-#define USBFS_1_ARB_RW1_RA_IND USBFS_1_USB__ARB_RW1_RA\r
-#define USBFS_1_ARB_RW1_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW1_RA_MSB)\r
-#define USBFS_1_ARB_RW1_RA_MSB_IND USBFS_1_USB__ARB_RW1_RA_MSB\r
-#define USBFS_1_ARB_RW1_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW1_WA)\r
-#define USBFS_1_ARB_RW1_WA_IND USBFS_1_USB__ARB_RW1_WA\r
-#define USBFS_1_ARB_RW1_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW1_WA_MSB)\r
-#define USBFS_1_ARB_RW1_WA_MSB_IND USBFS_1_USB__ARB_RW1_WA_MSB\r
-\r
-#define USBFS_1_ARB_RW2_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW2_DR)\r
-#define USBFS_1_ARB_RW2_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW2_RA)\r
-#define USBFS_1_ARB_RW2_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW2_RA_MSB)\r
-#define USBFS_1_ARB_RW2_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW2_WA)\r
-#define USBFS_1_ARB_RW2_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW2_WA_MSB)\r
-\r
-#define USBFS_1_ARB_RW3_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW3_DR)\r
-#define USBFS_1_ARB_RW3_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW3_RA)\r
-#define USBFS_1_ARB_RW3_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW3_RA_MSB)\r
-#define USBFS_1_ARB_RW3_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW3_WA)\r
-#define USBFS_1_ARB_RW3_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW3_WA_MSB)\r
-\r
-#define USBFS_1_ARB_RW4_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW4_DR)\r
-#define USBFS_1_ARB_RW4_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW4_RA)\r
-#define USBFS_1_ARB_RW4_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW4_RA_MSB)\r
-#define USBFS_1_ARB_RW4_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW4_WA)\r
-#define USBFS_1_ARB_RW4_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW4_WA_MSB)\r
-\r
-#define USBFS_1_ARB_RW5_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW5_DR)\r
-#define USBFS_1_ARB_RW5_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW5_RA)\r
-#define USBFS_1_ARB_RW5_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW5_RA_MSB)\r
-#define USBFS_1_ARB_RW5_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW5_WA)\r
-#define USBFS_1_ARB_RW5_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW5_WA_MSB)\r
-\r
-#define USBFS_1_ARB_RW6_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW6_DR)\r
-#define USBFS_1_ARB_RW6_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW6_RA)\r
-#define USBFS_1_ARB_RW6_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW6_RA_MSB)\r
-#define USBFS_1_ARB_RW6_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW6_WA)\r
-#define USBFS_1_ARB_RW6_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW6_WA_MSB)\r
-\r
-#define USBFS_1_ARB_RW7_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW7_DR)\r
-#define USBFS_1_ARB_RW7_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW7_RA)\r
-#define USBFS_1_ARB_RW7_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW7_RA_MSB)\r
-#define USBFS_1_ARB_RW7_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW7_WA)\r
-#define USBFS_1_ARB_RW7_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW7_WA_MSB)\r
-\r
-#define USBFS_1_ARB_RW8_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW8_DR)\r
-#define USBFS_1_ARB_RW8_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW8_RA)\r
-#define USBFS_1_ARB_RW8_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW8_RA_MSB)\r
-#define USBFS_1_ARB_RW8_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW8_WA)\r
-#define USBFS_1_ARB_RW8_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW8_WA_MSB)\r
-\r
-#define USBFS_1_BUF_SIZE_PTR ( (reg8 *) USBFS_1_USB__BUF_SIZE)\r
-#define USBFS_1_BUF_SIZE_REG (* (reg8 *) USBFS_1_USB__BUF_SIZE)\r
-#define USBFS_1_BUS_RST_CNT_PTR ( (reg8 *) USBFS_1_USB__BUS_RST_CNT)\r
-#define USBFS_1_BUS_RST_CNT_REG (* (reg8 *) USBFS_1_USB__BUS_RST_CNT)\r
-#define USBFS_1_CWA_PTR ( (reg8 *) USBFS_1_USB__CWA)\r
-#define USBFS_1_CWA_REG (* (reg8 *) USBFS_1_USB__CWA)\r
-#define USBFS_1_CWA_MSB_PTR ( (reg8 *) USBFS_1_USB__CWA_MSB)\r
-#define USBFS_1_CWA_MSB_REG (* (reg8 *) USBFS_1_USB__CWA_MSB)\r
-#define USBFS_1_CR0_PTR ( (reg8 *) USBFS_1_USB__CR0)\r
-#define USBFS_1_CR0_REG (* (reg8 *) USBFS_1_USB__CR0)\r
-#define USBFS_1_CR1_PTR ( (reg8 *) USBFS_1_USB__CR1)\r
-#define USBFS_1_CR1_REG (* (reg8 *) USBFS_1_USB__CR1)\r
-\r
-#define USBFS_1_DMA_THRES_PTR ( (reg8 *) USBFS_1_USB__DMA_THRES)\r
-#define USBFS_1_DMA_THRES_REG (* (reg8 *) USBFS_1_USB__DMA_THRES)\r
-#define USBFS_1_DMA_THRES_MSB_PTR ( (reg8 *) USBFS_1_USB__DMA_THRES_MSB)\r
-#define USBFS_1_DMA_THRES_MSB_REG (* (reg8 *) USBFS_1_USB__DMA_THRES_MSB)\r
-\r
-#define USBFS_1_EP_ACTIVE_PTR ( (reg8 *) USBFS_1_USB__EP_ACTIVE)\r
-#define USBFS_1_EP_ACTIVE_REG (* (reg8 *) USBFS_1_USB__EP_ACTIVE)\r
-#define USBFS_1_EP_TYPE_PTR ( (reg8 *) USBFS_1_USB__EP_TYPE)\r
-#define USBFS_1_EP_TYPE_REG (* (reg8 *) USBFS_1_USB__EP_TYPE)\r
-\r
-#define USBFS_1_EP0_CNT_PTR ( (reg8 *) USBFS_1_USB__EP0_CNT)\r
-#define USBFS_1_EP0_CNT_REG (* (reg8 *) USBFS_1_USB__EP0_CNT)\r
-#define USBFS_1_EP0_CR_PTR ( (reg8 *) USBFS_1_USB__EP0_CR)\r
-#define USBFS_1_EP0_CR_REG (* (reg8 *) USBFS_1_USB__EP0_CR)\r
-#define USBFS_1_EP0_DR0_PTR ( (reg8 *) USBFS_1_USB__EP0_DR0)\r
-#define USBFS_1_EP0_DR0_REG (* (reg8 *) USBFS_1_USB__EP0_DR0)\r
-#define USBFS_1_EP0_DR0_IND USBFS_1_USB__EP0_DR0\r
-#define USBFS_1_EP0_DR1_PTR ( (reg8 *) USBFS_1_USB__EP0_DR1)\r
-#define USBFS_1_EP0_DR1_REG (* (reg8 *) USBFS_1_USB__EP0_DR1)\r
-#define USBFS_1_EP0_DR2_PTR ( (reg8 *) USBFS_1_USB__EP0_DR2)\r
-#define USBFS_1_EP0_DR2_REG (* (reg8 *) USBFS_1_USB__EP0_DR2)\r
-#define USBFS_1_EP0_DR3_PTR ( (reg8 *) USBFS_1_USB__EP0_DR3)\r
-#define USBFS_1_EP0_DR3_REG (* (reg8 *) USBFS_1_USB__EP0_DR3)\r
-#define USBFS_1_EP0_DR4_PTR ( (reg8 *) USBFS_1_USB__EP0_DR4)\r
-#define USBFS_1_EP0_DR4_REG (* (reg8 *) USBFS_1_USB__EP0_DR4)\r
-#define USBFS_1_EP0_DR5_PTR ( (reg8 *) USBFS_1_USB__EP0_DR5)\r
-#define USBFS_1_EP0_DR5_REG (* (reg8 *) USBFS_1_USB__EP0_DR5)\r
-#define USBFS_1_EP0_DR6_PTR ( (reg8 *) USBFS_1_USB__EP0_DR6)\r
-#define USBFS_1_EP0_DR6_REG (* (reg8 *) USBFS_1_USB__EP0_DR6)\r
-#define USBFS_1_EP0_DR7_PTR ( (reg8 *) USBFS_1_USB__EP0_DR7)\r
-#define USBFS_1_EP0_DR7_REG (* (reg8 *) USBFS_1_USB__EP0_DR7)\r
-\r
-#define USBFS_1_OSCLK_DR0_PTR ( (reg8 *) USBFS_1_USB__OSCLK_DR0)\r
-#define USBFS_1_OSCLK_DR0_REG (* (reg8 *) USBFS_1_USB__OSCLK_DR0)\r
-#define USBFS_1_OSCLK_DR1_PTR ( (reg8 *) USBFS_1_USB__OSCLK_DR1)\r
-#define USBFS_1_OSCLK_DR1_REG (* (reg8 *) USBFS_1_USB__OSCLK_DR1)\r
-\r
-#define USBFS_1_PM_ACT_CFG_PTR ( (reg8 *) USBFS_1_USB__PM_ACT_CFG)\r
-#define USBFS_1_PM_ACT_CFG_REG (* (reg8 *) USBFS_1_USB__PM_ACT_CFG)\r
-#define USBFS_1_PM_STBY_CFG_PTR ( (reg8 *) USBFS_1_USB__PM_STBY_CFG)\r
-#define USBFS_1_PM_STBY_CFG_REG (* (reg8 *) USBFS_1_USB__PM_STBY_CFG)\r
-\r
-#define USBFS_1_SIE_EP_INT_EN_PTR ( (reg8 *) USBFS_1_USB__SIE_EP_INT_EN)\r
-#define USBFS_1_SIE_EP_INT_EN_REG (* (reg8 *) USBFS_1_USB__SIE_EP_INT_EN)\r
-#define USBFS_1_SIE_EP_INT_SR_PTR ( (reg8 *) USBFS_1_USB__SIE_EP_INT_SR)\r
-#define USBFS_1_SIE_EP_INT_SR_REG (* (reg8 *) USBFS_1_USB__SIE_EP_INT_SR)\r
-\r
-#define USBFS_1_SIE_EP1_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP1_CNT0)\r
-#define USBFS_1_SIE_EP1_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP1_CNT0)\r
-#define USBFS_1_SIE_EP1_CNT0_IND USBFS_1_USB__SIE_EP1_CNT0\r
-#define USBFS_1_SIE_EP1_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP1_CNT1)\r
-#define USBFS_1_SIE_EP1_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP1_CNT1)\r
-#define USBFS_1_SIE_EP1_CNT1_IND USBFS_1_USB__SIE_EP1_CNT1\r
-#define USBFS_1_SIE_EP1_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP1_CR0)\r
-#define USBFS_1_SIE_EP1_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP1_CR0)\r
-#define USBFS_1_SIE_EP1_CR0_IND USBFS_1_USB__SIE_EP1_CR0\r
-\r
-#define USBFS_1_SIE_EP2_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP2_CNT0)\r
-#define USBFS_1_SIE_EP2_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP2_CNT0)\r
-#define USBFS_1_SIE_EP2_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP2_CNT1)\r
-#define USBFS_1_SIE_EP2_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP2_CNT1)\r
-#define USBFS_1_SIE_EP2_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP2_CR0)\r
-#define USBFS_1_SIE_EP2_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP2_CR0)\r
-\r
-#define USBFS_1_SIE_EP3_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP3_CNT0)\r
-#define USBFS_1_SIE_EP3_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP3_CNT0)\r
-#define USBFS_1_SIE_EP3_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP3_CNT1)\r
-#define USBFS_1_SIE_EP3_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP3_CNT1)\r
-#define USBFS_1_SIE_EP3_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP3_CR0)\r
-#define USBFS_1_SIE_EP3_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP3_CR0)\r
-\r
-#define USBFS_1_SIE_EP4_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP4_CNT0)\r
-#define USBFS_1_SIE_EP4_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP4_CNT0)\r
-#define USBFS_1_SIE_EP4_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP4_CNT1)\r
-#define USBFS_1_SIE_EP4_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP4_CNT1)\r
-#define USBFS_1_SIE_EP4_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP4_CR0)\r
-#define USBFS_1_SIE_EP4_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP4_CR0)\r
-\r
-#define USBFS_1_SIE_EP5_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP5_CNT0)\r
-#define USBFS_1_SIE_EP5_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP5_CNT0)\r
-#define USBFS_1_SIE_EP5_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP5_CNT1)\r
-#define USBFS_1_SIE_EP5_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP5_CNT1)\r
-#define USBFS_1_SIE_EP5_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP5_CR0)\r
-#define USBFS_1_SIE_EP5_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP5_CR0)\r
-\r
-#define USBFS_1_SIE_EP6_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP6_CNT0)\r
-#define USBFS_1_SIE_EP6_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP6_CNT0)\r
-#define USBFS_1_SIE_EP6_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP6_CNT1)\r
-#define USBFS_1_SIE_EP6_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP6_CNT1)\r
-#define USBFS_1_SIE_EP6_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP6_CR0)\r
-#define USBFS_1_SIE_EP6_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP6_CR0)\r
-\r
-#define USBFS_1_SIE_EP7_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP7_CNT0)\r
-#define USBFS_1_SIE_EP7_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP7_CNT0)\r
-#define USBFS_1_SIE_EP7_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP7_CNT1)\r
-#define USBFS_1_SIE_EP7_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP7_CNT1)\r
-#define USBFS_1_SIE_EP7_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP7_CR0)\r
-#define USBFS_1_SIE_EP7_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP7_CR0)\r
-\r
-#define USBFS_1_SIE_EP8_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP8_CNT0)\r
-#define USBFS_1_SIE_EP8_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP8_CNT0)\r
-#define USBFS_1_SIE_EP8_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP8_CNT1)\r
-#define USBFS_1_SIE_EP8_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP8_CNT1)\r
-#define USBFS_1_SIE_EP8_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP8_CR0)\r
-#define USBFS_1_SIE_EP8_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP8_CR0)\r
-\r
-#define USBFS_1_SOF0_PTR ( (reg8 *) USBFS_1_USB__SOF0)\r
-#define USBFS_1_SOF0_REG (* (reg8 *) USBFS_1_USB__SOF0)\r
-#define USBFS_1_SOF1_PTR ( (reg8 *) USBFS_1_USB__SOF1)\r
-#define USBFS_1_SOF1_REG (* (reg8 *) USBFS_1_USB__SOF1)\r
-\r
-#define USBFS_1_USB_CLK_EN_PTR ( (reg8 *) USBFS_1_USB__USB_CLK_EN)\r
-#define USBFS_1_USB_CLK_EN_REG (* (reg8 *) USBFS_1_USB__USB_CLK_EN)\r
-\r
-#define USBFS_1_USBIO_CR0_PTR ( (reg8 *) USBFS_1_USB__USBIO_CR0)\r
-#define USBFS_1_USBIO_CR0_REG (* (reg8 *) USBFS_1_USB__USBIO_CR0)\r
-#define USBFS_1_USBIO_CR1_PTR ( (reg8 *) USBFS_1_USB__USBIO_CR1)\r
-#define USBFS_1_USBIO_CR1_REG (* (reg8 *) USBFS_1_USB__USBIO_CR1)\r
-#if(!CY_PSOC5LP)\r
- #define USBFS_1_USBIO_CR2_PTR ( (reg8 *) USBFS_1_USB__USBIO_CR2)\r
- #define USBFS_1_USBIO_CR2_REG (* (reg8 *) USBFS_1_USB__USBIO_CR2)\r
-#endif /* End CY_PSOC5LP */\r
-\r
-#define USBFS_1_DIE_ID CYDEV_FLSHID_CUST_TABLES_BASE\r
-\r
-#define USBFS_1_PM_USB_CR0_PTR ( (reg8 *) CYREG_PM_USB_CR0)\r
-#define USBFS_1_PM_USB_CR0_REG (* (reg8 *) CYREG_PM_USB_CR0)\r
-#define USBFS_1_DYN_RECONFIG_PTR ( (reg8 *) USBFS_1_USB__DYN_RECONFIG)\r
-#define USBFS_1_DYN_RECONFIG_REG (* (reg8 *) USBFS_1_USB__DYN_RECONFIG)\r
-\r
-#define USBFS_1_DM_INP_DIS_PTR ( (reg8 *) USBFS_1_Dm__INP_DIS)\r
-#define USBFS_1_DM_INP_DIS_REG (* (reg8 *) USBFS_1_Dm__INP_DIS)\r
-#define USBFS_1_DP_INP_DIS_PTR ( (reg8 *) USBFS_1_Dp__INP_DIS)\r
-#define USBFS_1_DP_INP_DIS_REG (* (reg8 *) USBFS_1_Dp__INP_DIS)\r
-#define USBFS_1_DP_INTSTAT_PTR ( (reg8 *) USBFS_1_Dp__INTSTAT)\r
-#define USBFS_1_DP_INTSTAT_REG (* (reg8 *) USBFS_1_Dp__INTSTAT)\r
-\r
-#if (USBFS_1_MON_VBUS == 1u)\r
- #if (USBFS_1_EXTERN_VBUS == 0u)\r
- #define USBFS_1_VBUS_DR_PTR ( (reg8 *) USBFS_1_VBUS__DR)\r
- #define USBFS_1_VBUS_DR_REG (* (reg8 *) USBFS_1_VBUS__DR)\r
- #define USBFS_1_VBUS_PS_PTR ( (reg8 *) USBFS_1_VBUS__PS)\r
- #define USBFS_1_VBUS_PS_REG (* (reg8 *) USBFS_1_VBUS__PS)\r
- #define USBFS_1_VBUS_MASK USBFS_1_VBUS__MASK\r
- #else\r
- #define USBFS_1_VBUS_PS_PTR ( (reg8 *) USBFS_1_Vbus_ps_sts_sts_reg__STATUS_REG )\r
- #define USBFS_1_VBUS_MASK (0x01u)\r
- #endif /* End USBFS_1_EXTERN_VBUS == 0u */\r
-#endif /* End USBFS_1_MON_VBUS */\r
-\r
-/* Renamed Registers for backward compatibility.\r
-* Should not be used in new designs.\r
-*/\r
-#define USBFS_1_ARB_CFG USBFS_1_ARB_CFG_PTR\r
-\r
-#define USBFS_1_ARB_EP1_CFG USBFS_1_ARB_EP1_CFG_PTR\r
-#define USBFS_1_ARB_EP1_INT_EN USBFS_1_ARB_EP1_INT_EN_PTR\r
-#define USBFS_1_ARB_EP1_SR USBFS_1_ARB_EP1_SR_PTR\r
-\r
-#define USBFS_1_ARB_EP2_CFG USBFS_1_ARB_EP2_CFG_PTR\r
-#define USBFS_1_ARB_EP2_INT_EN USBFS_1_ARB_EP2_INT_EN_PTR\r
-#define USBFS_1_ARB_EP2_SR USBFS_1_ARB_EP2_SR_PTR\r
-\r
-#define USBFS_1_ARB_EP3_CFG USBFS_1_ARB_EP3_CFG_PTR\r
-#define USBFS_1_ARB_EP3_INT_EN USBFS_1_ARB_EP3_INT_EN_PTR\r
-#define USBFS_1_ARB_EP3_SR USBFS_1_ARB_EP3_SR_PTR\r
-\r
-#define USBFS_1_ARB_EP4_CFG USBFS_1_ARB_EP4_CFG_PTR\r
-#define USBFS_1_ARB_EP4_INT_EN USBFS_1_ARB_EP4_INT_EN_PTR\r
-#define USBFS_1_ARB_EP4_SR USBFS_1_ARB_EP4_SR_PTR\r
-\r
-#define USBFS_1_ARB_EP5_CFG USBFS_1_ARB_EP5_CFG_PTR\r
-#define USBFS_1_ARB_EP5_INT_EN USBFS_1_ARB_EP5_INT_EN_PTR\r
-#define USBFS_1_ARB_EP5_SR USBFS_1_ARB_EP5_SR_PTR\r
-\r
-#define USBFS_1_ARB_EP6_CFG USBFS_1_ARB_EP6_CFG_PTR\r
-#define USBFS_1_ARB_EP6_INT_EN USBFS_1_ARB_EP6_INT_EN_PTR\r
-#define USBFS_1_ARB_EP6_SR USBFS_1_ARB_EP6_SR_PTR\r
-\r
-#define USBFS_1_ARB_EP7_CFG USBFS_1_ARB_EP7_CFG_PTR\r
-#define USBFS_1_ARB_EP7_INT_EN USBFS_1_ARB_EP7_INT_EN_PTR\r
-#define USBFS_1_ARB_EP7_SR USBFS_1_ARB_EP7_SR_PTR\r
-\r
-#define USBFS_1_ARB_EP8_CFG USBFS_1_ARB_EP8_CFG_PTR\r
-#define USBFS_1_ARB_EP8_INT_EN USBFS_1_ARB_EP8_INT_EN_PTR\r
-#define USBFS_1_ARB_EP8_SR USBFS_1_ARB_EP8_SR_PTR\r
-\r
-#define USBFS_1_ARB_INT_EN USBFS_1_ARB_INT_EN_PTR\r
-#define USBFS_1_ARB_INT_SR USBFS_1_ARB_INT_SR_PTR\r
-\r
-#define USBFS_1_ARB_RW1_DR USBFS_1_ARB_RW1_DR_PTR\r
-#define USBFS_1_ARB_RW1_RA USBFS_1_ARB_RW1_RA_PTR\r
-#define USBFS_1_ARB_RW1_RA_MSB USBFS_1_ARB_RW1_RA_MSB_PTR\r
-#define USBFS_1_ARB_RW1_WA USBFS_1_ARB_RW1_WA_PTR\r
-#define USBFS_1_ARB_RW1_WA_MSB USBFS_1_ARB_RW1_WA_MSB_PTR\r
-\r
-#define USBFS_1_ARB_RW2_DR USBFS_1_ARB_RW2_DR_PTR\r
-#define USBFS_1_ARB_RW2_RA USBFS_1_ARB_RW2_RA_PTR\r
-#define USBFS_1_ARB_RW2_RA_MSB USBFS_1_ARB_RW2_RA_MSB_PTR\r
-#define USBFS_1_ARB_RW2_WA USBFS_1_ARB_RW2_WA_PTR\r
-#define USBFS_1_ARB_RW2_WA_MSB USBFS_1_ARB_RW2_WA_MSB_PTR\r
-\r
-#define USBFS_1_ARB_RW3_DR USBFS_1_ARB_RW3_DR_PTR\r
-#define USBFS_1_ARB_RW3_RA USBFS_1_ARB_RW3_RA_PTR\r
-#define USBFS_1_ARB_RW3_RA_MSB USBFS_1_ARB_RW3_RA_MSB_PTR\r
-#define USBFS_1_ARB_RW3_WA USBFS_1_ARB_RW3_WA_PTR\r
-#define USBFS_1_ARB_RW3_WA_MSB USBFS_1_ARB_RW3_WA_MSB_PTR\r
-\r
-#define USBFS_1_ARB_RW4_DR USBFS_1_ARB_RW4_DR_PTR\r
-#define USBFS_1_ARB_RW4_RA USBFS_1_ARB_RW4_RA_PTR\r
-#define USBFS_1_ARB_RW4_RA_MSB USBFS_1_ARB_RW4_RA_MSB_PTR\r
-#define USBFS_1_ARB_RW4_WA USBFS_1_ARB_RW4_WA_PTR\r
-#define USBFS_1_ARB_RW4_WA_MSB USBFS_1_ARB_RW4_WA_MSB_PTR\r
-\r
-#define USBFS_1_ARB_RW5_DR USBFS_1_ARB_RW5_DR_PTR\r
-#define USBFS_1_ARB_RW5_RA USBFS_1_ARB_RW5_RA_PTR\r
-#define USBFS_1_ARB_RW5_RA_MSB USBFS_1_ARB_RW5_RA_MSB_PTR\r
-#define USBFS_1_ARB_RW5_WA USBFS_1_ARB_RW5_WA_PTR\r
-#define USBFS_1_ARB_RW5_WA_MSB USBFS_1_ARB_RW5_WA_MSB_PTR\r
-\r
-#define USBFS_1_ARB_RW6_DR USBFS_1_ARB_RW6_DR_PTR\r
-#define USBFS_1_ARB_RW6_RA USBFS_1_ARB_RW6_RA_PTR\r
-#define USBFS_1_ARB_RW6_RA_MSB USBFS_1_ARB_RW6_RA_MSB_PTR\r
-#define USBFS_1_ARB_RW6_WA USBFS_1_ARB_RW6_WA_PTR\r
-#define USBFS_1_ARB_RW6_WA_MSB USBFS_1_ARB_RW6_WA_MSB_PTR\r
-\r
-#define USBFS_1_ARB_RW7_DR USBFS_1_ARB_RW7_DR_PTR\r
-#define USBFS_1_ARB_RW7_RA USBFS_1_ARB_RW7_RA_PTR\r
-#define USBFS_1_ARB_RW7_RA_MSB USBFS_1_ARB_RW7_RA_MSB_PTR\r
-#define USBFS_1_ARB_RW7_WA USBFS_1_ARB_RW7_WA_PTR\r
-#define USBFS_1_ARB_RW7_WA_MSB USBFS_1_ARB_RW7_WA_MSB_PTR\r
-\r
-#define USBFS_1_ARB_RW8_DR USBFS_1_ARB_RW8_DR_PTR\r
-#define USBFS_1_ARB_RW8_RA USBFS_1_ARB_RW8_RA_PTR\r
-#define USBFS_1_ARB_RW8_RA_MSB USBFS_1_ARB_RW8_RA_MSB_PTR\r
-#define USBFS_1_ARB_RW8_WA USBFS_1_ARB_RW8_WA_PTR\r
-#define USBFS_1_ARB_RW8_WA_MSB USBFS_1_ARB_RW8_WA_MSB_PTR\r
-\r
-#define USBFS_1_BUF_SIZE USBFS_1_BUF_SIZE_PTR\r
-#define USBFS_1_BUS_RST_CNT USBFS_1_BUS_RST_CNT_PTR\r
-#define USBFS_1_CR0 USBFS_1_CR0_PTR\r
-#define USBFS_1_CR1 USBFS_1_CR1_PTR\r
-#define USBFS_1_CWA USBFS_1_CWA_PTR\r
-#define USBFS_1_CWA_MSB USBFS_1_CWA_MSB_PTR\r
-\r
-#define USBFS_1_DMA_THRES USBFS_1_DMA_THRES_PTR\r
-#define USBFS_1_DMA_THRES_MSB USBFS_1_DMA_THRES_MSB_PTR\r
-\r
-#define USBFS_1_EP_ACTIVE USBFS_1_EP_ACTIVE_PTR\r
-#define USBFS_1_EP_TYPE USBFS_1_EP_TYPE_PTR\r
-\r
-#define USBFS_1_EP0_CNT USBFS_1_EP0_CNT_PTR\r
-#define USBFS_1_EP0_CR USBFS_1_EP0_CR_PTR\r
-#define USBFS_1_EP0_DR0 USBFS_1_EP0_DR0_PTR\r
-#define USBFS_1_EP0_DR1 USBFS_1_EP0_DR1_PTR\r
-#define USBFS_1_EP0_DR2 USBFS_1_EP0_DR2_PTR\r
-#define USBFS_1_EP0_DR3 USBFS_1_EP0_DR3_PTR\r
-#define USBFS_1_EP0_DR4 USBFS_1_EP0_DR4_PTR\r
-#define USBFS_1_EP0_DR5 USBFS_1_EP0_DR5_PTR\r
-#define USBFS_1_EP0_DR6 USBFS_1_EP0_DR6_PTR\r
-#define USBFS_1_EP0_DR7 USBFS_1_EP0_DR7_PTR\r
-\r
-#define USBFS_1_OSCLK_DR0 USBFS_1_OSCLK_DR0_PTR\r
-#define USBFS_1_OSCLK_DR1 USBFS_1_OSCLK_DR1_PTR\r
-\r
-#define USBFS_1_PM_ACT_CFG USBFS_1_PM_ACT_CFG_PTR\r
-#define USBFS_1_PM_STBY_CFG USBFS_1_PM_STBY_CFG_PTR\r
-\r
-#define USBFS_1_SIE_EP_INT_EN USBFS_1_SIE_EP_INT_EN_PTR\r
-#define USBFS_1_SIE_EP_INT_SR USBFS_1_SIE_EP_INT_SR_PTR\r
-\r
-#define USBFS_1_SIE_EP1_CNT0 USBFS_1_SIE_EP1_CNT0_PTR\r
-#define USBFS_1_SIE_EP1_CNT1 USBFS_1_SIE_EP1_CNT1_PTR\r
-#define USBFS_1_SIE_EP1_CR0 USBFS_1_SIE_EP1_CR0_PTR\r
-\r
-#define USBFS_1_SIE_EP2_CNT0 USBFS_1_SIE_EP2_CNT0_PTR\r
-#define USBFS_1_SIE_EP2_CNT1 USBFS_1_SIE_EP2_CNT1_PTR\r
-#define USBFS_1_SIE_EP2_CR0 USBFS_1_SIE_EP2_CR0_PTR\r
-\r
-#define USBFS_1_SIE_EP3_CNT0 USBFS_1_SIE_EP3_CNT0_PTR\r
-#define USBFS_1_SIE_EP3_CNT1 USBFS_1_SIE_EP3_CNT1_PTR\r
-#define USBFS_1_SIE_EP3_CR0 USBFS_1_SIE_EP3_CR0_PTR\r
-\r
-#define USBFS_1_SIE_EP4_CNT0 USBFS_1_SIE_EP4_CNT0_PTR\r
-#define USBFS_1_SIE_EP4_CNT1 USBFS_1_SIE_EP4_CNT1_PTR\r
-#define USBFS_1_SIE_EP4_CR0 USBFS_1_SIE_EP4_CR0_PTR\r
-\r
-#define USBFS_1_SIE_EP5_CNT0 USBFS_1_SIE_EP5_CNT0_PTR\r
-#define USBFS_1_SIE_EP5_CNT1 USBFS_1_SIE_EP5_CNT1_PTR\r
-#define USBFS_1_SIE_EP5_CR0 USBFS_1_SIE_EP5_CR0_PTR\r
-\r
-#define USBFS_1_SIE_EP6_CNT0 USBFS_1_SIE_EP6_CNT0_PTR\r
-#define USBFS_1_SIE_EP6_CNT1 USBFS_1_SIE_EP6_CNT1_PTR\r
-#define USBFS_1_SIE_EP6_CR0 USBFS_1_SIE_EP6_CR0_PTR\r
-\r
-#define USBFS_1_SIE_EP7_CNT0 USBFS_1_SIE_EP7_CNT0_PTR\r
-#define USBFS_1_SIE_EP7_CNT1 USBFS_1_SIE_EP7_CNT1_PTR\r
-#define USBFS_1_SIE_EP7_CR0 USBFS_1_SIE_EP7_CR0_PTR\r
-\r
-#define USBFS_1_SIE_EP8_CNT0 USBFS_1_SIE_EP8_CNT0_PTR\r
-#define USBFS_1_SIE_EP8_CNT1 USBFS_1_SIE_EP8_CNT1_PTR\r
-#define USBFS_1_SIE_EP8_CR0 USBFS_1_SIE_EP8_CR0_PTR\r
-\r
-#define USBFS_1_SOF0 USBFS_1_SOF0_PTR\r
-#define USBFS_1_SOF1 USBFS_1_SOF1_PTR\r
-\r
-#define USBFS_1_USB_CLK_EN USBFS_1_USB_CLK_EN_PTR\r
-\r
-#define USBFS_1_USBIO_CR0 USBFS_1_USBIO_CR0_PTR\r
-#define USBFS_1_USBIO_CR1 USBFS_1_USBIO_CR1_PTR\r
-#define USBFS_1_USBIO_CR2 USBFS_1_USBIO_CR2_PTR\r
-\r
-#define USBFS_1_USB_MEM ((reg8 *) CYDEV_USB_MEM_BASE)\r
-\r
-#if(CYDEV_CHIP_DIE_EXPECT == CYDEV_CHIP_DIE_LEOPARD)\r
- /* PSoC3 interrupt registers*/\r
- #define USBFS_1_USB_ISR_PRIOR ((reg8 *) CYDEV_INTC_PRIOR0)\r
- #define USBFS_1_USB_ISR_SET_EN ((reg8 *) CYDEV_INTC_SET_EN0)\r
- #define USBFS_1_USB_ISR_CLR_EN ((reg8 *) CYDEV_INTC_CLR_EN0)\r
- #define USBFS_1_USB_ISR_VECT ((cyisraddress *) CYDEV_INTC_VECT_MBASE)\r
-#elif(CYDEV_CHIP_DIE_EXPECT == CYDEV_CHIP_DIE_PANTHER)\r
- /* PSoC5 interrupt registers*/\r
- #define USBFS_1_USB_ISR_PRIOR ((reg8 *) CYDEV_NVIC_PRI_0)\r
- #define USBFS_1_USB_ISR_SET_EN ((reg8 *) CYDEV_NVIC_SETENA0)\r
- #define USBFS_1_USB_ISR_CLR_EN ((reg8 *) CYDEV_NVIC_CLRENA0)\r
- #define USBFS_1_USB_ISR_VECT ((cyisraddress *) CYDEV_NVIC_VECT_OFFSET)\r
-#endif /* End CYDEV_CHIP_DIE_EXPECT */\r
-\r
-\r
-/***************************************\r
-* Interrupt vectors, masks and priorities\r
-***************************************/\r
-\r
-#define USBFS_1_BUS_RESET_PRIOR USBFS_1_bus_reset__INTC_PRIOR_NUM\r
-#define USBFS_1_BUS_RESET_MASK USBFS_1_bus_reset__INTC_MASK\r
-#define USBFS_1_BUS_RESET_VECT_NUM USBFS_1_bus_reset__INTC_NUMBER\r
-\r
-#define USBFS_1_SOF_PRIOR USBFS_1_sof_int__INTC_PRIOR_NUM\r
-#define USBFS_1_SOF_MASK USBFS_1_sof_int__INTC_MASK\r
-#define USBFS_1_SOF_VECT_NUM USBFS_1_sof_int__INTC_NUMBER\r
-\r
-#define USBFS_1_EP_0_PRIOR USBFS_1_ep_0__INTC_PRIOR_NUM\r
-#define USBFS_1_EP_0_MASK USBFS_1_ep_0__INTC_MASK\r
-#define USBFS_1_EP_0_VECT_NUM USBFS_1_ep_0__INTC_NUMBER\r
-\r
-#define USBFS_1_EP_1_PRIOR USBFS_1_ep_1__INTC_PRIOR_NUM\r
-#define USBFS_1_EP_1_MASK USBFS_1_ep_1__INTC_MASK\r
-#define USBFS_1_EP_1_VECT_NUM USBFS_1_ep_1__INTC_NUMBER\r
-\r
-#define USBFS_1_EP_2_PRIOR USBFS_1_ep_2__INTC_PRIOR_NUM\r
-#define USBFS_1_EP_2_MASK USBFS_1_ep_2__INTC_MASK\r
-#define USBFS_1_EP_2_VECT_NUM USBFS_1_ep_2__INTC_NUMBER\r
-\r
-#define USBFS_1_EP_3_PRIOR USBFS_1_ep_3__INTC_PRIOR_NUM\r
-#define USBFS_1_EP_3_MASK USBFS_1_ep_3__INTC_MASK\r
-#define USBFS_1_EP_3_VECT_NUM USBFS_1_ep_3__INTC_NUMBER\r
-\r
-#define USBFS_1_EP_4_PRIOR USBFS_1_ep_4__INTC_PRIOR_NUM\r
-#define USBFS_1_EP_4_MASK USBFS_1_ep_4__INTC_MASK\r
-#define USBFS_1_EP_4_VECT_NUM USBFS_1_ep_4__INTC_NUMBER\r
-\r
-#define USBFS_1_EP_5_PRIOR USBFS_1_ep_5__INTC_PRIOR_NUM\r
-#define USBFS_1_EP_5_MASK USBFS_1_ep_5__INTC_MASK\r
-#define USBFS_1_EP_5_VECT_NUM USBFS_1_ep_5__INTC_NUMBER\r
-\r
-#define USBFS_1_EP_6_PRIOR USBFS_1_ep_6__INTC_PRIOR_NUM\r
-#define USBFS_1_EP_6_MASK USBFS_1_ep_6__INTC_MASK\r
-#define USBFS_1_EP_6_VECT_NUM USBFS_1_ep_6__INTC_NUMBER\r
-\r
-#define USBFS_1_EP_7_PRIOR USBFS_1_ep_7__INTC_PRIOR_NUM\r
-#define USBFS_1_EP_7_MASK USBFS_1_ep_7__INTC_MASK\r
-#define USBFS_1_EP_7_VECT_NUM USBFS_1_ep_7__INTC_NUMBER\r
-\r
-#define USBFS_1_EP_8_PRIOR USBFS_1_ep_8__INTC_PRIOR_NUM\r
-#define USBFS_1_EP_8_MASK USBFS_1_ep_8__INTC_MASK\r
-#define USBFS_1_EP_8_VECT_NUM USBFS_1_ep_8__INTC_NUMBER\r
-\r
-#define USBFS_1_DP_INTC_PRIOR USBFS_1_dp_int__INTC_PRIOR_NUM\r
-#define USBFS_1_DP_INTC_MASK USBFS_1_dp_int__INTC_MASK\r
-#define USBFS_1_DP_INTC_VECT_NUM USBFS_1_dp_int__INTC_NUMBER\r
-\r
-/* ARB ISR should have higher priority from EP_X ISR, therefore it is defined to highest (0) */\r
-#define USBFS_1_ARB_PRIOR (0u)\r
-#define USBFS_1_ARB_MASK USBFS_1_arb_int__INTC_MASK\r
-#define USBFS_1_ARB_VECT_NUM USBFS_1_arb_int__INTC_NUMBER\r
-\r
-/***************************************\r
- * Endpoint 0 offsets (Table 9-2)\r
- **************************************/\r
-\r
-#define USBFS_1_bmRequestType USBFS_1_EP0_DR0_PTR\r
-#define USBFS_1_bRequest USBFS_1_EP0_DR1_PTR\r
-#define USBFS_1_wValue USBFS_1_EP0_DR2_PTR\r
-#define USBFS_1_wValueHi USBFS_1_EP0_DR3_PTR\r
-#define USBFS_1_wValueLo USBFS_1_EP0_DR2_PTR\r
-#define USBFS_1_wIndex USBFS_1_EP0_DR4_PTR\r
-#define USBFS_1_wIndexHi USBFS_1_EP0_DR5_PTR\r
-#define USBFS_1_wIndexLo USBFS_1_EP0_DR4_PTR\r
-#define USBFS_1_length USBFS_1_EP0_DR6_PTR\r
-#define USBFS_1_lengthHi USBFS_1_EP0_DR7_PTR\r
-#define USBFS_1_lengthLo USBFS_1_EP0_DR6_PTR\r
-\r
-\r
-/***************************************\r
-* Register Constants\r
-***************************************/\r
-#define USBFS_1_VDDD_MV CYDEV_VDDD_MV\r
-#define USBFS_1_3500MV (3500u)\r
-\r
-#define USBFS_1_CR1_REG_ENABLE (0x01u)\r
-#define USBFS_1_CR1_ENABLE_LOCK (0x02u)\r
-#define USBFS_1_CR1_BUS_ACTIVITY_SHIFT (0x02u)\r
-#define USBFS_1_CR1_BUS_ACTIVITY ((uint8)(0x01u << USBFS_1_CR1_BUS_ACTIVITY_SHIFT))\r
-#define USBFS_1_CR1_TRIM_MSB_EN (0x08u)\r
-\r
-#define USBFS_1_EP0_CNT_DATA_TOGGLE (0x80u)\r
-#define USBFS_1_EPX_CNT_DATA_TOGGLE (0x80u)\r
-#define USBFS_1_EPX_CNT0_MASK (0x0Fu)\r
-#define USBFS_1_EPX_CNTX_MSB_MASK (0x07u)\r
-#define USBFS_1_EPX_CNTX_ADDR_SHIFT (0x04u)\r
-#define USBFS_1_EPX_CNTX_ADDR_OFFSET (0x10u)\r
-#define USBFS_1_EPX_CNTX_CRC_COUNT (0x02u)\r
-#define USBFS_1_EPX_DATA_BUF_MAX (512u)\r
-\r
-#define USBFS_1_CR0_ENABLE (0x80u)\r
-\r
-/* A 100 KHz clock is used for BUS reset count. Recommended is to count 10 pulses */\r
-#define USBFS_1_BUS_RST_COUNT (0x0au)\r
-\r
-#define USBFS_1_USBIO_CR1_IOMODE (0x20u)\r
-#define USBFS_1_USBIO_CR1_USBPUEN (0x04u)\r
-#define USBFS_1_USBIO_CR1_DP0 (0x02u)\r
-#define USBFS_1_USBIO_CR1_DM0 (0x01u)\r
-\r
-#define USBFS_1_USBIO_CR0_TEN (0x80u)\r
-#define USBFS_1_USBIO_CR0_TSE0 (0x40u)\r
-#define USBFS_1_USBIO_CR0_TD (0x20u)\r
-#define USBFS_1_USBIO_CR0_RD (0x01u)\r
-\r
-#define USBFS_1_FASTCLK_IMO_CR_USBCLK_ON (0x40u)\r
-#define USBFS_1_FASTCLK_IMO_CR_XCLKEN (0x20u)\r
-#define USBFS_1_FASTCLK_IMO_CR_FX2ON (0x10u)\r
-\r
-#define USBFS_1_ARB_EPX_CFG_RESET (0x08u)\r
-#define USBFS_1_ARB_EPX_CFG_CRC_BYPASS (0x04u)\r
-#define USBFS_1_ARB_EPX_CFG_DMA_REQ (0x02u)
projects / SCSI2SD.git / commitdiff