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A device that presents a USB Mass Storage device as a Direct Access device to a SCSI controller.
A device that presents a USB Mass Storage device as a Direct Access device to a SCSI controller.
== Why ? ==
Because there are many vintage computers out there that require a 50-pin SCSI drive to boot from.  Such disks are only available second-hand, and it's getting harder and harder to find a working disk.
=== Alternatives ===
* The price of commercial SCSI converters can be much higher than the vintage computers they are used in.  However, these devices are still readily available.
** http://www.pc-pitstop.com/scsi_ide_adapters/
* 50pin to 68pin or 80pin SCSI converters allow the use of newer drives.  Availability of new SCSI SCA (80 pin) drives is limited to prohibitively expensive 15K RPM "enterprise" drives.


== Requirements ==
== Requirements ==
Line 18: Line 27:
* The entirety of the device shall physically fit within a 3 1/2" drive bay, including the storage device.
* The entirety of the device shall physically fit within a 3 1/2" drive bay, including the storage device.


== Why ? ==
== Design Choices ==
Because there are many vintage computers out there that require a 50-pin SCSI drive to boot from.  Such disks are only available second-hand, and it's getting harder and harder to find a working disk.
=== Storage ===
- SD card.


=== Alternatives ===
=== Microcontroller ===
* The price of commercial SCSI converters can be much higher than the vintage computers they are used in. However, these devices are still readily available.
100MIPS, 3.3->3.6v
** http://www.pc-pitstop.com/scsi_ide_adapters/
- parity calcs.
* 50pin to 68pin or 80pin SCSI converters allow the use of newer drives.  Availability of new SCSI SCA (80 pin) drives is limited to prohibitively expensive 15K RPM "enterprise" drives.
- DMA
- 50MHz SPI
- 5v safe IO


== Why USB ? ==
=== SCSI PHY ===
Because USB Mass Storage devices already understand SCSI commands.
- direct connection.
- No consideration of Low-voltage differential (LVD) mode. [http://en.wikipedia.org/wiki/RS-485 RS-485] compatible.  Either LVD SCSI transceivers or RS-485 transceivers would be used - not possible for a direct connection. Note that LVD devices must be able to fallback to SE mode, so they can be mixed on the same SCSI chain.
 
- Talk about mixed voltages, and the applicable ranges.
* TTL logic levels.
* Output signals:
** Signal asserted (true): 0V to 0.5V, up to 48mA sinking current.
** False: 2.5V to 5.25V
* Input signals:
** Signal asserted (true): 0V to 0.8V
** False: 2V to 5.25V


== Parts Required ==
== Parts Required ==
Line 37: Line 59:
** Up to 48 [http://en.wikipedia.org/wiki/Three-state_logic tri-state] GPIO pins (need minimum of 18 for SCSI data + control signals)
** Up to 48 [http://en.wikipedia.org/wiki/Three-state_logic tri-state] GPIO pins (need minimum of 18 for SCSI data + control signals)
* 50 pin IDC header
* 50 pin IDC header
* USB socket
* USB socket (for programming ? Extra expense!
* 5V supply via Molex drive connector
* 5V supply via Molex drive connector
* [http://au.element14.com/texas-instruments/cd74ac280e/logic-parity-gen-chker-9bit-14dip/dp/1753467 TI CD74AC280E] Parity checker/generator.
== SCSI Electrical Interface ==
SE and LVD devices may co-exist on a SCSI chain, but the chain will be reduced to SE functionality.
[http://en.wikipedia.org/wiki/Open_collector Open collector] signals are used. There are 8 (narrow SCSI) or 16 (wide SCSI) data signals, 1 parity signal, and 9 control signals.
=== Single Ended (SE) ===
* Still supported on new U320 drives.
* TTL logic levels.
* Up to 40MB/sec (Ultra Wide SCSI).
* Terminated by 220ohms to TERMPWR, 330ohms to ground.
* Output signals:
** Signal asserted (true): 0V to 0.5V, up to 48mA sinking current.
** False: 2.5V to 5.25V
* Input signals:
** Signal asserted (true): 0V to 0.8V
** False: 2V to 5.25V
=== Low-voltage differential (LVD) ===
* [http://en.wikipedia.org/wiki/RS-485 RS-485] compatible.  Either LVD SCSI transceivers or RS-485 transceivers may be used.
* Up to 320MB/sec (Ultra-320 SCSI).
== SCSI2USB Design ==
=== SCSI signal interface ===
* Single-ended (SE) mode will be used to allow direct connection of each SCSI data and control line to the I/O pins of the microcontroller.
=== Internal Termination ===
* Should be switchable, on and off.
* Use a purpose-built IC.
=== Parity Checker ===
* Programmatically calculating parity of each byte transferred will be too slow.
* The parity bit can be calculated in hardware using a common 74x280 parity checker/generator IC.
* Additional standard logic ICs will be used to switch between input and output data modes.
* Each IC should be chosen to reduce propagation delays. See [http://dsaprojects.110mb.com/electronics/data_book/ic_technology.html].
* <font color="red">Replace with 74x286 or 74x899. MOSFET's switching time is very slow.</font>
The SCSI parity bit is asserted (low) when D0-D7 parity is odd.
Input Mode:
Ground              ==========>  74x280 INPUT
SCSI Cable Data x 8 ======+===>  74x280 <u>D0</u>-<u>D7</u>
                          +======================================> AVR port A0-7<br />
SCSI Cable Parity  =============================================> AVR port C0
                              |  74x280 Even  ===================> AVR port C1
                              |                    |
                              +--X  MOSFET  X------+
                              |____________________G|<============= AVR port C2
(pseudo code)
byte parity = 0
set PORTC to INPUT
set PORTC2 to OUTPUT
set PORTA to INPUT
PORTC &= 11111011 // Disable MOSFET
while (reading)
{
  buffer[n] = ~(Read port A)
  parity = parity ^ Read port C
}
if ((parity & 0x1) != ((parity >> 1) & 0x2))
  Discard buffer, report error
else
  Process buffer


Output Mode:
Ground        ==========>  74x280 INPUT
AVR port A0-7 ======+===>  74x280 <u>D0</u>-<u>D7</u>
                    +======================================> SCSI Cable Data x 8<br />
                            74x280 EVEN ==>|S---------D|==================> SCSI Cable Parity
                                          | nMOSFET  |
AVR Port C2  ===========================>|G----------|<br />
(pseudo code)
set PORTC INPUT
set PORTC2 to OUTPUT
set PORTA to OUTPUT
PORTC |= 0x4
while (writing)
{
  Write port A = ~(buffer[n])
}


== Links ==
== Links ==

Revision as of 05:56, 30 September 2011

A device that presents a USB Mass Storage device as a Direct Access device to a SCSI controller.


Why ?

Because there are many vintage computers out there that require a 50-pin SCSI drive to boot from. Such disks are only available second-hand, and it's getting harder and harder to find a working disk.

Alternatives

  • The price of commercial SCSI converters can be much higher than the vintage computers they are used in. However, these devices are still readily available.
  • 50pin to 68pin or 80pin SCSI converters allow the use of newer drives. Availability of new SCSI SCA (80 pin) drives is limited to prohibitively expensive 15K RPM "enterprise" drives.

Requirements

  • The device shall act as the boot device for an Apple LCIII. See Apple LCIII Restoration.
    • NCR AM85C80 controller.
    • SCSI-2
    • Provides a 25-pin external connector, which implies single-ended support only.
    • asynchronous support only to 1.5MB/sec. I think this is specified based on the longest possible external cable, and higher data-rates would be possible with short internal cables.
  • The device shall support a sustained 4MB/s sequential transfer rate.
  • The device shall optionally provide active termination, enabled and disabled via a jumper.
  • The device shall optionally provide termination power, enabled and disabled via a jumper.
    • Some Macs don't provide termination power. See [1]
  • The device shall optionally check parity, enabled and disabled via a jumper.
    • Some Amiga SCSI controllers don't provide parity.
  • The device shall provide jumpers to set the SCSI ID
  • The entirety of the device shall physically fit within a 3 1/2" drive bay, including the storage device.

Design Choices

Storage

- SD card.

Microcontroller

100MIPS, 3.3->3.6v - parity calcs. - DMA - 50MHz SPI - 5v safe IO

SCSI PHY

- direct connection. - No consideration of Low-voltage differential (LVD) mode. RS-485 compatible. Either LVD SCSI transceivers or RS-485 transceivers would be used - not possible for a direct connection. Note that LVD devices must be able to fallback to SE mode, so they can be mixed on the same SCSI chain.

- Talk about mixed voltages, and the applicable ranges.

  • TTL logic levels.
  • Output signals:
    • Signal asserted (true): 0V to 0.5V, up to 48mA sinking current.
    • False: 2.5V to 5.25V
  • Input signals:
    • Signal asserted (true): 0V to 0.8V
    • False: 2V to 5.25V

Parts Required

  • SCSI Terminator. TI UC5601DWPG4
  • AT90USB1286
    • USB Host functionality
    • Sources/Sinks 40 mA per I/O pin (Specs require 48mA, but this includes a very large safety margin).
    • TTL (5V) I/O output
    • Up to 48 tri-state GPIO pins (need minimum of 18 for SCSI data + control signals)
  • 50 pin IDC header
  • USB socket (for programming ? Extra expense!
  • 5V supply via Molex drive connector


Links

Projects

References

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