SCSI2SD Schematic Notes: Difference between revisions
Updates for V2 |
|||
Line 1: | Line 1: | ||
Details for the circuit design of [[SCSI2SD]]. | Details for the circuit design of [[SCSI2SD]]. | ||
== | == Changes between V1 and V2 == | ||
The [[First_reflow_soldering_attempt]] was a failure. As a result, the schematic is being improved to simplify construction. | |||
=== Change of microcontroller footprint === | |||
The V1 incorrectly made use of a 10x10mm QFN68 0.5mm pitch footprint for the [http://www.cypress.com/?id=2326 CY8C53] microcontroller, instead of the smaller 8x8mm QFN68. 8x8mm is seriously tiny, with a pitch of only 0.4mm. The TSSOP packages (0.635mm pitch) on the V1 boards had many solder bridges etc, and moving to an even finer pitch device would be well beyond my soldering ability. | |||
The solution is to make use of the 100-pin TQFP versions of the microcontroller instead. The devices use a 0.5mm pitch, 25% larger than the QFN68 devices, and the same as the (incorrect) footprint on the V1 board. | |||
=== Change of PHY === | |||
The V1 schematic made use of a typical bus arrangement to interface to the SCSI wires. SCSI signals were split into read and write paths, with the microcontroller using a signal to switch the bus between read or write mode. This arrangement uses minimal microcontroller pins (18 SCSI pins + 1 R/W signal), but additional interface IC's. | |||
The V2 schematic will switch back to a much simpler arrangement whereby each SCSI signal is connected to the microcontroller twice - once for read, and another for write (via an inverting buffer). This arrangement is possible due to the additional I/Os available with the 100-pin QFP version of the microcontroller, and saves the cost/board space/soldering of 6 additional ICs. | |||
=== Use of a solder stencil === | |||
The 0.5mm pitch of the microcontroller will require the use of a stencil to limit the amount of solder paste applied. I applied way too much paste to the 0.635mm pitch devices on the V1 boards, and this caused many solder bridges. | |||
The 0.5mm pitch will require a laser-cut stencil. | |||
# Laser-cut 3mil mylar (plastic) stencils available from [http://www.pololu.com/catalog/product/446 pololu] for $25. Non-framed. | |||
# Laser-cut 3.5mil kapton (plastic) stencils available from [http://ohararp.com/Stencils.html ohararp] for $25. Non-framed. | |||
== Board specifications == | |||
# 0805 sized components will be used where applicable. These represent a good tradeoff between hand-solderability and PCB board space. | |||
# Pin pitch will be 0.5mm or (preferably) larger. | |||
== Power Supply == | == Power Supply == | ||
Line 19: | Line 32: | ||
! | ! | ||
!3.3V | !3.3V | ||
|- | |- | ||
| | |CY8C53 | ||
|200mA | |200mA | ||
rough estimate | |||
|- | |- | ||
|SD Card | |SD Card | ||
|200mA | |200mA | ||
Peak value from [http://www.embeddedrelated.com/groups/msp430/show/14851.php] | Peak value from [http://www.embeddedrelated.com/groups/msp430/show/14851.php] | ||
|- | |- | ||
| | |Termination | ||
| | |466mA | ||
18 * (2.85V / 110ohms) | |||
|- | |- | ||
|'''Total''' | |'''Total''' | ||
|''' | |'''866mA''' | ||
|} | |} | ||
5V supply from a hard drive molex connector should provide more than sufficient current. The 3.3v supply will be regulated from the 5v supply to share input capacitance and therefore reduce complexity | 5V supply from a hard drive molex connector should provide more than sufficient current. The 3.3v supply will be regulated from the 5v supply to share input capacitance and therefore reduce complexity. | ||
=== Switching Regulator Requirements === | === Switching Regulator Requirements === | ||
* Require at least 83% duty cycle, to allow operation down to Vin = 4v. | * Require at least 83% duty cycle, to allow operation down to Vin = 4v. | ||
* Require >= 90% efficiency to reduce heat. | * Require >= 90% efficiency to reduce heat. | ||
* > | * > 866mA output. | ||
* Fsw >= 1MHz for small output filtering capacitance. | * Fsw >= 1MHz for small output filtering capacitance. | ||
* Easy hand-soldering. | * Easy hand-soldering. | ||
Line 158: | Line 160: | ||
|} | |} | ||
== Switches == | == Switches == |
Revision as of 10:30, 28 May 2013
Details for the circuit design of SCSI2SD.
Changes between V1 and V2
The First_reflow_soldering_attempt was a failure. As a result, the schematic is being improved to simplify construction.
Change of microcontroller footprint
The V1 incorrectly made use of a 10x10mm QFN68 0.5mm pitch footprint for the CY8C53 microcontroller, instead of the smaller 8x8mm QFN68. 8x8mm is seriously tiny, with a pitch of only 0.4mm. The TSSOP packages (0.635mm pitch) on the V1 boards had many solder bridges etc, and moving to an even finer pitch device would be well beyond my soldering ability.
The solution is to make use of the 100-pin TQFP versions of the microcontroller instead. The devices use a 0.5mm pitch, 25% larger than the QFN68 devices, and the same as the (incorrect) footprint on the V1 board.
Change of PHY
The V1 schematic made use of a typical bus arrangement to interface to the SCSI wires. SCSI signals were split into read and write paths, with the microcontroller using a signal to switch the bus between read or write mode. This arrangement uses minimal microcontroller pins (18 SCSI pins + 1 R/W signal), but additional interface IC's.
The V2 schematic will switch back to a much simpler arrangement whereby each SCSI signal is connected to the microcontroller twice - once for read, and another for write (via an inverting buffer). This arrangement is possible due to the additional I/Os available with the 100-pin QFP version of the microcontroller, and saves the cost/board space/soldering of 6 additional ICs.
Use of a solder stencil
The 0.5mm pitch of the microcontroller will require the use of a stencil to limit the amount of solder paste applied. I applied way too much paste to the 0.635mm pitch devices on the V1 boards, and this caused many solder bridges.
The 0.5mm pitch will require a laser-cut stencil.
- Laser-cut 3mil mylar (plastic) stencils available from pololu for $25. Non-framed.
- Laser-cut 3.5mil kapton (plastic) stencils available from ohararp for $25. Non-framed.
Board specifications
- 0805 sized components will be used where applicable. These represent a good tradeoff between hand-solderability and PCB board space.
- Pin pitch will be 0.5mm or (preferably) larger.
Power Supply
Power Requirements
3.3V | |
---|---|
CY8C53 | 200mA
rough estimate |
SD Card | 200mA
Peak value from [1] |
Termination | 466mA
18 * (2.85V / 110ohms) |
Total | 866mA |
5V supply from a hard drive molex connector should provide more than sufficient current. The 3.3v supply will be regulated from the 5v supply to share input capacitance and therefore reduce complexity.
Switching Regulator Requirements
- Require at least 83% duty cycle, to allow operation down to Vin = 4v.
- Require >= 90% efficiency to reduce heat.
- > 866mA output.
- Fsw >= 1MHz for small output filtering capacitance.
- Easy hand-soldering.
MAX1951 Design
- MAX1951
- Supports Vout == Vin.
- Regulator won't dropout if the 5V rail temporarily drops down to 3.3V.
- Over 90% efficiency with 5V input.
- 2A output
- Max load current without a heatsink is 1.36A
- 1MHz fixed switching
- Digital soft-start
- Reasonably priced for single units $4.41
- Designed for use with small ceramic capacitors.
- Only 10uF is required for both the input & output filters.
- Additional bulk capacitance will be provided on input to deal with the 5V IC's.
We will take 400mA as the expected load; in truth, it is likely to be much less. Derating to provide a safety margin will be done as a last step in chosing components - this derating should allow a higher load without any problems.
Output Inductor
The MAX1951 recommends a 2μH inductor, making selection very simple.
- 2A minimum current rating, 3A minimum saturation.
- 20mΩ maximum DC resistance.
Given LIR = 30% (Inductor ripple %, recommended range 20%-40%):
Peak inductor current = <math>\left ( 1 + \frac{LIR}{2} \right ) \times I_{OUT} = \left ( 1 + \frac{0.3}{2} \right ) \times 0.4 = 460mA</math>
Given the above values, the chosen inductor is TDK SPM6530T-2R2M ($1.41 for single units).
Inductance | Tolerance | DC Resistance | Current |
---|---|---|---|
2.2μH | 20% | 19mΩ | 8.4A |
Filter Capacitors
The MAX1951 recommends a 10μF input and output ceramic capacitor. There is no point calculating ripple current/voltages etc, because manufacturers don't bother supplying a ripple voltage spec on their datasheets; the low ESR and ESL of ceramic capacitors makes it somewhat irrelevant.
The value of ceramic capacitors decreases significantly (80% or greater) as they approach their rated voltage. For this reason, the filter caps will be over-rated to 25V, and the bypass caps to 10V.
The chosen capacitors are:
Use | Value | Voltage | Type | Package | Device |
---|---|---|---|---|---|
Input and Output filtering | 10μF | 25V | X5R or X7R | 0805 | Murata GRM21BR61E106KA73L |
Input Bulk | 47μF | 25V | X5R or X7R | 1206 | TDK C3216X5R1E476M |
Bypass | 100nF | 25V | X5R or X7R | 0805 | TDK C2012X7R1E104K |
Compensation | 220pF | 50V
See Table 2 in datasheet. |
C0G/NP0 | 0805 | TDK C2012C0G1H221J |
Ferrite Bead
A ferrite bead will be used on the incoming +5V line to reduce EMI being conducted back to the host.
- Ideally, the bead should reject all frequencies from the switching frequency (1MHz) to the CPU Frequency (100MHz). Realistically, very few beads attenuate from 1MHz.
- 2A current rating.
To be safe, we'll chose a ferrite bead with a very minimal DC resistance.
DC Resistance | Peak current | Case style | Impedence | Part |
---|---|---|---|---|
5mΩ | 6A | 1206 | 48Ω @ 100MHz | Taiyo Yuden FBMJ3216HS480NT |
Switches
- Parity and SCSI ID will be set via a set of DIP switches to ground.
- The micro GPIO port pull-ups will be enabled (this is the default anyway).
- Parity requires 1 bit, SCSI ID requires 3 bits, SCSI Terminator DISCNT requires 1 bit. (5-way DIP switch required)