SCSI2SD Schematic Notes: Difference between revisions

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Details for the circuit design of [[SCSI2SD]].
Details for the circuit design of [[SCSI2SD]].


== SMT Type ==
== Changes between V1 and V2 ==
# 0805 sized components will be used where applicable.  These represent a good tradeoff between hand-solderability and PCB board space.
The [[First_reflow_soldering_attempt]] was a failure.  As a result, the schematic is being improved to simplify construction.


== Crystal Oscillator ==
=== Change of microcontroller footprint ===
* LCP1751 requires a 25MHz crystal, which results in a 100MHz clock with x4 PLL
The V1 incorrectly made use of a 10x10mm QFN68 0.5mm pitch footprint for the [http://www.cypress.com/?id=2326 CY8C53] microcontroller, instead of the smaller 8x8mm QFN68. 8x8mm is seriously tiny, with a pitch of only 0.4mm. The TSSOP packages (0.635mm pitch) on the V1 boards had many solder bridges etc, and moving to an even finer pitch device would be well beyond my soldering ability.
* The crystal requires 2 caps for stability. The required value is:
2 * (CL - CS)


Where CL is the crystal's load capacitance, as specified by the crystal manufacturer, and CS is the PCB's stray capacitance (around 5pF for a reasonable PCB).
The solution is to make use of the 100-pin TQFP versions of the microcontroller instead.  The devices use a 0.5mm pitch, 25% larger than the QFN68 devices, and the same as the (incorrect) footprint on the V1 board.


[http://au.element14.com/txc/9c-25-000meej-t/quartz-crystal-25-mhz-18-pf-hc/dp/1842314 TXC - 9C-25.000MEEJ-T] Load capacitance 18pF. Therefore, use 2x 22pF standard ceramic capacitors.
=== Change of PHY ===
The V1 schematic made use of a typical bus arrangement to interface to the SCSI wires.   SCSI signals were split into read and write paths, with the microcontroller using a signal to switch the bus between read or write mode. This arrangement uses minimal microcontroller pins (18 SCSI pins + 1 R/W signal), but additional interface IC's.


== Power Supply ==
The V2 schematic will switch back to a much simpler arrangement whereby each SCSI signal is connected to the microcontroller twice - once for read, and another for write (via an inverting buffer).  This arrangement is possible due to the additional I/Os available with the 100-pin QFP version of the microcontroller, and saves the cost/board space/soldering of 6 additional ICs.  The PSoC5 supports configurable CMOS or LVTTL (SCSI-compatible) signal levels on all GPIO pins.


=== Power Requirements ===
== Removal of the switching regulator ==
{| border="1"
Since the change of PHY has reduced the need for 3.3V power, it is now feasible to run the SD Card from a much simpler (cheaper) LDO linear regulator.
!
!3.3V
!5V
|-
|LPC1751
|200mA
42mA excl. peripherals.<br />
See IDD(REG)(3V3), Table 6, LPC1751 datasheet.
|(160mA @ 80% efficiency)
|-
|SD Card
|200mA
Peak value from [http://www.embeddedrelated.com/groups/msp430/show/14851.php]
|(160mA @ 80% efficiency)
|-
|UCC5617
|N/A
|440mA
4V - 5.25V
|-
|74HCT05
| N/A
| 150mA (50mA * 3)
4.5V - 5.5V
|-
|'''Total'''
|'''400mA'''
|'''910mA'''
|}


5V supply from a hard drive molex connector should provide more than sufficient current.  The 3.3v supply will be regulated from the 5v supply to share input capacitance and therefore reduce complexity (since each set of input filter caps will need a resistor+disconnect circuit to decrease inrush current).
The CY8C53 micro will use the 5V supply instead (internally regulated to 1.8V anyway).  Running at 5V is necessary for the PHY design of directly connecting the input SCSI signals.  This micro allows some I/O pins to run at a lower voltage for interfacing directly to the SD card at 3.3V.


=== Switching Regulator Requirements ===
=== Use of a solder stencil ===
* Require at least 83% duty cycle, to allow operation down to Vin = 4v.
The 0.5mm pitch of the microcontroller will require the use of a stencil to limit the amount of solder paste applied. I applied way too much paste to the 0.635mm pitch devices on the V1 boards, and this caused many solder bridges.
* Require >= 90% efficiency to reduce heat.
* > 500mA output.
* Fsw >= 1MHz for small output filtering capacitance.
* Easy hand-soldering.


=== MAX1951 Design ===
The 0.5mm pitch will require a laser-cut stencil.
* [http://www.maxim-ic.com/datasheet/index.mvp/id/3649 MAX1951]
# Laser-cut 3mil mylar (plastic) stencils available from [http://www.pololu.com/catalog/product/446 pololu] for $25. Non-framed.
* Supports Vout == Vin.
# Laser-cut 3.5mil kapton (plastic) stencils available from [http://ohararp.com/Stencils.html ohararp] for $25. Non-framed.
** Regulator won't dropout if the 5V rail temporarily drops down to 3.3V.
* Over 90% efficiency with 5V input.
* 2A output
** Max load current without a heatsink is [http://www.codesrc.com/utilities/thermal-resistance.php?Tamb=70&Tj=150&r_jc=32&r_b=0&r_ha=146&efficiency=90&voltage=3.3&switching 1.36A]
* 1MHz fixed switching
* Digital soft-start
* Reasonably priced for single units [http://search.digikey.com/us/en/products/MAX1951AESA%2B/MAX1951AESA%2B-ND/2236664 $4.41]
* Designed for use with small ceramic capacitors.
** Only 10uF is required for both the input & output filters.
** Additional bulk capacitance will be provided on input to deal with the 5V IC's.


We will take 400mA as the expected load; in truth, it is likely to be much less. Derating to provide a safety margin will be done as a last step in chosing components - this derating should allow a higher load without any problems.
== Board specifications ==
# 0805 sized components will be used where applicable. These represent a good tradeoff between hand-solderability and PCB board space.
# Pin pitch will be 0.5mm or (preferably) larger.


==== Output Inductor ====
== Power Supply ==
The MAX1951 recommends a 2μH inductor, making selection very simple.
Everything except the SD Card and terminator will make use of the 5V supplied over the molex connector.
* 2A minimum current rating, 3A minimum saturation.
* 20mΩ maximum DC resistance.
 
Given LIR = 30% (Inductor ripple %, recommended range 20%-40%):
Peak inductor current = <math>\left ( 1 + \frac{LIR}{2} \right ) \times I_{OUT} = \left ( 1 + \frac{0.3}{2} \right ) \times 0.4 = 460mA</math>
 
Given the above values, the chosen inductor is [http://www.tdk.co.jp/tefe02/e531_spm.pdf TDK SPM6530T-2R2M] ([http://search.digikey.com/us/en/products/SPM6530T-2R2M/445-4118-1-ND/1993656 $1.41] for single units).
{| border="1"
!Inductance
!Tolerance
!DC Resistance
! Current
|-
|2.2μH
|20%
|19mΩ
|8.4A
|}
 
==== Filter Capacitors ====
The MAX1951 recommends a 10μF input and output ceramic capacitor.  There is no point calculating ripple current/voltages etc, because manufacturers don't bother supplying a ripple voltage spec on their datasheets; the low ESR and ESL of ceramic capacitors makes it somewhat irrelevant.
 
The value of ceramic capacitors decreases significantly (80% or greater) as they approach their rated voltage. For this reason, the filter caps will be over-rated to 25V, and the bypass caps to 10V.
 
The chosen capacitors are:
{| border="1"
! Use
! Value
! Voltage
! Type
! Package
! Device
|-
| Input and Output filtering
| 10μF
| 25V
| X5R or X7R
| 0805
| [http://search.digikey.com/au/en/products/GRM21BR61E106KA73L/490-5523-1-ND/2334919 Murata GRM21BR61E106KA73L]
|-
| Input Bulk
| 47μF
| 25V
| X5R or X7R
| 1206
| [http://search.digikey.com/au/en/products/C3216X5R1E476M/445-8047-1-ND/2792164 TDK C3216X5R1E476M]
|-
| Bypass
| 100nF
| 25V
| X5R or X7R
| 0805
| [http://search.digikey.com/au/en/products/C2012X7R1E104K%2F0.85/445-7557-1-ND/2733629 TDK C2012X7R1E104K]
|-
| Compensation
| 220pF
| 50V
See Table 2 in [http://www.maxim-ic.com/datasheet/index.mvp/id/3649 datasheet].
| C0G/NP0
| 0805
| [http://search.digikey.com/au/en/products/C2012C0G1H221J/445-7497-1-ND/2733569 TDK C2012C0G1H221J]
|}
 
==== Ferrite Bead ====
A ferrite bead will be used on the incoming +5V line to reduce EMI being conducted back to the host.
* Ideally, the bead should reject all frequencies from the switching frequency (1MHz) to the CPU Frequency (100MHz). Realistically, very few beads attenuate from 1MHz.
* 2A current rating.
 
To be safe, we'll chose a ferrite bead with a very minimal DC resistance.
 
{| border="1"
! DC Resistance
! Peak current
! Case style
! Impedence
! Part
|-
| 5mΩ
| 6A
| 1206
| 48Ω @ 100MHz
| [http://search.digikey.com/au/en/products/FBMJ3216HS480NT/587-1771-6-ND/1147142 Taiyo Yuden FBMJ3216HS480NT]
|}
 
==== Inrush Current Limiting ====
The low-ESR ceramic input capacitors will act as a short to ground when the device is turned on.  A 5Ω power resistor will be used to limit the initial inrush current to a maximum of 1A, dissipating 5W.  5W SMD resistors are very large, so we'll make do with a 2W resistor. Most power resistors are rated for 5x there rated power for a short duration (~ 5seconds).  The resistor must be bypassed soon after the circuit turns on allow it to cool down, and to improve efficiency. The disconnection will be done with a P-Channel enhancement mode MOSFET, with the gate connected to the output of the 3.3W switching regulator via a transistor. ie. We'll make use of the built-in soft-start circuit of the regulator as a time delay for the MOSFET.
 
Resistor
{| border="1"
! DC Resistance
! Power Rating
! Peak Power
! Current Limit
! Part
|-
| 5.0Ω
| 2W
| 10W for 5 seconds
| 1A (5V)
| [http://search.digikey.com/au/en/products/PWR4318W5R00JE/PWR4318W5R00JECT-ND/2022991 PWR4318W5R00JE] Bourns PWR4318 series
|}
 
Bypass MOSFET
{| border="1"
! Threshold voltage (min)
! On Resistance (Vgs = -4.5V)
! On Resistance (Vgs = -2.5V)
! Continuous Drain Current
! Power Rating
! Power disapation @ 1A drain
! Part
|-
| -0.6V
| 40mΩ
| 70mΩ
| 4.6A
| 1.25W
| 40mW
| [http://search.digikey.com/au/en/products/DMP2066LDM-7/DMP2066LDMDICT-ND/1964762 Diodes Inc. DMP2066LDM-7]
|}
 
The MOSFET will turn on when the capacitor voltage has risen to the gate threshold value. Assume we have 2 x 47uF ceramic caps as the bulk capacitors with zero charge (<math>V_0</math>).  The ESR will be negligible (~ 0.1 Ohm) and will be ignored. 
 
<math> V_c = V_s \left ( 1 - e{\frac{-t}{RC}} \right )</math>
<math> \frac{V_c}{V_s} = 1 - e{\frac{-t}{RC}} </math>
<math> e{\frac{-t}{RC}} = 1 - \frac{V_c}{V_s}</math>
<math> \frac{-t}{RC} = ln \left ( 1 - \frac{V_c}{V_s} \right )</math>
<math> t = -RC * ln \left ( 1 - \frac{V_c}{V_s} \right )</math>
<math> t = -5 * 0.000094 * ln \left ( 1 - \frac{0.6}{5} \right )</math>
<math> t = 60us</math>
 
At this stage the current being used to charge the caps is low enough for the resistor to be removed.
<math>I = \frac{V_s}{R} e^{\frac{-t}{RC}} </math>
<math>I = \frac{5}{5} e^{\frac{-0.000060}{5 * 0.000094}} </math>
<math>I = 0.88A</math>
 
hmm, but if we disconnect the resistor, current will shoot up again !!!
 
How about just wait until the output hits 4V ? ie. get a different MOSFET ?
 
MOSFET Gate pullup resistor (to +5v). The current through this resistor, when grounded, will be collector->emitter current of NPN transistor.
{| border="1"
! Voltage
! DC Resistance
! Current
 
|-
| 5V
| 2kΩ
| 2.5mA
|}
 
Switching NPN Transistor (used to bring the MOSFET gate to ground to turn the MOSFET on).
{| border="1"
! Max Collector Current (Ic)
! Collector Emitter breakdown voltage
! collector-emitter saturation
! base-emitter saturation
! Part
|-
| 200mA
| 40V
| 300mV
| 0.95V
| [http://www.digikey.com/product-detail/en/MMBT3904-7-F/MMBT3904-FDICT-ND/815727 Diodes Inc. MMBT3904-7-F]
|}
 
The base-emitter voltage will be 3.3V, which will certainly cause saturation (only need < 1V). The collector-emitter saturation voltage will bring the gate-to-source voltage of the MOSFET down to -4.7V (5V input - 300mV in the transistor).  This is sufficient to saturate the MOSFET (need -4.5V).
 
Transistor Base current limiting resistor. We'll drive at 2.5mA so saturation isn't a problem (same as the intented collector current) .
{| border="1"
! Voltage
! DC Resistance
! Current
|-
| 3.3V
| 1320Ω
| 2.5mA
|}
 
== In-circuit programming ==
The LPC17xx micro will be programmed via JTAG using [http://openocd.sourceforge.net/doc/html/Flash-Commands.html Open OCD].
 
The standard ARM 0.1" 20-pin JTAG header will be used (see http://www.keil.com/support/man/docs/ulink2/ulink2_hw_connectors.htm for connector and necessary pull-up/pull-down details).


Serial programming of the LPC1751 is performed via the UART0 TX and RX pins. To enter programming mode, <span style="text-decoration: overline">P2.10</span> must be low on <span style="text-decoration: overline">RESET</span>.  The active-low <span style="text-decoration: overline">P2.10</span> and <span style="text-decoration: overline">RESET</span> lines will be pulled up to +3.3V via a 10kΩ resistor to ensure the micro isn't reset.
The SCSI terminator will use a 2.85 fixed-voltage verson of the LD1117 (LT1117) LDO Regulator. The datasheet provides examples of use for SCSI termination.


== Termination ==
The SD Card (approv 200mA max) will be serviced by a fixed 3.3V version of the same LD1117 LDO regulator.
* The [http://www.ti.com/product/ucc5617?qgpn=ucc5617 ucc5617] will be powered by +5v, not TERMPWR. This enables testing the device without connecting to a live SCSI bus.  The PHY essentially connects the outputs back to the inputs, but we still need the terminator powered to provide pullups.
* A DIP Switch will be used to connect the DISCNCT pin of the [http://www.ti.com/product/ucc5617?qgpn=ucc5617 ucc5617] to ground if the user wants to disable termination. The pin will be pulled-up to +5V via a 10k resistor.


== Switches ==
== Switches ==

Latest revision as of 02:27, 1 June 2013

Details for the circuit design of SCSI2SD.

Changes between V1 and V2

The First_reflow_soldering_attempt was a failure. As a result, the schematic is being improved to simplify construction.

Change of microcontroller footprint

The V1 incorrectly made use of a 10x10mm QFN68 0.5mm pitch footprint for the CY8C53 microcontroller, instead of the smaller 8x8mm QFN68. 8x8mm is seriously tiny, with a pitch of only 0.4mm. The TSSOP packages (0.635mm pitch) on the V1 boards had many solder bridges etc, and moving to an even finer pitch device would be well beyond my soldering ability.

The solution is to make use of the 100-pin TQFP versions of the microcontroller instead. The devices use a 0.5mm pitch, 25% larger than the QFN68 devices, and the same as the (incorrect) footprint on the V1 board.

Change of PHY

The V1 schematic made use of a typical bus arrangement to interface to the SCSI wires. SCSI signals were split into read and write paths, with the microcontroller using a signal to switch the bus between read or write mode. This arrangement uses minimal microcontroller pins (18 SCSI pins + 1 R/W signal), but additional interface IC's.

The V2 schematic will switch back to a much simpler arrangement whereby each SCSI signal is connected to the microcontroller twice - once for read, and another for write (via an inverting buffer). This arrangement is possible due to the additional I/Os available with the 100-pin QFP version of the microcontroller, and saves the cost/board space/soldering of 6 additional ICs. The PSoC5 supports configurable CMOS or LVTTL (SCSI-compatible) signal levels on all GPIO pins.

Removal of the switching regulator

Since the change of PHY has reduced the need for 3.3V power, it is now feasible to run the SD Card from a much simpler (cheaper) LDO linear regulator.

The CY8C53 micro will use the 5V supply instead (internally regulated to 1.8V anyway). Running at 5V is necessary for the PHY design of directly connecting the input SCSI signals. This micro allows some I/O pins to run at a lower voltage for interfacing directly to the SD card at 3.3V.

Use of a solder stencil

The 0.5mm pitch of the microcontroller will require the use of a stencil to limit the amount of solder paste applied. I applied way too much paste to the 0.635mm pitch devices on the V1 boards, and this caused many solder bridges.

The 0.5mm pitch will require a laser-cut stencil.

  1. Laser-cut 3mil mylar (plastic) stencils available from pololu for $25. Non-framed.
  2. Laser-cut 3.5mil kapton (plastic) stencils available from ohararp for $25. Non-framed.

Board specifications

  1. 0805 sized components will be used where applicable. These represent a good tradeoff between hand-solderability and PCB board space.
  2. Pin pitch will be 0.5mm or (preferably) larger.

Power Supply

Everything except the SD Card and terminator will make use of the 5V supplied over the molex connector.

The SCSI terminator will use a 2.85 fixed-voltage verson of the LD1117 (LT1117) LDO Regulator. The datasheet provides examples of use for SCSI termination.

The SD Card (approv 200mA max) will be serviced by a fixed 3.3V version of the same LD1117 LDO regulator.

Switches

  • Parity and SCSI ID will be set via a set of DIP switches to ground.
  • The micro GPIO port pull-ups will be enabled (this is the default anyway).
  • Parity requires 1 bit, SCSI ID requires 3 bits, SCSI Terminator DISCNT requires 1 bit. (5-way DIP switch required)
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