SCSI2SD old: Difference between revisions

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Line 107: Line 107:
  while (writing)
  while (writing)
  {
  {
   Write port A = buffer[n]
   Write port A = ~(buffer[n])
  }
  }



Revision as of 12:51, 28 September 2011

A device that presents a USB Mass Storage device as a Direct Access device to a SCSI controller.

Specifications

  • Fast (10MHz) Narrow (8-bit parallel) Single-Ended SCSI-2

Why ?

Because there are many vintage computers out there that require a 50-pin SCSI drive to boot from. Such disks are only available second-hand, and it's getting harder and harder to find a working disk.

Alternatives

  • The price of commercial SCSI converters can be much higher than the vintage computers they are used in. However, these devices are still readily available.
  • 50pin to 68pin or 80pin SCSI converters allow the use of newer drives. Availability of new SCSI SCA (80 pin) drives is limited to prohibitively expensive 15K RPM "enterprise" drives.

Why USB ?

Because USB Mass Storage devices already understand SCSI commands.

Parts Required

  • SCSI Terminator. TI UC5601DWPG4
  • AT90USB1286
    • USB Host functionality
    • Sources/Sinks 40 mA per I/O pin (Specs require 48mA, but this includes a very large safety margin).
    • TTL (5V) I/O output
    • Up to 48 tri-state GPIO pins (need minimum of 18 for SCSI data + control signals)
  • 50 pin IDC header
  • USB socket
  • 5V supply via Molex drive connector
  • TI CD74AC280E Parity checker/generator.

SCSI Electrical Interface

SE and LVD devices may co-exist on a SCSI chain, but the chain will be reduced to SE functionality.

Open collector signals are used. There are 8 (narrow SCSI) or 16 (wide SCSI) data signals, 1 parity signal, and 9 control signals.

Single Ended (SE)

  • Still supported on new U320 drives.
  • TTL logic levels.
  • Up to 40MB/sec (Ultra Wide SCSI).
  • Terminated by 220ohms to TERMPWR, 330ohms to ground.
  • Output signals:
    • Signal asserted (true): 0V to 0.5V, up to 48mA sinking current.
    • False: 2.5V to 5.25V
  • Input signals:
    • Signal asserted (true): 0V to 0.8V
    • False: 2V to 5.25V

Low-voltage differential (LVD)

  • RS-485 compatible. Either LVD SCSI transceivers or RS-485 transceivers may be used.
  • Up to 320MB/sec (Ultra-320 SCSI).

SCSI2USB Design

SCSI signal interface

  • Single-ended (SE) mode will be used to allow direct connection of each SCSI data and control line to the I/O pins of the microcontroller.

Internal Termination

  • Should be switchable, on and off.
  • Use a purpose-built IC.

Parity Checker

  • Programmatically calculating parity of each byte transferred will be too slow.
  • The parity bit can be calculated in hardware using a common 74x280 parity checker/generator IC.
  • Additional standard logic ICs will be used to switch between input and output data modes.
  • Each IC should be chosen to reduce propagation delays. See [1].

The SCSI parity bit is asserted (low) when D0-D7 parity is odd.

Input Mode:

Ground              ==========>  74x280 INPUT
SCSI Cable Data x 8 ======+===>  74x280 D0-D7 
                          +======================================> AVR port A0-7
SCSI Cable Parity =============================================> AVR port C0 | 74x280 Even ===================> AVR port C1 | | +--X MOSFET X------+ |____________________G|<============= AVR port C2 (pseudo code) byte parity = 0 set PORTC to INPUT set PORTC2 to OUTPUT set PORTA to INPUT PORTC &= 11111011 // Disable MOSFET while (reading) { buffer[n] = ~(Read port A) parity = parity ^ Read port C } if ((parity & 0x1) != ((parity >> 1) & 0x2)) Discard buffer, report error else Process buffer


Output Mode:

Ground        ==========>  74x280 INPUT
AVR port A0-7 ======+===>  74x280 D0-D7 
                    +======================================> SCSI Cable Data x 8
74x280 EVEN ==>|S---------D|==================> SCSI Cable Parity | nMOSFET | AVR Port C2 ===========================>|G----------|
(pseudo code) set PORTC INPUT set PORTC2 to OUTPUT set PORTA to OUTPUT PORTC |= 0x4 while (writing) { Write port A = ~(buffer[n]) }

Links

Projects

References