Bump up the version number
[SCSI2SD-V6.git] / STM32CubeMX / 2020c.diff
1 diff --git a/STM32CubeMX/2020c/Src/fsmc.c b/STM32CubeMX/2020c/Src/fsmc.c
2 index 03a1b12..1b01446 100644
3 --- a/STM32CubeMX/2020c/Src/fsmc.c
4 +++ b/STM32CubeMX/2020c/Src/fsmc.c
5 @@ -50,12 +50,28 @@ void MX_FSMC_Init(void)
6    hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
7    hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
8    /* Timing */
9 +
10 +  // 1 clock to read the address, + 1 for synchroniser skew
11    Timing.AddressSetupTime = 2;
12    Timing.AddressHoldTime = 1;
13 +
14 +  // Writes to device:
15 +  //   1 for synchroniser skew (dbx also delayed)
16 +  //   1 to skip hold time
17 +  //   1 to write data.
18 +
19 +  // Reads from device:
20 +  //   3 for syncroniser
21 +  //   1 to write back to fsmc bus.
22    Timing.DataSetupTime = 4;
23 +
24 +  // Allow a clock for us to release signals
25 +  // Need to avoid both devices acting as outputs
26 +  // on the multiplexed lines at the same time.
27    Timing.BusTurnAroundDuration = 1;
28 -  Timing.CLKDivision = 16;
29 -  Timing.DataLatency = 17;
30 +
31 +  Timing.CLKDivision = 16; // Ignored for async
32 +  Timing.DataLatency = 17; // Ignored for async
33    Timing.AccessMode = FSMC_ACCESS_MODE_A;
34    /* ExtTiming */
35  
36 @@ -105,6 +121,10 @@ static void HAL_FSMC_MspInit(void){
37    PE0   ------> FSMC_NBL0
38    PE1   ------> FSMC_NBL1
39    */
40 +
41 +  // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the
42 +  // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz).
43 +
44    /* GPIO_InitStruct */
45    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 
46                            |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 
47 diff --git a/STM32CubeMX/2020c/Src/sdio.c b/STM32CubeMX/2020c/Src/sdio.c
48 index f2a0b7c..a00c6a8 100644
49 --- a/STM32CubeMX/2020c/Src/sdio.c
50 +++ b/STM32CubeMX/2020c/Src/sdio.c
51 @@ -40,6 +40,8 @@ void MX_SDIO_SD_Init(void)
52    hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
53    hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
54    hsd.Init.ClockDiv = 0;
55 +
56 +  /*
57    if (HAL_SD_Init(&hsd) != HAL_OK)
58    {
59      Error_Handler();
60 @@ -47,8 +49,7 @@ void MX_SDIO_SD_Init(void)
61    if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
62    {
63      Error_Handler();
64 -  }
65 -
66 +  }*/
67  }
68  
69  void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
70 diff --git a/STM32CubeMX/2020c/Src/spi.c b/STM32CubeMX/2020c/Src/spi.c
71 index 902bdb2..4935bf0 100644
72 --- a/STM32CubeMX/2020c/Src/spi.c
73 +++ b/STM32CubeMX/2020c/Src/spi.c
74 @@ -37,6 +37,8 @@ void MX_SPI1_Init(void)
75    hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
76    hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
77    hspi1.Init.NSS = SPI_NSS_SOFT;
78 +
79 +  // 13.5Mbaud FPGA device allows up to 25MHz write
80    hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
81    hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
82    hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
83 diff --git a/STM32CubeMX/2020c/Src/usbd_conf.c b/STM32CubeMX/2020c/Src/usbd_conf.c
84 index eee1fd8..9567a95 100644
85 --- a/STM32CubeMX/2020c/Src/usbd_conf.c
86 +++ b/STM32CubeMX/2020c/Src/usbd_conf.c
87 @@ -458,9 +458,12 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
88    HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback);
89    HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback);
90  #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
91 +
92 +  // Combined RX + TX fifo of 0x140 4-byte words (1280 bytes)
93    HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80);
94    HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40);
95 -  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80);
96 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x40);
97 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 2, 0x40);
98    }
99    if (pdev->id == DEVICE_HS) {
100    /* Link the driver to the stack. */
101 @@ -497,9 +500,15 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
102    HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_HS, PCD_ISOOUTIncompleteCallback);
103    HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_HS, PCD_ISOINIncompleteCallback);
104  #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
105 +  // Combined RX + TX fifo of 0x400 4-byte words (4096 bytes)
106    HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_HS, 0x200);
107 -  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_HS, 0, 0x80);
108 -  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_HS, 1, 0x174);
109 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_HS, 0, 0x40);
110 +
111 +//  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_HS, 1, 0x100);
112 +// HOst requests 7 sectors, which is an odd number and doesn't fill the
113 +// fifo, looks like it doesn't complete in this case !!!!
114 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_HS, 1, 0x80); // 512 bytes
115 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_HS, 2, 0x40);
116    }
117    return USBD_OK;
118  }
119 diff --git a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h
120 index a4317e4..7165538 100644
121 --- a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h
122 +++ b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h
123 @@ -614,7 +614,8 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, ui
124  HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
125  /* Non-Blocking mode: DMA */
126  HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
127 -HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
128 +HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks);
129 +HAL_StatusTypeDef HAL_SD_WriteBlocks_Data(SD_HandleTypeDef *hsd, uint8_t *pData);
130  
131  void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
132  
133 diff --git a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
134 index 181b4b7..d71c37b 100644
135 --- a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
136 +++ b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
137 @@ -1064,6 +1064,7 @@ uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
138  uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
139  uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
140  uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
141 +uint32_t SDMMC_CmdSetBlockCount(SDIO_TypeDef *SDIOx, uint32_t appCmdArg, uint32_t blockCount);
142  uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
143  uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
144  uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd);
145 diff --git a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
146 index 569c8b1..b10dd0e 100644
147 --- a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
148 +++ b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
149 @@ -430,6 +430,10 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
150    /* Enable SDIO Clock */
151    __HAL_SD_ENABLE(hsd);
152  
153 +  /* 1ms: required power up waiting time before starting the SD initialization 
154 +     sequence */
155 +  HAL_Delay(1);
156 +
157    /* Identify card operating voltage */
158    errorstate = SD_PowerON(hsd);
159    if(errorstate != HAL_SD_ERROR_NONE)
160 @@ -1227,22 +1231,21 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
161      else
162      {
163        /* Enable SD DMA transfer */
164 -      __HAL_SD_DMA_ENABLE(hsd);
165 +      // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
166  
167        if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
168        {
169          add *= 512U;
170 -      }
171 -
172 -      /* Set Block Size for Card */
173 -      errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
174 -      if(errorstate != HAL_SD_ERROR_NONE)
175 -      {
176 -        /* Clear all the static flags */
177 -        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
178 -        hsd->ErrorCode |= errorstate;
179 -        hsd->State = HAL_SD_STATE_READY;
180 -        return HAL_ERROR;
181 +        /* Set Block Size for Card */
182 +        errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
183 +        if(errorstate != HAL_SD_ERROR_NONE)
184 +        {
185 +          /* Clear all the static flags */
186 +          __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
187 +          hsd->ErrorCode |= errorstate;
188 +          hsd->State = HAL_SD_STATE_READY;
189 +          return HAL_ERROR;
190 +        }
191        }
192  
193        /* Configure the SD DPSM (Data Path State Machine) */
194 @@ -1252,6 +1255,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
195        config.TransferDir   = SDIO_TRANSFER_DIR_TO_SDIO;
196        config.TransferMode  = SDIO_TRANSFER_MODE_BLOCK;
197        config.DPSM          = SDIO_DPSM_ENABLE;
198 +
199 +      // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
200 +      // data is just discarded before the dpsm is started.
201 +      __HAL_SD_DMA_ENABLE();
202 +
203        (void)SDIO_ConfigData(hsd->Instance, &config);
204  
205        /* Read Blocks in DMA mode */
206 @@ -1301,18 +1309,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
207    * @param  NumberOfBlocks: Number of blocks to write
208    * @retval HAL status
209    */
210 -HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
211 +HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks)
212  {
213 -  SDIO_DataInitTypeDef config;
214    uint32_t errorstate;
215    uint32_t add = BlockAdd;
216  
217 -  if(NULL == pData)
218 -  {
219 -    hsd->ErrorCode |= HAL_SD_ERROR_PARAM;
220 -    return HAL_ERROR;
221 -  }
222 -
223    if(hsd->State == HAL_SD_STATE_READY)
224    {
225      hsd->ErrorCode = HAL_SD_ERROR_NONE;
226 @@ -1323,15 +1324,29 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
227        return HAL_ERROR;
228      }
229  
230 -    hsd->State = HAL_SD_STATE_BUSY;
231 +    if(NumberOfBlocks > 1U && hsd->SdCard.CardType == CARD_SDHC_SDXC)
232 +    {
233 +      /* MM: Prepare for write */
234 +      errorstate = SDMMC_CmdSetBlockCount(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd) << 16, NumberOfBlocks);
235 +      if(errorstate != HAL_SD_ERROR_NONE)
236 +      {
237 +        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
238 +        hsd->ErrorCode |= errorstate;
239 +        hsd->State = HAL_SD_STATE_READY;
240 +        return HAL_ERROR;
241 +      }
242 +    }
243 +
244 +    // hsd->State = HAL_SD_STATE_BUSY;
245  
246      /* Initialize data control register */
247      hsd->Instance->DCTRL = 0U;
248  
249      /* Enable SD Error interrupts */
250 -    __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR));   
251 +    __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR | SDIO_IT_DATAEND));
252  
253      /* Set the DMA transfer complete callback */
254 +    // This callback now doesn't do anything - enabling DATAEND interrupt is set above to avoid race conditions
255      hsd->hdmatx->XferCpltCallback = SD_DMATransmitCplt;
256  
257      /* Set the DMA error callback */
258 @@ -1343,17 +1358,16 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
259      if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
260      {
261        add *= 512U;
262 -    }
263 -
264 -    /* Set Block Size for Card */
265 -    errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
266 -    if(errorstate != HAL_SD_ERROR_NONE)
267 -    {
268 -      /* Clear all the static flags */
269 -      __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
270 -      hsd->ErrorCode |= errorstate;
271 -      hsd->State = HAL_SD_STATE_READY;
272 -      return HAL_ERROR;
273 +      /* Set Block Size for Card */
274 +      errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
275 +      if(errorstate != HAL_SD_ERROR_NONE)
276 +      {
277 +        /* Clear all the static flags */
278 +        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
279 +        hsd->ErrorCode |= errorstate;
280 +        hsd->State = HAL_SD_STATE_READY;
281 +        return HAL_ERROR;
282 +      }
283      }
284  
285      /* Write Blocks in Polling mode */
286 @@ -1381,11 +1395,55 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
287        return HAL_ERROR;
288      }
289  
290 -    /* Enable SDIO DMA transfer */
291 -    __HAL_SD_DMA_ENABLE(hsd);
292 +    return HAL_OK;
293 +  }
294 +  else
295 +  {
296 +    return HAL_BUSY;
297 +  }
298 +}
299 +
300 +/**
301 +  * @brief  Writes block(s) to a specified address in a card. The Data transfer
302 +  *         is managed by DMA mode.
303 +  * @note   This API should be followed by a check on the card state through
304 +  *         HAL_SD_GetCardState().
305 +  * @note   You could also check the DMA transfer process through the SD Tx
306 +  *         interrupt event.
307 +  * @param  hsd: Pointer to SD handle
308 +  * @param  pData: Pointer to the buffer that will contain the data to transmit
309 +  * @param  BlockAdd: Block Address where data will be written
310 +  * @param  NumberOfBlocks: Number of blocks to write
311 +  * @retval HAL status
312 +  */
313 +HAL_StatusTypeDef HAL_SD_WriteBlocks_Data(SD_HandleTypeDef *hsd, uint8_t *pData)
314 +{
315 +  SDIO_DataInitTypeDef config;
316 +
317 +  if(hsd->State == HAL_SD_STATE_READY)
318 +  {
319 +    hsd->ErrorCode = HAL_SD_ERROR_NONE;
320 +
321 +    hsd->State = HAL_SD_STATE_BUSY;
322 +
323 +    /* Initialize data control register */
324 +    hsd->Instance->DCTRL = 0U;
325 +
326 +    /* Enable SD Error interrupts */
327 +    __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR | SDIO_IT_DATAEND));
328 +
329 +    /* Set the DMA transfer complete callback */
330 +    // This callback now doesn't do anything - enabling DATAEND interrupt is set above to avoid race conditions
331 +    hsd->hdmatx->XferCpltCallback = SD_DMATransmitCplt;
332 +
333 +    /* Set the DMA error callback */
334 +    hsd->hdmatx->XferErrorCallback = SD_DMAError;
335 +
336 +    /* Set the DMA Abort callback */
337 +    hsd->hdmatx->XferAbortCallback = NULL;
338  
339      /* Enable the DMA Channel */
340 -    if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK)
341 +    if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE)/4U) != HAL_OK)
342      {
343        __HAL_SD_DISABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR));   
344        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
345 @@ -1398,11 +1456,16 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
346      {
347        /* Configure the SD DPSM (Data Path State Machine) */
348        config.DataTimeOut   = SDMMC_DATATIMEOUT;
349 -      config.DataLength    = BLOCKSIZE * NumberOfBlocks;
350 +      config.DataLength    = BLOCKSIZE;
351        config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
352        config.TransferDir   = SDIO_TRANSFER_DIR_TO_CARD;
353        config.TransferMode  = SDIO_TRANSFER_MODE_BLOCK;
354        config.DPSM          = SDIO_DPSM_ENABLE;
355 +
356 +      // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
357 +      // data is just discarded before the dpsm is started.
358 +      __HAL_SD_DMA_ENABLE();
359 +
360        (void)SDIO_ConfigData(hsd->Instance, &config);
361  
362        return HAL_OK;
363 @@ -1588,16 +1651,8 @@ void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd)
364      {
365        if((context & SD_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)
366        {
367 -        errorstate = SDMMC_CmdStopTransfer(hsd->Instance);
368 -        if(errorstate != HAL_SD_ERROR_NONE)
369 -        {
370 -          hsd->ErrorCode |= errorstate;
371 -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
372 -          hsd->ErrorCallback(hsd);
373 -#else
374 -          HAL_SD_ErrorCallback(hsd);
375 -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
376 -        }
377 +        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
378 +        __HAL_SD_DMA_DISABLE(hsd);
379        }
380        if(((context & SD_CONTEXT_READ_SINGLE_BLOCK) == 0U) && ((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) == 0U))
381        {
382 @@ -2354,7 +2409,7 @@ HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd)
383    hsd->Context = SD_CONTEXT_NONE;
384  
385    CardState = HAL_SD_GetCardState(hsd);
386 -  if((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING))
387 +  if((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING) || (CardState == HAL_SD_CARD_PROGRAMMING))
388    {
389      hsd->ErrorCode = SDMMC_CmdStopTransfer(hsd->Instance);
390    }
391 @@ -2460,10 +2515,13 @@ HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd)
392    */
393  static void SD_DMATransmitCplt(DMA_HandleTypeDef *hdma)
394  {
395 -  SD_HandleTypeDef* hsd = (SD_HandleTypeDef* )(hdma->Parent);
396 +  // SD_HandleTypeDef* hsd = (SD_HandleTypeDef* )(hdma->Parent);
397  
398    /* Enable DATAEND Interrupt */
399 -  __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DATAEND));
400 +  // __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DATAEND));
401 +  //WHAT IF IT ALREADY TRIGGERED ? Maybe it can't due to interrupt priorities ?
402 +  // Easier to just ignore it.
403 +  //  __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DATAEND));
404  }
405  
406  /**
407 diff --git a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
408 index b060eae..de39f9d 100644
409 --- a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
410 +++ b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
411 @@ -606,6 +606,32 @@ uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
412    return errorstate;
413  }
414  
415 +/**
416 +  * @brief  Set the count of a multi-block write command
417 +  * @param  SDIOx: Pointer to SDIO register base 
418 +  * @retval HAL status
419 +  */
420 +uint32_t SDMMC_CmdSetBlockCount(SDIO_TypeDef *SDIOx, uint32_t appCmdArg, uint32_t blockCount)
421 +{
422 +  SDIO_CmdInitTypeDef  sdmmc_cmdinit;
423 +  uint32_t errorstate;
424 +  
425 +  errorstate = SDMMC_CmdAppCommand(SDIOx, appCmdArg);
426 +  if(errorstate == HAL_SD_ERROR_NONE)
427 +  {
428 +    sdmmc_cmdinit.Argument         = blockCount;
429 +    sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SET_BLOCK_COUNT;
430 +    sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
431 +    sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
432 +    sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
433 +    (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
434 +    errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);
435 +  }
436 +
437 +  return errorstate;
438 +}
439 +
440 +
441  /**
442    * @brief  Send the Write Multi Block command and check the response
443    * @param  SDIOx: Pointer to SDIO register base