Fix DMA IRQ priorty to be less than the SDIO IRQ
[SCSI2SD-V6.git] / STM32CubeMX / 2020c / Src / dma.c
1 /**
2   ******************************************************************************
3   * File Name          : dma.c
4   * Description        : This file provides code for the configuration
5   *                      of all the requested memory to memory DMA transfers.
6   ******************************************************************************
7   * @attention
8   *
9   * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
10   * All rights reserved.</center></h2>
11   *
12   * This software component is licensed by ST under Ultimate Liberty license
13   * SLA0044, the "License"; You may not use this file except in compliance with
14   * the License. You may obtain a copy of the License at:
15   *                             www.st.com/SLA0044
16   *
17   ******************************************************************************
18   */
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "dma.h"
22
23 /* USER CODE BEGIN 0 */
24
25 /* USER CODE END 0 */
26
27 /*----------------------------------------------------------------------------*/
28 /* Configure DMA                                                              */
29 /*----------------------------------------------------------------------------*/
30
31 /* USER CODE BEGIN 1 */
32
33 /* USER CODE END 1 */
34 DMA_HandleTypeDef hdma_memtomem_dma2_stream0;
35 DMA_HandleTypeDef hdma_memtomem_dma2_stream1;
36
37 /** 
38   * Enable DMA controller clock
39   * Configure DMA for memory to memory transfers
40   *   hdma_memtomem_dma2_stream0
41   *   hdma_memtomem_dma2_stream1
42   */
43 void MX_DMA_Init(void) 
44 {
45
46   /* DMA controller clock enable */
47   __HAL_RCC_DMA2_CLK_ENABLE();
48
49   /* Configure DMA request hdma_memtomem_dma2_stream0 on DMA2_Stream0 */
50   hdma_memtomem_dma2_stream0.Instance = DMA2_Stream0;
51   hdma_memtomem_dma2_stream0.Init.Channel = DMA_CHANNEL_0;
52   hdma_memtomem_dma2_stream0.Init.Direction = DMA_MEMORY_TO_MEMORY;
53   hdma_memtomem_dma2_stream0.Init.PeriphInc = DMA_PINC_ENABLE;
54   hdma_memtomem_dma2_stream0.Init.MemInc = DMA_MINC_DISABLE;
55   hdma_memtomem_dma2_stream0.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
56   hdma_memtomem_dma2_stream0.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
57   hdma_memtomem_dma2_stream0.Init.Mode = DMA_NORMAL;
58   hdma_memtomem_dma2_stream0.Init.Priority = DMA_PRIORITY_LOW;
59   hdma_memtomem_dma2_stream0.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
60   hdma_memtomem_dma2_stream0.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
61   hdma_memtomem_dma2_stream0.Init.MemBurst = DMA_MBURST_INC8;
62   hdma_memtomem_dma2_stream0.Init.PeriphBurst = DMA_PBURST_INC4;
63   if (HAL_DMA_Init(&hdma_memtomem_dma2_stream0) != HAL_OK)
64   {
65     Error_Handler();
66   }
67
68   /* Configure DMA request hdma_memtomem_dma2_stream1 on DMA2_Stream1 */
69   hdma_memtomem_dma2_stream1.Instance = DMA2_Stream1;
70   hdma_memtomem_dma2_stream1.Init.Channel = DMA_CHANNEL_0;
71   hdma_memtomem_dma2_stream1.Init.Direction = DMA_MEMORY_TO_MEMORY;
72   hdma_memtomem_dma2_stream1.Init.PeriphInc = DMA_PINC_DISABLE;
73   hdma_memtomem_dma2_stream1.Init.MemInc = DMA_MINC_ENABLE;
74   hdma_memtomem_dma2_stream1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
75   hdma_memtomem_dma2_stream1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
76   hdma_memtomem_dma2_stream1.Init.Mode = DMA_NORMAL;
77   hdma_memtomem_dma2_stream1.Init.Priority = DMA_PRIORITY_LOW;
78   hdma_memtomem_dma2_stream1.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
79   hdma_memtomem_dma2_stream1.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
80   hdma_memtomem_dma2_stream1.Init.MemBurst = DMA_MBURST_INC4;
81   hdma_memtomem_dma2_stream1.Init.PeriphBurst = DMA_PBURST_INC8;
82   if (HAL_DMA_Init(&hdma_memtomem_dma2_stream1) != HAL_OK)
83   {
84     Error_Handler();
85   }
86
87   /* DMA interrupt init */
88   /* DMA2_Stream3_IRQn interrupt configuration */
89   HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 8, 0);
90   HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
91   /* DMA2_Stream6_IRQn interrupt configuration */
92   HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 8, 0);
93   HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
94
95 }
96
97 /* USER CODE BEGIN 2 */
98
99 /* USER CODE END 2 */
100
101 /**
102   * @}
103   */
104
105 /**
106   * @}
107   */
108
109 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/