3a63a3bb854908784e7d0f2991ba6bdfe6672703
[SCSI2SD-V6.git] / STM32CubeMX / revF.diff
1 diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
2 index 569c8b1..1b8c51b 100644
3 --- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
4 +++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
5 @@ -430,6 +430,10 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
6    /* Enable SDIO Clock */
7    __HAL_SD_ENABLE(hsd);
8  
9 +  /* 1ms: required power up waiting time before starting the SD initialization
10 +    sequence */
11 +  HAL_Delay(1);
12 +
13    /* Identify card operating voltage */
14    errorstate = SD_PowerON(hsd);
15    if(errorstate != HAL_SD_ERROR_NONE)
16 @@ -1227,22 +1231,22 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
17      else
18      {
19        /* Enable SD DMA transfer */
20 -      __HAL_SD_DMA_ENABLE(hsd);
21 +      // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
22  
23        if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
24        {
25          add *= 512U;
26 -      }
27  
28 -      /* Set Block Size for Card */
29 -      errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
30 -      if(errorstate != HAL_SD_ERROR_NONE)
31 -      {
32 -        /* Clear all the static flags */
33 -        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
34 -        hsd->ErrorCode |= errorstate;
35 -        hsd->State = HAL_SD_STATE_READY;
36 -        return HAL_ERROR;
37 +        /* Set Block Size for Card */
38 +        errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
39 +        if(errorstate != HAL_SD_ERROR_NONE)
40 +        {
41 +          /* Clear all the static flags */
42 +          __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
43 +          hsd->ErrorCode |= errorstate;
44 +          hsd->State = HAL_SD_STATE_READY;
45 +          return HAL_ERROR;
46 +        }
47        }
48  
49        /* Configure the SD DPSM (Data Path State Machine) */
50 @@ -1252,6 +1256,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
51        config.TransferDir   = SDIO_TRANSFER_DIR_TO_SDIO;
52        config.TransferMode  = SDIO_TRANSFER_MODE_BLOCK;
53        config.DPSM          = SDIO_DPSM_ENABLE;
54 +
55 +      // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
56 +      // data is just discarded before the dpsm is started.
57 +      __HAL_SD_DMA_ENABLE(hsd);
58 +
59        (void)SDIO_ConfigData(hsd->Instance, &config);
60  
61        /* Read Blocks in DMA mode */
62 @@ -1343,17 +1352,17 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
63      if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
64      {
65        add *= 512U;
66 -    }
67  
68 -    /* Set Block Size for Card */
69 -    errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
70 -    if(errorstate != HAL_SD_ERROR_NONE)
71 -    {
72 -      /* Clear all the static flags */
73 -      __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
74 -      hsd->ErrorCode |= errorstate;
75 -      hsd->State = HAL_SD_STATE_READY;
76 -      return HAL_ERROR;
77 +      /* Set Block Size for Card */
78 +      errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
79 +      if(errorstate != HAL_SD_ERROR_NONE)
80 +      {
81 +        /* Clear all the static flags */
82 +        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
83 +        hsd->ErrorCode |= errorstate;
84 +        hsd->State = HAL_SD_STATE_READY;
85 +        return HAL_ERROR;
86 +      }
87      }
88  
89      /* Write Blocks in Polling mode */
90 @@ -1361,6 +1370,18 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
91      {
92        hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_DMA);
93  
94 +      /* MM: Prepare for write */
95 +/* TODO
96 +      SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->RCA << 16));
97 +      SDIO_CmdInitTypeDef  mm_cmdinit;
98 +      mm_cmdinit.Argument         = (uint32_t)NumberOfBlocks;
99 +      mm_cmdinit.CmdIndex         = SDMMC_CMD_SET_BLOCK_COUNT;
100 +      mm_cmdinit.Response         = SDIO_RESPONSE_SHORT;
101 +      mm_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
102 +      mm_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
103 +      (void)SDIO_SendCommand(hsd->Instance, &mm_cmdinit);
104 +      SDMMC_GetCmdResp1(hsd->Instance, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);*/
105 +
106        /* Write Multi Block command */
107        errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add);
108      }
109 @@ -1382,7 +1403,7 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
110      }
111  
112      /* Enable SDIO DMA transfer */
113 -    __HAL_SD_DMA_ENABLE(hsd);
114 +    // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
115  
116      /* Enable the DMA Channel */
117      if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK)
118 @@ -1403,6 +1424,11 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
119        config.TransferDir   = SDIO_TRANSFER_DIR_TO_CARD;
120        config.TransferMode  = SDIO_TRANSFER_MODE_BLOCK;
121        config.DPSM          = SDIO_DPSM_ENABLE;
122 +
123 +      // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
124 +      // data is just discarded before the dpsm is started.
125 +      __HAL_SD_DMA_ENABLE();
126 +
127        (void)SDIO_ConfigData(hsd->Instance, &config);
128  
129        return HAL_OK;
130 diff --git a/STM32CubeMX/revF/Src/sdio.c b/STM32CubeMX/revF/Src/sdio.c
131 index f2a0b7c..a00c6a8 100644
132 --- a/STM32CubeMX/revF/Src/sdio.c
133 +++ b/STM32CubeMX/revF/Src/sdio.c
134 @@ -40,6 +40,8 @@ void MX_SDIO_SD_Init(void)
135    hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
136    hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
137    hsd.Init.ClockDiv = 0;
138 +
139 +  /*
140    if (HAL_SD_Init(&hsd) != HAL_OK)
141    {
142      Error_Handler();
143 @@ -47,8 +49,7 @@ void MX_SDIO_SD_Init(void)
144    if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
145    {
146      Error_Handler();
147 -  }
148 -
149 +  }*/
150  }
151  
152  void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
153 diff --git a/STM32CubeMX/revF/Src/spi.c b/STM32CubeMX/revF/Src/spi.c
154 index 8a452c4..8e4082b 100644
155 --- a/STM32CubeMX/revF/Src/spi.c
156 +++ b/STM32CubeMX/revF/Src/spi.c
157 @@ -37,6 +37,8 @@ void MX_SPI1_Init(void)
158    hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
159    hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
160    hspi1.Init.NSS = SPI_NSS_SOFT;
161 +
162 +  // 13.5Mbaud FPGA device allows up to 25MHz write
163    hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
164    hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
165    hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
166 diff --git a/STM32CubeMX/revF/Src/usbd_conf.c b/STM32CubeMX/revF/Src/usbd_conf.c
167 index 65f6102..8e03767 100644
168 --- a/STM32CubeMX/revF/Src/usbd_conf.c
169 +++ b/STM32CubeMX/revF/Src/usbd_conf.c
170 @@ -357,9 +357,11 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
171    HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback);
172    HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback);
173  #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
174 +  // Combined RX + TX fifo of 0x140 4-byte words (1280 bytes)
175    HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80);
176    HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40);
177 -  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80);
178 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x40);
179 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 2, 0x40);
180    }
181    return USBD_OK;
182  }
183 diff --git a/STM32CubeMX/revF/Src/fsmc.c b/STM32CubeMX/revF/Src/fsmc.c
184 index 03a1b12..1b01446 100644
185 --- a/STM32CubeMX/revF/Src/fsmc.c
186 +++ b/STM32CubeMX/revF/Src/fsmc.c
187 @@ -50,12 +50,28 @@ void MX_FSMC_Init(void)
188    hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
189    hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
190    /* Timing */
191 +
192 +  // 1 clock to read the address, + 1 for synchroniser skew
193    Timing.AddressSetupTime = 2;
194    Timing.AddressHoldTime = 1;
195 +
196 +  // Writes to device:
197 +  //   1 for synchroniser skew (dbx also delayed)
198 +  //   1 to skip hold time
199 +  //   1 to write data.
200 +
201 +  // Reads from device:
202 +  //   3 for syncroniser
203 +  //   1 to write back to fsmc bus.
204    Timing.DataSetupTime = 4;
205 +
206 +  // Allow a clock for us to release signals
207 +  // Need to avoid both devices acting as outputs
208 +  // on the multiplexed lines at the same time.
209    Timing.BusTurnAroundDuration = 1;
210 -  Timing.CLKDivision = 16;
211 -  Timing.DataLatency = 17;
212 +
213 +  Timing.CLKDivision = 16; // Ignored for async
214 +  Timing.DataLatency = 17; // Ignored for async
215    Timing.AccessMode = FSMC_ACCESS_MODE_A;
216    /* ExtTiming */
217
218 @@ -105,6 +121,10 @@ static void HAL_FSMC_MspInit(void){
219    PE0   ------> FSMC_NBL0
220    PE1   ------> FSMC_NBL1
221    */
222 +
223 +  // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the
224 +  // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz).
225 +
226    /* GPIO_InitStruct */
227    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
228                            |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
229