Improve IRQ handler responsiveness
[SCSI2SD-V6.git] / STM32CubeMX / revF.diff
1 diff --git a/STM32CubeMX/revF/Src/sdio.c b/STM32CubeMX/revF/Src/sdio.c
2 index f2a0b7c..a00c6a8 100644
3 --- a/STM32CubeMX/revF/Src/sdio.c
4 +++ b/STM32CubeMX/revF/Src/sdio.c
5 @@ -40,6 +40,8 @@ void MX_SDIO_SD_Init(void)
6    hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
7    hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
8    hsd.Init.ClockDiv = 0;
9 +
10 +  /*
11    if (HAL_SD_Init(&hsd) != HAL_OK)
12    {
13      Error_Handler();
14 @@ -47,8 +49,7 @@ void MX_SDIO_SD_Init(void)
15    if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
16    {
17      Error_Handler();
18 -  }
19 -
20 +  }*/
21  }
22  
23  void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
24 diff --git a/STM32CubeMX/revF/Src/spi.c b/STM32CubeMX/revF/Src/spi.c
25 index 8a452c4..8e4082b 100644
26 --- a/STM32CubeMX/revF/Src/spi.c
27 +++ b/STM32CubeMX/revF/Src/spi.c
28 @@ -37,6 +37,8 @@ void MX_SPI1_Init(void)
29    hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
30    hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
31    hspi1.Init.NSS = SPI_NSS_SOFT;
32 +
33 +  // 13.5Mbaud FPGA device allows up to 25MHz write
34    hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
35    hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
36    hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
37 diff --git a/STM32CubeMX/revF/Src/usbd_conf.c b/STM32CubeMX/revF/Src/usbd_conf.c
38 index 65f6102..8e03767 100644
39 --- a/STM32CubeMX/revF/Src/usbd_conf.c
40 +++ b/STM32CubeMX/revF/Src/usbd_conf.c
41 @@ -357,9 +357,11 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
42    HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback);
43    HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback);
44  #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
45 +  // Combined RX + TX fifo of 0x140 4-byte words (1280 bytes)
46    HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80);
47    HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40);
48 -  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80);
49 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x40);
50 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 2, 0x40);
51    }
52    return USBD_OK;
53  }
54 diff --git a/STM32CubeMX/revF/Src/fsmc.c b/STM32CubeMX/revF/Src/fsmc.c
55 index 03a1b12..1b01446 100644
56 --- a/STM32CubeMX/revF/Src/fsmc.c
57 +++ b/STM32CubeMX/revF/Src/fsmc.c
58 @@ -50,12 +50,28 @@ void MX_FSMC_Init(void)
59    hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
60    hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
61    /* Timing */
62 +
63 +  // 1 clock to read the address, + 1 for synchroniser skew
64    Timing.AddressSetupTime = 2;
65    Timing.AddressHoldTime = 1;
66 +
67 +  // Writes to device:
68 +  //   1 for synchroniser skew (dbx also delayed)
69 +  //   1 to skip hold time
70 +  //   1 to write data.
71 +
72 +  // Reads from device:
73 +  //   3 for syncroniser
74 +  //   1 to write back to fsmc bus.
75    Timing.DataSetupTime = 4;
76 +
77 +  // Allow a clock for us to release signals
78 +  // Need to avoid both devices acting as outputs
79 +  // on the multiplexed lines at the same time.
80    Timing.BusTurnAroundDuration = 1;
81 -  Timing.CLKDivision = 16;
82 -  Timing.DataLatency = 17;
83 +
84 +  Timing.CLKDivision = 16; // Ignored for async
85 +  Timing.DataLatency = 17; // Ignored for async
86    Timing.AccessMode = FSMC_ACCESS_MODE_A;
87    /* ExtTiming */
88
89 @@ -105,6 +121,10 @@ static void HAL_FSMC_MspInit(void){
90    PE0   ------> FSMC_NBL0
91    PE1   ------> FSMC_NBL1
92    */
93 +
94 +  // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the
95 +  // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz).
96 +
97    /* GPIO_InitStruct */
98    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
99                            |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
100
101 diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h
102 index a4317e4..7165538 100644
103 --- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h
104 +++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_sd.h
105 @@ -614,7 +614,8 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, ui
106  HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
107  /* Non-Blocking mode: DMA */
108  HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
109 -HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
110 +HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks);
111 +HAL_StatusTypeDef HAL_SD_WriteBlocks_Data(SD_HandleTypeDef *hsd, uint8_t *pData);
112  
113  void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
114  
115 diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
116 index 181b4b7..d71c37b 100644
117 --- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
118 +++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
119 @@ -1064,6 +1064,7 @@ uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
120  uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
121  uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
122  uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
123 +uint32_t SDMMC_CmdSetBlockCount(SDIO_TypeDef *SDIOx, uint32_t appCmdArg, uint32_t blockCount);
124  uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
125  uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
126  uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd);
127 diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
128 index 569c8b1..b10dd0e 100644
129 --- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
130 +++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
131 @@ -430,6 +430,10 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
132    /* Enable SDIO Clock */
133    __HAL_SD_ENABLE(hsd);
134  
135 +  /* 1ms: required power up waiting time before starting the SD initialization 
136 +     sequence */
137 +  HAL_Delay(1);
138 +
139    /* Identify card operating voltage */
140    errorstate = SD_PowerON(hsd);
141    if(errorstate != HAL_SD_ERROR_NONE)
142 @@ -1227,22 +1231,21 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
143      else
144      {
145        /* Enable SD DMA transfer */
146 -      __HAL_SD_DMA_ENABLE(hsd);
147 +      // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
148  
149        if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
150        {
151          add *= 512U;
152 -      }
153 -
154 -      /* Set Block Size for Card */
155 -      errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
156 -      if(errorstate != HAL_SD_ERROR_NONE)
157 -      {
158 -        /* Clear all the static flags */
159 -        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
160 -        hsd->ErrorCode |= errorstate;
161 -        hsd->State = HAL_SD_STATE_READY;
162 -        return HAL_ERROR;
163 +        /* Set Block Size for Card */
164 +        errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
165 +        if(errorstate != HAL_SD_ERROR_NONE)
166 +        {
167 +          /* Clear all the static flags */
168 +          __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
169 +          hsd->ErrorCode |= errorstate;
170 +          hsd->State = HAL_SD_STATE_READY;
171 +          return HAL_ERROR;
172 +        }
173        }
174  
175        /* Configure the SD DPSM (Data Path State Machine) */
176 @@ -1252,6 +1255,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
177        config.TransferDir   = SDIO_TRANSFER_DIR_TO_SDIO;
178        config.TransferMode  = SDIO_TRANSFER_MODE_BLOCK;
179        config.DPSM          = SDIO_DPSM_ENABLE;
180 +
181 +      // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
182 +      // data is just discarded before the dpsm is started.
183 +      __HAL_SD_DMA_ENABLE();
184 +
185        (void)SDIO_ConfigData(hsd->Instance, &config);
186  
187        /* Read Blocks in DMA mode */
188 @@ -1301,18 +1309,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
189    * @param  NumberOfBlocks: Number of blocks to write
190    * @retval HAL status
191    */
192 -HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
193 +HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks)
194  {
195 -  SDIO_DataInitTypeDef config;
196    uint32_t errorstate;
197    uint32_t add = BlockAdd;
198  
199 -  if(NULL == pData)
200 -  {
201 -    hsd->ErrorCode |= HAL_SD_ERROR_PARAM;
202 -    return HAL_ERROR;
203 -  }
204 -
205    if(hsd->State == HAL_SD_STATE_READY)
206    {
207      hsd->ErrorCode = HAL_SD_ERROR_NONE;
208 @@ -1323,15 +1324,29 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
209        return HAL_ERROR;
210      }
211  
212 -    hsd->State = HAL_SD_STATE_BUSY;
213 +    if(NumberOfBlocks > 1U && hsd->SdCard.CardType == CARD_SDHC_SDXC)
214 +    {
215 +      /* MM: Prepare for write */
216 +      errorstate = SDMMC_CmdSetBlockCount(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd) << 16, NumberOfBlocks);
217 +      if(errorstate != HAL_SD_ERROR_NONE)
218 +      {
219 +        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
220 +        hsd->ErrorCode |= errorstate;
221 +        hsd->State = HAL_SD_STATE_READY;
222 +        return HAL_ERROR;
223 +      }
224 +    }
225 +
226 +    // hsd->State = HAL_SD_STATE_BUSY;
227  
228      /* Initialize data control register */
229      hsd->Instance->DCTRL = 0U;
230  
231      /* Enable SD Error interrupts */
232 -    __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR));   
233 +    __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR | SDIO_IT_DATAEND));
234  
235      /* Set the DMA transfer complete callback */
236 +    // This callback now doesn't do anything - enabling DATAEND interrupt is set above to avoid race conditions
237      hsd->hdmatx->XferCpltCallback = SD_DMATransmitCplt;
238  
239      /* Set the DMA error callback */
240 @@ -1343,17 +1358,16 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
241      if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
242      {
243        add *= 512U;
244 -    }
245 -
246 -    /* Set Block Size for Card */
247 -    errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
248 -    if(errorstate != HAL_SD_ERROR_NONE)
249 -    {
250 -      /* Clear all the static flags */
251 -      __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
252 -      hsd->ErrorCode |= errorstate;
253 -      hsd->State = HAL_SD_STATE_READY;
254 -      return HAL_ERROR;
255 +      /* Set Block Size for Card */
256 +      errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
257 +      if(errorstate != HAL_SD_ERROR_NONE)
258 +      {
259 +        /* Clear all the static flags */
260 +        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
261 +        hsd->ErrorCode |= errorstate;
262 +        hsd->State = HAL_SD_STATE_READY;
263 +        return HAL_ERROR;
264 +      }
265      }
266  
267      /* Write Blocks in Polling mode */
268 @@ -1381,11 +1395,55 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
269        return HAL_ERROR;
270      }
271  
272 -    /* Enable SDIO DMA transfer */
273 -    __HAL_SD_DMA_ENABLE(hsd);
274 +    return HAL_OK;
275 +  }
276 +  else
277 +  {
278 +    return HAL_BUSY;
279 +  }
280 +}
281 +
282 +/**
283 +  * @brief  Writes block(s) to a specified address in a card. The Data transfer
284 +  *         is managed by DMA mode.
285 +  * @note   This API should be followed by a check on the card state through
286 +  *         HAL_SD_GetCardState().
287 +  * @note   You could also check the DMA transfer process through the SD Tx
288 +  *         interrupt event.
289 +  * @param  hsd: Pointer to SD handle
290 +  * @param  pData: Pointer to the buffer that will contain the data to transmit
291 +  * @param  BlockAdd: Block Address where data will be written
292 +  * @param  NumberOfBlocks: Number of blocks to write
293 +  * @retval HAL status
294 +  */
295 +HAL_StatusTypeDef HAL_SD_WriteBlocks_Data(SD_HandleTypeDef *hsd, uint8_t *pData)
296 +{
297 +  SDIO_DataInitTypeDef config;
298 +
299 +  if(hsd->State == HAL_SD_STATE_READY)
300 +  {
301 +    hsd->ErrorCode = HAL_SD_ERROR_NONE;
302 +
303 +    hsd->State = HAL_SD_STATE_BUSY;
304 +
305 +    /* Initialize data control register */
306 +    hsd->Instance->DCTRL = 0U;
307 +
308 +    /* Enable SD Error interrupts */
309 +    __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR | SDIO_IT_DATAEND));
310 +
311 +    /* Set the DMA transfer complete callback */
312 +    // This callback now doesn't do anything - enabling DATAEND interrupt is set above to avoid race conditions
313 +    hsd->hdmatx->XferCpltCallback = SD_DMATransmitCplt;
314 +
315 +    /* Set the DMA error callback */
316 +    hsd->hdmatx->XferErrorCallback = SD_DMAError;
317 +
318 +    /* Set the DMA Abort callback */
319 +    hsd->hdmatx->XferAbortCallback = NULL;
320  
321      /* Enable the DMA Channel */
322 -    if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK)
323 +    if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE)/4U) != HAL_OK)
324      {
325        __HAL_SD_DISABLE_IT(hsd, (SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_TXUNDERR));   
326        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
327 @@ -1398,11 +1456,16 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
328      {
329        /* Configure the SD DPSM (Data Path State Machine) */
330        config.DataTimeOut   = SDMMC_DATATIMEOUT;
331 -      config.DataLength    = BLOCKSIZE * NumberOfBlocks;
332 +      config.DataLength    = BLOCKSIZE;
333        config.DataBlockSize = SDIO_DATABLOCK_SIZE_512B;
334        config.TransferDir   = SDIO_TRANSFER_DIR_TO_CARD;
335        config.TransferMode  = SDIO_TRANSFER_MODE_BLOCK;
336        config.DPSM          = SDIO_DPSM_ENABLE;
337 +
338 +      // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
339 +      // data is just discarded before the dpsm is started.
340 +      __HAL_SD_DMA_ENABLE();
341 +
342        (void)SDIO_ConfigData(hsd->Instance, &config);
343  
344        return HAL_OK;
345 @@ -1588,16 +1651,8 @@ void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd)
346      {
347        if((context & SD_CONTEXT_WRITE_MULTIPLE_BLOCK) != 0U)
348        {
349 -        errorstate = SDMMC_CmdStopTransfer(hsd->Instance);
350 -        if(errorstate != HAL_SD_ERROR_NONE)
351 -        {
352 -          hsd->ErrorCode |= errorstate;
353 -#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
354 -          hsd->ErrorCallback(hsd);
355 -#else
356 -          HAL_SD_ErrorCallback(hsd);
357 -#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
358 -        }
359 +        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
360 +        __HAL_SD_DMA_DISABLE(hsd);
361        }
362        if(((context & SD_CONTEXT_READ_SINGLE_BLOCK) == 0U) && ((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) == 0U))
363        {
364 @@ -2354,7 +2409,7 @@ HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd)
365    hsd->Context = SD_CONTEXT_NONE;
366  
367    CardState = HAL_SD_GetCardState(hsd);
368 -  if((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING))
369 +  if((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING) || (CardState == HAL_SD_CARD_PROGRAMMING))
370    {
371      hsd->ErrorCode = SDMMC_CmdStopTransfer(hsd->Instance);
372    }
373 @@ -2460,10 +2515,13 @@ HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd)
374    */
375  static void SD_DMATransmitCplt(DMA_HandleTypeDef *hdma)
376  {
377 -  SD_HandleTypeDef* hsd = (SD_HandleTypeDef* )(hdma->Parent);
378 +  // SD_HandleTypeDef* hsd = (SD_HandleTypeDef* )(hdma->Parent);
379  
380    /* Enable DATAEND Interrupt */
381 -  __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DATAEND));
382 +  // __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DATAEND));
383 +  //WHAT IF IT ALREADY TRIGGERED ? Maybe it can't due to interrupt priorities ?
384 +  // Easier to just ignore it.
385 +  //  __HAL_SD_ENABLE_IT(hsd, (SDIO_IT_DATAEND));
386  }
387  
388  /**
389 diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
390 index b060eae..de39f9d 100644
391 --- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
392 +++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
393 @@ -606,6 +606,32 @@ uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
394    return errorstate;
395  }
396  
397 +/**
398 +  * @brief  Set the count of a multi-block write command
399 +  * @param  SDIOx: Pointer to SDIO register base 
400 +  * @retval HAL status
401 +  */
402 +uint32_t SDMMC_CmdSetBlockCount(SDIO_TypeDef *SDIOx, uint32_t appCmdArg, uint32_t blockCount)
403 +{
404 +  SDIO_CmdInitTypeDef  sdmmc_cmdinit;
405 +  uint32_t errorstate;
406 +  
407 +  errorstate = SDMMC_CmdAppCommand(SDIOx, appCmdArg);
408 +  if(errorstate == HAL_SD_ERROR_NONE)
409 +  {
410 +    sdmmc_cmdinit.Argument         = blockCount;
411 +    sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SET_BLOCK_COUNT;
412 +    sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
413 +    sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
414 +    sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
415 +    (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
416 +    errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);
417 +  }
418 +
419 +  return errorstate;
420 +}
421 +
422 +
423  /**
424    * @brief  Send the Write Multi Block command and check the response
425    * @param  SDIOx: Pointer to SDIO register base