Improve IRQ handler responsiveness v6.4.5
authorMichael McMaster <michael@codesrc.com>
Tue, 11 May 2021 13:10:36 +0000 (23:10 +1000)
committerMichael McMaster <michael@codesrc.com>
Tue, 11 May 2021 13:10:36 +0000 (23:10 +1000)
src/firmware/config.c
src/firmware/disk.c
src/firmware/scsiPhy.c

index 7a512a9bfebf8913d52e5e5b84b5ffc940233d92..a016f6fc97ad106cdb62028c5f429f176feff6ca 100755 (executable)
@@ -36,7 +36,7 @@
 \r
 #include <string.h>\r
 \r
-static const uint16_t FIRMWARE_VERSION = 0x0644;\r
+static const uint16_t FIRMWARE_VERSION = 0x0645;\r
 \r
 // Optional static config\r
 extern uint8_t* __fixed_config;\r
index a0bcf491600c3ed3965c6e18a8695325010c8a9d..26962d939536a2f7aefdc101c6c17dfc4ce44a2c 100755 (executable)
@@ -657,7 +657,8 @@ void scsiDiskPoll()
                                }\r
                        }\r
 \r
-                       if ((prep - i) > 0)\r
+                       if (((prep - i) > 0) &&\r
+                scsiFifoReady())\r
                        {\r
                                int dmaBytes = SD_SECTOR_SIZE;\r
                                if ((i % sdPerScsi) == (sdPerScsi - 1))\r
@@ -679,20 +680,26 @@ void scsiDiskPoll()
                        phaseChangeDelayUs = 0;\r
                }\r
 \r
+        // Wait for the SD transfer to complete before we disable IRQs.\r
+        // (Otherwise some cards will cause an error if we don't sent the\r
+        // stop transfer command via the DMA complete handler in time)\r
+               while (HAL_SD_GetState(&hsd) == HAL_SD_STATE_BUSY)\r
+               {\r
+                       // Wait while keeping BSY.\r
+               }\r
+\r
                // We've finished transferring the data to the FPGA, now wait until it's\r
                // written to he SCSI bus.\r
-               __disable_irq();\r
                while (!scsiPhyComplete() &&\r
                        likely(scsiDev.phase == DATA_IN) &&\r
                        likely(!scsiDev.resetFlag))\r
                {\r
-                       __WFI();\r
-               }\r
-               __enable_irq();\r
-\r
-               while (HAL_SD_GetState(&hsd) == HAL_SD_STATE_BUSY)\r
-               {\r
-                       // Wait while keeping BSY.\r
+               __disable_irq();\r
+                   if (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
+            {\r
+                           __WFI();\r
+            }\r
+                   __enable_irq();\r
                }\r
 \r
                if (scsiDev.phase == DATA_IN)\r
index b7b55e027a5ab69640d9b0ba29ab308552628159..684887dcdfeb16435a066c5d3d3481a65159f38f 100755 (executable)
@@ -329,12 +329,15 @@ scsiRead(uint8_t* data, uint32_t count, int* parityError)
 \r
                scsiReadPIO(data + i, chunk, parityError);\r
 \r
-               __disable_irq();\r
                while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
                {\r
-                       __WFI();\r
+                   __disable_irq();\r
+            if (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
+            {\r
+                       __WFI();\r
+            }\r
+                   __enable_irq();\r
                }\r
-               __enable_irq();\r
 \r
                i += chunk;\r
        }\r
@@ -479,12 +482,15 @@ scsiWrite(const uint8_t* data, uint32_t count)
 \r
                scsiWritePIO(data + i, chunk);\r
 \r
-               __disable_irq();\r
                while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
                {\r
-                       __WFI();\r
+                   __disable_irq();\r
+                   if (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
+            {\r
+                       __WFI();\r
+            }\r
+                   __enable_irq();\r
                }\r
-               __enable_irq();\r
 \r
                i += chunk;\r
        }\r